gma500: Only register interrupt handler for poulsbo hardware
First step in adding proper irq handling. We'll start with poulsbo support so make sure other chips don't touch drm_irq_install(). Signed-off-by: Patrik Jakobsson <patrik.r.jakobsson@gmail.com> Signed-off-by: Alan Cox <alan@linux.intel.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
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@ -368,7 +368,7 @@ static int psb_driver_load(struct drm_device *dev, unsigned long chipset)
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PSB_WVDC32(0x00000000, PSB_INT_ENABLE_R);
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PSB_WVDC32(0x00000000, PSB_INT_ENABLE_R);
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PSB_WVDC32(0xFFFFFFFF, PSB_INT_MASK_R);
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PSB_WVDC32(0xFFFFFFFF, PSB_INT_MASK_R);
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spin_unlock_irqrestore(&dev_priv->irqmask_lock, irqflags);
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spin_unlock_irqrestore(&dev_priv->irqmask_lock, irqflags);
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if (drm_core_check_feature(dev, DRIVER_MODESET))
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if (IS_PSB(dev) && drm_core_check_feature(dev, DRIVER_MODESET))
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drm_irq_install(dev);
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drm_irq_install(dev);
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dev->vblank_disable_allowed = 1;
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dev->vblank_disable_allowed = 1;
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@ -42,6 +42,7 @@ enum {
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CHIP_MFLD_0130 = 3, /* Medfield */
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CHIP_MFLD_0130 = 3, /* Medfield */
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};
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};
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#define IS_PSB(dev) (((dev)->pci_device & 0xfffe) == 0x8108)
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#define IS_MRST(dev) (((dev)->pci_device & 0xfffc) == 0x4100)
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#define IS_MRST(dev) (((dev)->pci_device & 0xfffc) == 0x4100)
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#define IS_MFLD(dev) (((dev)->pci_device & 0xfff8) == 0x0130)
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#define IS_MFLD(dev) (((dev)->pci_device & 0xfff8) == 0x0130)
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