arm64: dts: qcom: msm8996: Add CAMSS support
Add a node for the Camera Subsystem present on the Qualcomm MSM8996 SoC. Signed-off-by: Todor Tomov <todor.tomov@linaro.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
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@ -967,6 +967,141 @@
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status = "ok";
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};
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camss: camss@a00000 {
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compatible = "qcom,msm8996-camss";
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reg = <0xa34000 0x1000>,
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<0xa00030 0x4>,
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<0xa35000 0x1000>,
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<0xa00038 0x4>,
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<0xa36000 0x1000>,
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<0xa00040 0x4>,
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<0xa30000 0x100>,
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<0xa30400 0x100>,
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<0xa30800 0x100>,
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<0xa30c00 0x100>,
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<0xa31000 0x500>,
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<0xa00020 0x10>,
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<0xa10000 0x1000>,
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<0xa14000 0x1000>;
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reg-names = "csiphy0",
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"csiphy0_clk_mux",
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"csiphy1",
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"csiphy1_clk_mux",
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"csiphy2",
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"csiphy2_clk_mux",
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"csid0",
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"csid1",
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"csid2",
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"csid3",
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"ispif",
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"csi_clk_mux",
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"vfe0",
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"vfe1";
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interrupts = <GIC_SPI 78 0>,
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<GIC_SPI 79 0>,
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<GIC_SPI 80 0>,
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<GIC_SPI 296 0>,
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<GIC_SPI 297 0>,
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<GIC_SPI 298 0>,
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<GIC_SPI 299 0>,
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<GIC_SPI 309 0>,
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<GIC_SPI 314 0>,
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<GIC_SPI 315 0>;
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interrupt-names = "csiphy0",
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"csiphy1",
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"csiphy2",
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"csid0",
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"csid1",
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"csid2",
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"csid3",
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"ispif",
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"vfe0",
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"vfe1";
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power-domains = <&mmcc VFE0_GDSC>;
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clocks = <&mmcc CAMSS_TOP_AHB_CLK>,
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<&mmcc CAMSS_ISPIF_AHB_CLK>,
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<&mmcc CAMSS_CSI0PHYTIMER_CLK>,
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<&mmcc CAMSS_CSI1PHYTIMER_CLK>,
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<&mmcc CAMSS_CSI2PHYTIMER_CLK>,
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<&mmcc CAMSS_CSI0_AHB_CLK>,
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<&mmcc CAMSS_CSI0_CLK>,
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<&mmcc CAMSS_CSI0PHY_CLK>,
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<&mmcc CAMSS_CSI0PIX_CLK>,
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<&mmcc CAMSS_CSI0RDI_CLK>,
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<&mmcc CAMSS_CSI1_AHB_CLK>,
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<&mmcc CAMSS_CSI1_CLK>,
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<&mmcc CAMSS_CSI1PHY_CLK>,
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<&mmcc CAMSS_CSI1PIX_CLK>,
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<&mmcc CAMSS_CSI1RDI_CLK>,
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<&mmcc CAMSS_CSI2_AHB_CLK>,
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<&mmcc CAMSS_CSI2_CLK>,
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<&mmcc CAMSS_CSI2PHY_CLK>,
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<&mmcc CAMSS_CSI2PIX_CLK>,
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<&mmcc CAMSS_CSI2RDI_CLK>,
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<&mmcc CAMSS_CSI3_AHB_CLK>,
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<&mmcc CAMSS_CSI3_CLK>,
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<&mmcc CAMSS_CSI3PHY_CLK>,
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<&mmcc CAMSS_CSI3PIX_CLK>,
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<&mmcc CAMSS_CSI3RDI_CLK>,
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<&mmcc CAMSS_AHB_CLK>,
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<&mmcc CAMSS_VFE0_CLK>,
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<&mmcc CAMSS_CSI_VFE0_CLK>,
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<&mmcc CAMSS_VFE0_AHB_CLK>,
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<&mmcc CAMSS_VFE0_STREAM_CLK>,
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<&mmcc CAMSS_VFE1_CLK>,
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<&mmcc CAMSS_CSI_VFE1_CLK>,
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<&mmcc CAMSS_VFE1_AHB_CLK>,
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<&mmcc CAMSS_VFE1_STREAM_CLK>,
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<&mmcc CAMSS_VFE_AHB_CLK>,
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<&mmcc CAMSS_VFE_AXI_CLK>;
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clock-names = "top_ahb",
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"ispif_ahb",
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"csiphy0_timer",
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"csiphy1_timer",
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"csiphy2_timer",
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"csi0_ahb",
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"csi0",
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"csi0_phy",
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"csi0_pix",
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"csi0_rdi",
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"csi1_ahb",
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"csi1",
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"csi1_phy",
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"csi1_pix",
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"csi1_rdi",
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"csi2_ahb",
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"csi2",
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"csi2_phy",
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"csi2_pix",
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"csi2_rdi",
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"csi3_ahb",
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"csi3",
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"csi3_phy",
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"csi3_pix",
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"csi3_rdi",
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"ahb",
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"vfe0",
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"csi_vfe0",
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"vfe0_ahb",
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"vfe0_stream",
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"vfe1",
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"csi_vfe1",
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"vfe1_ahb",
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"vfe1_stream",
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"vfe_ahb",
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"vfe_axi";
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vdda-supply = <&pm8994_l2>;
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iommus = <&vfe_smmu 0>,
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<&vfe_smmu 1>,
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<&vfe_smmu 2>,
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<&vfe_smmu 3>;
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status = "disabled";
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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};
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};
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agnoc@0 {
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power-domains = <&gcc AGGRE0_NOC_GDSC>;
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compatible = "simple-pm-bus";
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