ARM: dts: imx53: Add IPU DI ports and endpoints, move imx-drm node to dtsi
This patch connects IPU and display encoder (VGA, LVDS) device tree nodes, as well as parallel displays on the DISP0 and DISP1 outputs, using the OF graph bindings described in Documentation/devicetree/bindings/media/video-interfaces.txt The IPU ports correspond to the two display interfaces. The order of endpoints in the ports is arbitrary. Since the imx-drm node now only needs to contain links to the display interfaces, it can be moved to the SoC dtsi level. At the board level, only connections between the display interface ports and encoders or panels have to be added. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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@ -23,7 +23,6 @@
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soc {
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display1: display@di1 {
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compatible = "fsl,imx-parallel-display";
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crtcs = <&ipu 1>;
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interface-pix-fmt = "bgr666";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_ipu_disp2_1>;
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@ -44,6 +43,12 @@
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};
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};
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};
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port {
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display1_in: endpoint {
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remote-endpoint = <&ipu_di1_disp1>;
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};
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};
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};
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backlight {
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@ -53,12 +58,6 @@
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default-brightness-level = <6>;
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};
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imx-drm {
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compatible = "fsl,imx-drm";
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crtcs = <&ipu 1>;
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connectors = <&display1>;
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};
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leds {
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compatible = "gpio-leds";
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pinctrl-names = "default";
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@ -227,6 +226,10 @@
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};
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};
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&ipu_di1_disp1 {
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remote-endpoint = <&display1_in>;
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};
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&nfc {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_nand_1>;
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@ -38,15 +38,14 @@
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compatible = "fsl,imx-parallel-display";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_disp1_1>;
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crtcs = <&ipu 1>;
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interface-pix-fmt = "rgb24";
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status = "disabled";
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};
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imx-drm {
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compatible = "fsl,imx-drm";
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crtcs = <&ipu 1>;
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connectors = <&disp1>, <&tve>;
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port {
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display1_in: endpoint {
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remote-endpoint = <&ipu_di1_disp1>;
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};
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};
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};
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reg_3p2v: 3p2v {
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@ -147,6 +146,10 @@
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};
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};
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&ipu_di1_disp1 {
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remote-endpoint = <&display1_in>;
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};
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&cspi {
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status = "okay";
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};
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@ -23,7 +23,6 @@
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display0: display@di0 {
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compatible = "fsl,imx-parallel-display";
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crtcs = <&ipu 0>;
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interface-pix-fmt = "rgb565";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_ipu_disp0_1>;
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@ -46,6 +45,12 @@
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pixelclk-active = <0>;
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};
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};
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port {
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display0_in: endpoint {
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remote-endpoint = <&ipu_di0_disp0>;
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};
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};
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};
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gpio-keys {
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@ -72,12 +77,6 @@
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};
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};
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imx-drm {
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compatible = "fsl,imx-drm";
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crtcs = <&ipu 0>;
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connectors = <&display0>;
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};
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leds {
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compatible = "gpio-leds";
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pinctrl-names = "default";
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@ -132,6 +131,10 @@
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status = "okay";
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};
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&ipu_di0_disp0 {
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remote-endpoint = <&display0_in>;
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};
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&ssi2 {
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fsl,mode = "i2s-slave";
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status = "okay";
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@ -45,6 +45,11 @@
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};
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};
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display-subsystem {
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compatible = "fsl,imx-display-subsystem";
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ports = <&ipu_di0>, <&ipu_di1>;
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};
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tzic: tz-interrupt-controller@0fffc000 {
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compatible = "fsl,imx53-tzic", "fsl,tzic";
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interrupt-controller;
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@ -85,13 +90,49 @@
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ranges;
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ipu: ipu@18000000 {
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#crtc-cells = <1>;
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "fsl,imx53-ipu";
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reg = <0x18000000 0x080000000>;
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interrupts = <11 10>;
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clocks = <&clks 59>, <&clks 110>, <&clks 61>;
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clock-names = "bus", "di0", "di1";
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resets = <&src 2>;
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ipu_di0: port@2 {
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <2>;
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ipu_di0_disp0: endpoint@0 {
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reg = <0>;
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};
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ipu_di0_lvds0: endpoint@1 {
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reg = <1>;
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remote-endpoint = <&lvds0_in>;
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};
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};
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ipu_di1: port@3 {
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <3>;
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ipu_di1_disp1: endpoint@0 {
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reg = <0>;
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};
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ipu_di1_lvds1: endpoint@1 {
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reg = <1>;
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remote-endpoint = <&lvds1_in>;
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};
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ipu_di1_tve: endpoint@2 {
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reg = <2>;
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remote-endpoint = <&tve_in>;
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};
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};
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};
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aips@50000000 { /* AIPS1 */
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@ -838,14 +879,24 @@
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lvds-channel@0 {
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reg = <0>;
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crtcs = <&ipu 0>;
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status = "disabled";
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port {
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lvds0_in: endpoint {
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remote-endpoint = <&ipu_di0_lvds0>;
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};
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};
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};
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lvds-channel@1 {
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reg = <1>;
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crtcs = <&ipu 1>;
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status = "disabled";
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port {
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lvds1_in: endpoint {
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remote-endpoint = <&ipu_di0_lvds0>;
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};
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};
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};
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};
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@ -1103,8 +1154,13 @@
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interrupts = <92>;
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clocks = <&clks 69>, <&clks 116>;
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clock-names = "tve", "di_sel";
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crtcs = <&ipu 1>;
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status = "disabled";
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port {
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tve_in: endpoint {
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remote-endpoint = <&ipu_di1_tve>;
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};
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};
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};
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vpu: vpu@63ff4000 {
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