ARM: KVM: Cleanup exception injection
David Binderman reported that the exception injection code had a couple of unused variables lingering around. Upon examination, it looked like this code could do with an anticipated spring cleaning, which amounts to deduplicating the CPSR/SPSR update, and making it look a bit more like the architecture spec. The spurious variables are removed in the process. Reported-by: David Binderman <dcb314@hotmail.com> Reviewed-by: Christoffer Dall <christoffer.dall@linaro.org> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
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@ -275,6 +275,40 @@ static u32 exc_vector_base(struct kvm_vcpu *vcpu)
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return vbar;
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}
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/*
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* Switch to an exception mode, updating both CPSR and SPSR. Follow
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* the logic described in AArch32.EnterMode() from the ARMv8 ARM.
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*/
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static void kvm_update_psr(struct kvm_vcpu *vcpu, unsigned long mode)
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{
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unsigned long cpsr = *vcpu_cpsr(vcpu);
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u32 sctlr = vcpu->arch.cp15[c1_SCTLR];
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*vcpu_cpsr(vcpu) = (cpsr & ~MODE_MASK) | mode;
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switch (mode) {
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case FIQ_MODE:
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*vcpu_cpsr(vcpu) |= PSR_F_BIT;
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/* Fall through */
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case ABT_MODE:
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case IRQ_MODE:
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*vcpu_cpsr(vcpu) |= PSR_A_BIT;
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/* Fall through */
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default:
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*vcpu_cpsr(vcpu) |= PSR_I_BIT;
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}
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*vcpu_cpsr(vcpu) &= ~(PSR_IT_MASK | PSR_J_BIT | PSR_E_BIT | PSR_T_BIT);
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if (sctlr & SCTLR_TE)
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*vcpu_cpsr(vcpu) |= PSR_T_BIT;
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if (sctlr & SCTLR_EE)
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*vcpu_cpsr(vcpu) |= PSR_E_BIT;
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/* Note: These now point to the mode banked copies */
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*vcpu_spsr(vcpu) = cpsr;
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}
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/**
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* kvm_inject_undefined - inject an undefined exception into the guest
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* @vcpu: The VCPU to receive the undefined exception
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@ -286,29 +320,13 @@ static u32 exc_vector_base(struct kvm_vcpu *vcpu)
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*/
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void kvm_inject_undefined(struct kvm_vcpu *vcpu)
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{
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unsigned long new_lr_value;
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unsigned long new_spsr_value;
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unsigned long cpsr = *vcpu_cpsr(vcpu);
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u32 sctlr = vcpu->arch.cp15[c1_SCTLR];
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bool is_thumb = (cpsr & PSR_T_BIT);
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u32 vect_offset = 4;
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u32 return_offset = (is_thumb) ? 2 : 4;
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new_spsr_value = cpsr;
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new_lr_value = *vcpu_pc(vcpu) - return_offset;
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*vcpu_cpsr(vcpu) = (cpsr & ~MODE_MASK) | UND_MODE;
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*vcpu_cpsr(vcpu) |= PSR_I_BIT;
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*vcpu_cpsr(vcpu) &= ~(PSR_IT_MASK | PSR_J_BIT | PSR_E_BIT | PSR_T_BIT);
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if (sctlr & SCTLR_TE)
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*vcpu_cpsr(vcpu) |= PSR_T_BIT;
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if (sctlr & SCTLR_EE)
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*vcpu_cpsr(vcpu) |= PSR_E_BIT;
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/* Note: These now point to UND banked copies */
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*vcpu_spsr(vcpu) = cpsr;
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*vcpu_reg(vcpu, 14) = new_lr_value;
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kvm_update_psr(vcpu, UND_MODE);
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*vcpu_reg(vcpu, 14) = *vcpu_pc(vcpu) - return_offset;
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/* Branch to exception vector */
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*vcpu_pc(vcpu) = exc_vector_base(vcpu) + vect_offset;
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@ -320,30 +338,14 @@ void kvm_inject_undefined(struct kvm_vcpu *vcpu)
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*/
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static void inject_abt(struct kvm_vcpu *vcpu, bool is_pabt, unsigned long addr)
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{
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unsigned long new_lr_value;
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unsigned long new_spsr_value;
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unsigned long cpsr = *vcpu_cpsr(vcpu);
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u32 sctlr = vcpu->arch.cp15[c1_SCTLR];
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bool is_thumb = (cpsr & PSR_T_BIT);
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u32 vect_offset;
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u32 return_offset = (is_thumb) ? 4 : 0;
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bool is_lpae;
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new_spsr_value = cpsr;
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new_lr_value = *vcpu_pc(vcpu) + return_offset;
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*vcpu_cpsr(vcpu) = (cpsr & ~MODE_MASK) | ABT_MODE;
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*vcpu_cpsr(vcpu) |= PSR_I_BIT | PSR_A_BIT;
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*vcpu_cpsr(vcpu) &= ~(PSR_IT_MASK | PSR_J_BIT | PSR_E_BIT | PSR_T_BIT);
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if (sctlr & SCTLR_TE)
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*vcpu_cpsr(vcpu) |= PSR_T_BIT;
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if (sctlr & SCTLR_EE)
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*vcpu_cpsr(vcpu) |= PSR_E_BIT;
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/* Note: These now point to ABT banked copies */
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*vcpu_spsr(vcpu) = cpsr;
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*vcpu_reg(vcpu, 14) = new_lr_value;
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kvm_update_psr(vcpu, ABT_MODE);
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*vcpu_reg(vcpu, 14) = *vcpu_pc(vcpu) + return_offset;
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if (is_pabt)
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vect_offset = 12;
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