[PATCH] RTC: add rtc-rs5c348 driver
Add an SPI driver for the Ricoh RS5C348 RTC chip. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Acked-by: Alessandro Zummo <a.zummo@towertech.it> Cc: David Brownell <david-b@pacbell.net> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
This commit is contained in:
Atsushi Nemoto
Linus Torvalds
Родитель
84860f9979
Коммит
e0ac4761fa
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@ -162,6 +162,16 @@ config RTC_DRV_PCF8583
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This driver can also be built as a module. If so, the module
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will be called rtc-pcf8583.
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config RTC_DRV_RS5C348
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tristate "Ricoh RS5C348A/B"
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depends on RTC_CLASS && SPI
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help
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If you say yes here you get support for the
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Ricoh RS5C348A and RS5C348B RTC chips.
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This driver can also be built as a module. If so, the module
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will be called rtc-rs5c348.
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config RTC_DRV_RS5C372
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tristate "Ricoh RS5C372A/B"
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depends on RTC_CLASS && I2C
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@ -19,6 +19,7 @@ obj-$(CONFIG_RTC_DRV_DS1742) += rtc-ds1742.o
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obj-$(CONFIG_RTC_DRV_PCF8563) += rtc-pcf8563.o
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obj-$(CONFIG_RTC_DRV_PCF8583) += rtc-pcf8583.o
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obj-$(CONFIG_RTC_DRV_RS5C372) += rtc-rs5c372.o
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obj-$(CONFIG_RTC_DRV_RS5C348) += rtc-rs5c348.o
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obj-$(CONFIG_RTC_DRV_M48T86) += rtc-m48t86.o
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obj-$(CONFIG_RTC_DRV_DS1553) += rtc-ds1553.o
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obj-$(CONFIG_RTC_DRV_EP93XX) += rtc-ep93xx.o
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@ -0,0 +1,246 @@
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/*
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* A SPI driver for the Ricoh RS5C348 RTC
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*
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* Copyright (C) 2006 Atsushi Nemoto <anemo@mba.ocn.ne.jp>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* The board specific init code should provide characteristics of this
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* device:
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* Mode 1 (High-Active, Shift-Then-Sample), High Avtive CS
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*/
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#include <linux/bcd.h>
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#include <linux/delay.h>
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#include <linux/device.h>
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#include <linux/errno.h>
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#include <linux/init.h>
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#include <linux/kernel.h>
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#include <linux/string.h>
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#include <linux/rtc.h>
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#include <linux/workqueue.h>
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#include <linux/spi/spi.h>
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#define DRV_VERSION "0.1"
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#define RS5C348_REG_SECS 0
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#define RS5C348_REG_MINS 1
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#define RS5C348_REG_HOURS 2
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#define RS5C348_REG_WDAY 3
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#define RS5C348_REG_DAY 4
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#define RS5C348_REG_MONTH 5
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#define RS5C348_REG_YEAR 6
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#define RS5C348_REG_CTL1 14
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#define RS5C348_REG_CTL2 15
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#define RS5C348_SECS_MASK 0x7f
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#define RS5C348_MINS_MASK 0x7f
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#define RS5C348_HOURS_MASK 0x3f
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#define RS5C348_WDAY_MASK 0x03
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#define RS5C348_DAY_MASK 0x3f
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#define RS5C348_MONTH_MASK 0x1f
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#define RS5C348_BIT_PM 0x20 /* REG_HOURS */
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#define RS5C348_BIT_Y2K 0x80 /* REG_MONTH */
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#define RS5C348_BIT_24H 0x20 /* REG_CTL1 */
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#define RS5C348_BIT_XSTP 0x10 /* REG_CTL2 */
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#define RS5C348_BIT_VDET 0x40 /* REG_CTL2 */
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#define RS5C348_CMD_W(addr) (((addr) << 4) | 0x08) /* single write */
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#define RS5C348_CMD_R(addr) (((addr) << 4) | 0x0c) /* single read */
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#define RS5C348_CMD_MW(addr) (((addr) << 4) | 0x00) /* burst write */
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#define RS5C348_CMD_MR(addr) (((addr) << 4) | 0x04) /* burst read */
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struct rs5c348_plat_data {
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struct rtc_device *rtc;
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int rtc_24h;
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};
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static int
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rs5c348_rtc_set_time(struct device *dev, struct rtc_time *tm)
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{
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struct spi_device *spi = to_spi_device(dev);
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struct rs5c348_plat_data *pdata = spi->dev.platform_data;
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u8 txbuf[5+7], *txp;
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int ret;
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/* Transfer 5 bytes before writing SEC. This gives 31us for carry. */
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txp = txbuf;
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txbuf[0] = RS5C348_CMD_R(RS5C348_REG_CTL2); /* cmd, ctl2 */
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txbuf[1] = 0; /* dummy */
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txbuf[2] = RS5C348_CMD_R(RS5C348_REG_CTL2); /* cmd, ctl2 */
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txbuf[3] = 0; /* dummy */
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txbuf[4] = RS5C348_CMD_MW(RS5C348_REG_SECS); /* cmd, sec, ... */
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txp = &txbuf[5];
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txp[RS5C348_REG_SECS] = BIN2BCD(tm->tm_sec);
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txp[RS5C348_REG_MINS] = BIN2BCD(tm->tm_min);
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if (pdata->rtc_24h) {
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txp[RS5C348_REG_HOURS] = BIN2BCD(tm->tm_hour);
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} else {
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/* hour 0 is AM12, noon is PM12 */
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txp[RS5C348_REG_HOURS] = BIN2BCD((tm->tm_hour + 11) % 12 + 1) |
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(tm->tm_hour >= 12 ? RS5C348_BIT_PM : 0);
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}
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txp[RS5C348_REG_WDAY] = BIN2BCD(tm->tm_wday);
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txp[RS5C348_REG_DAY] = BIN2BCD(tm->tm_mday);
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txp[RS5C348_REG_MONTH] = BIN2BCD(tm->tm_mon + 1) |
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(tm->tm_year >= 100 ? RS5C348_BIT_Y2K : 0);
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txp[RS5C348_REG_YEAR] = BIN2BCD(tm->tm_year % 100);
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/* write in one transfer to avoid data inconsistency */
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ret = spi_write_then_read(spi, txbuf, sizeof(txbuf), NULL, 0);
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udelay(62); /* Tcsr 62us */
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return ret;
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}
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static int
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rs5c348_rtc_read_time(struct device *dev, struct rtc_time *tm)
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{
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struct spi_device *spi = to_spi_device(dev);
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struct rs5c348_plat_data *pdata = spi->dev.platform_data;
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u8 txbuf[5], rxbuf[7];
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int ret;
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/* Transfer 5 byte befores reading SEC. This gives 31us for carry. */
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txbuf[0] = RS5C348_CMD_R(RS5C348_REG_CTL2); /* cmd, ctl2 */
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txbuf[1] = 0; /* dummy */
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txbuf[2] = RS5C348_CMD_R(RS5C348_REG_CTL2); /* cmd, ctl2 */
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txbuf[3] = 0; /* dummy */
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txbuf[4] = RS5C348_CMD_MR(RS5C348_REG_SECS); /* cmd, sec, ... */
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/* read in one transfer to avoid data inconsistency */
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ret = spi_write_then_read(spi, txbuf, sizeof(txbuf),
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rxbuf, sizeof(rxbuf));
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udelay(62); /* Tcsr 62us */
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if (ret < 0)
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return ret;
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tm->tm_sec = BCD2BIN(rxbuf[RS5C348_REG_SECS] & RS5C348_SECS_MASK);
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tm->tm_min = BCD2BIN(rxbuf[RS5C348_REG_MINS] & RS5C348_MINS_MASK);
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tm->tm_hour = BCD2BIN(rxbuf[RS5C348_REG_HOURS] & RS5C348_HOURS_MASK);
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if (!pdata->rtc_24h) {
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tm->tm_hour %= 12;
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if (rxbuf[RS5C348_REG_HOURS] & RS5C348_BIT_PM)
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tm->tm_hour += 12;
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}
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tm->tm_wday = BCD2BIN(rxbuf[RS5C348_REG_WDAY] & RS5C348_WDAY_MASK);
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tm->tm_mday = BCD2BIN(rxbuf[RS5C348_REG_DAY] & RS5C348_DAY_MASK);
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tm->tm_mon =
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BCD2BIN(rxbuf[RS5C348_REG_MONTH] & RS5C348_MONTH_MASK) - 1;
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/* year is 1900 + tm->tm_year */
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tm->tm_year = BCD2BIN(rxbuf[RS5C348_REG_YEAR]) +
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((rxbuf[RS5C348_REG_MONTH] & RS5C348_BIT_Y2K) ? 100 : 0);
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if (rtc_valid_tm(tm) < 0) {
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dev_err(&spi->dev, "retrieved date/time is not valid.\n");
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rtc_time_to_tm(0, tm);
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}
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return 0;
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}
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static struct rtc_class_ops rs5c348_rtc_ops = {
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.read_time = rs5c348_rtc_read_time,
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.set_time = rs5c348_rtc_set_time,
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};
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static struct spi_driver rs5c348_driver;
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static int __devinit rs5c348_probe(struct spi_device *spi)
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{
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int ret;
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struct rtc_device *rtc;
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struct rs5c348_plat_data *pdata;
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pdata = kzalloc(sizeof(struct rs5c348_plat_data), GFP_KERNEL);
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if (!pdata)
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return -ENOMEM;
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spi->dev.platform_data = pdata;
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/* Check D7 of SECOND register */
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ret = spi_w8r8(spi, RS5C348_CMD_R(RS5C348_REG_SECS));
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if (ret < 0 || (ret & 0x80)) {
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dev_err(&spi->dev, "not found.\n");
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goto kfree_exit;
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}
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dev_info(&spi->dev, "chip found, driver version " DRV_VERSION "\n");
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dev_info(&spi->dev, "spiclk %u KHz.\n",
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(spi->max_speed_hz + 500) / 1000);
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/* turn RTC on if it was not on */
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ret = spi_w8r8(spi, RS5C348_CMD_R(RS5C348_REG_CTL2));
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if (ret < 0)
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goto kfree_exit;
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if (ret & (RS5C348_BIT_XSTP | RS5C348_BIT_VDET)) {
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u8 buf[2];
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if (ret & RS5C348_BIT_VDET)
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dev_warn(&spi->dev, "voltage-low detected.\n");
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buf[0] = RS5C348_CMD_W(RS5C348_REG_CTL2);
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buf[1] = 0;
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ret = spi_write_then_read(spi, buf, sizeof(buf), NULL, 0);
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if (ret < 0)
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goto kfree_exit;
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}
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ret = spi_w8r8(spi, RS5C348_CMD_R(RS5C348_REG_CTL1));
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if (ret < 0)
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goto kfree_exit;
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if (ret & RS5C348_BIT_24H)
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pdata->rtc_24h = 1;
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rtc = rtc_device_register(rs5c348_driver.driver.name, &spi->dev,
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&rs5c348_rtc_ops, THIS_MODULE);
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if (IS_ERR(rtc)) {
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ret = PTR_ERR(rtc);
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goto kfree_exit;
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}
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pdata->rtc = rtc;
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return 0;
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kfree_exit:
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kfree(pdata);
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return ret;
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}
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static int __devexit rs5c348_remove(struct spi_device *spi)
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{
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struct rs5c348_plat_data *pdata = spi->dev.platform_data;
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struct rtc_device *rtc = pdata->rtc;
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if (rtc)
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rtc_device_unregister(rtc);
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kfree(pdata);
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return 0;
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}
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static struct spi_driver rs5c348_driver = {
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.driver = {
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.name = "rs5c348",
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.bus = &spi_bus_type,
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.owner = THIS_MODULE,
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},
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.probe = rs5c348_probe,
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.remove = __devexit_p(rs5c348_remove),
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};
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static __init int rs5c348_init(void)
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{
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return spi_register_driver(&rs5c348_driver);
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}
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static __exit void rs5c348_exit(void)
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{
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spi_unregister_driver(&rs5c348_driver);
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}
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module_init(rs5c348_init);
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module_exit(rs5c348_exit);
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MODULE_AUTHOR("Atsushi Nemoto <anemo@mba.ocn.ne.jp>");
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MODULE_DESCRIPTION("Ricoh RS5C348 RTC driver");
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MODULE_LICENSE("GPL");
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MODULE_VERSION(DRV_VERSION);
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