soc: renesas: rcar-sysc: Add support for R-Car M3-W power areas
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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@ -5,3 +5,4 @@ obj-$(CONFIG_ARCH_R8A7791) += rcar-sysc.o r8a7791-sysc.o
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obj-$(CONFIG_ARCH_R8A7793) += rcar-sysc.o r8a7791-sysc.o
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obj-$(CONFIG_ARCH_R8A7794) += rcar-sysc.o r8a7794-sysc.o
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obj-$(CONFIG_ARCH_R8A7795) += rcar-sysc.o r8a7795-sysc.o
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obj-$(CONFIG_ARCH_R8A7796) += rcar-sysc.o r8a7796-sysc.o
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@ -0,0 +1,48 @@
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/*
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* Renesas R-Car M3-W System Controller
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*
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* Copyright (C) 2016 Glider bvba
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*/
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#include <linux/bug.h>
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#include <linux/kernel.h>
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#include <dt-bindings/power/r8a7796-sysc.h>
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#include "rcar-sysc.h"
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static const struct rcar_sysc_area r8a7796_areas[] __initconst = {
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{ "always-on", 0, 0, R8A7796_PD_ALWAYS_ON, -1, PD_ALWAYS_ON },
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{ "ca57-scu", 0x1c0, 0, R8A7796_PD_CA57_SCU, R8A7796_PD_ALWAYS_ON,
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PD_SCU },
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{ "ca57-cpu0", 0x80, 0, R8A7796_PD_CA57_CPU0, R8A7796_PD_CA57_SCU,
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PD_CPU_NOCR },
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{ "ca57-cpu1", 0x80, 1, R8A7796_PD_CA57_CPU1, R8A7796_PD_CA57_SCU,
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PD_CPU_NOCR },
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{ "ca53-scu", 0x140, 0, R8A7796_PD_CA53_SCU, R8A7796_PD_ALWAYS_ON,
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PD_SCU },
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{ "ca53-cpu0", 0x200, 0, R8A7796_PD_CA53_CPU0, R8A7796_PD_CA53_SCU,
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PD_CPU_NOCR },
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{ "ca53-cpu1", 0x200, 1, R8A7796_PD_CA53_CPU1, R8A7796_PD_CA53_SCU,
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PD_CPU_NOCR },
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{ "ca53-cpu2", 0x200, 2, R8A7796_PD_CA53_CPU2, R8A7796_PD_CA53_SCU,
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PD_CPU_NOCR },
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{ "ca53-cpu3", 0x200, 3, R8A7796_PD_CA53_CPU3, R8A7796_PD_CA53_SCU,
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PD_CPU_NOCR },
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{ "cr7", 0x240, 0, R8A7796_PD_CR7, R8A7796_PD_ALWAYS_ON },
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{ "a3vc", 0x380, 0, R8A7796_PD_A3VC, R8A7796_PD_ALWAYS_ON },
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{ "a2vc0", 0x3c0, 0, R8A7796_PD_A2VC0, R8A7796_PD_A3VC },
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{ "a2vc1", 0x3c0, 1, R8A7796_PD_A2VC1, R8A7796_PD_A3VC },
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{ "3dg-a", 0x100, 0, R8A7796_PD_3DG_A, R8A7796_PD_ALWAYS_ON },
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{ "3dg-b", 0x100, 1, R8A7796_PD_3DG_B, R8A7796_PD_3DG_A },
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{ "a3ir", 0x180, 0, R8A7796_PD_A3IR, R8A7796_PD_ALWAYS_ON },
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};
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const struct rcar_sysc_info r8a7796_sysc_info __initconst = {
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.areas = r8a7796_areas,
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.num_areas = ARRAY_SIZE(r8a7796_areas),
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};
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@ -302,6 +302,9 @@ static const struct of_device_id rcar_sysc_matches[] = {
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#endif
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#ifdef CONFIG_ARCH_R8A7795
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{ .compatible = "renesas,r8a7795-sysc", .data = &r8a7795_sysc_info },
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#endif
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#ifdef CONFIG_ARCH_R8A7796
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{ .compatible = "renesas,r8a7796-sysc", .data = &r8a7796_sysc_info },
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#endif
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{ /* sentinel */ }
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};
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@ -55,4 +55,5 @@ extern const struct rcar_sysc_info r8a7790_sysc_info;
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extern const struct rcar_sysc_info r8a7791_sysc_info;
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extern const struct rcar_sysc_info r8a7794_sysc_info;
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extern const struct rcar_sysc_info r8a7795_sysc_info;
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extern const struct rcar_sysc_info r8a7796_sysc_info;
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#endif /* __SOC_RENESAS_RCAR_SYSC_H__ */
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