parisc architecture updates for kernel v5.19-rc1
Minor cleanups and code optimizations, e.g.: - improvements in assembly statements in the tmpalias code path, - added some additionals compile time checks, - drop some unneccesary assembler DMA syncs. -----BEGIN PGP SIGNATURE----- iHUEABYKAB0WIQS86RI+GtKfB8BJu973ErUQojoPXwUCYpUMsgAKCRD3ErUQojoP X/fNAQDGddN79CH+bABo6gq8dN/ko0NxxfJapAoPYEEZrKaFtwEA7FUZMfQqBVnm z+aSkbH6igueqxRCmbiW1OZ10KLwSgg= =SfFN -----END PGP SIGNATURE----- Merge tag 'for-5.19/parisc-1' of git://git.kernel.org/pub/scm/linux/kernel/git/deller/parisc-linux Pull parisc architecture updates from Helge Deller: "Minor cleanups and code optimizations, e.g.: - improvements in assembly statements in the tmpalias code path - added some additionals compile time checks - drop some unneccesary assembler DMA syncs" * tag 'for-5.19/parisc-1' of git://git.kernel.org/pub/scm/linux/kernel/git/deller/parisc-linux: parisc: Drop __ARCH_WANT_OLD_READDIR and __ARCH_WANT_SYS_OLDUMOUNT parisc: Optimize tmpalias function calls parisc: Add dep_safe() macro to deposit a register in 32- and 64-kernels parisc: Fix wrong comment for shr macro parisc: Prevent ldil() to sign-extend into upper 32 bits parisc: Don't hardcode assembler bit definitions in tmpalias code parisc: Don't enforce DMA completion order in cache flushes parisc: video: fbdev: stifb: Add sti_dump_font() to dump STI font
This commit is contained in:
Linus Torvalds
Коммит
e11a93567d
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@ -143,7 +143,7 @@
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depd,z \r, 63-(\sa), 64-(\sa), \t
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.endm
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/* Shift Right - note the r and t can NOT be the same! */
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/* Shift Right for 32-bit. Clobbers upper 32-bit on PA2.0. */
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.macro shr r, sa, t
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extru \r, 31-(\sa), 32-(\sa), \t
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.endm
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@ -174,6 +174,16 @@
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#endif
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.endm
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/* The depw instruction leaves the most significant 32 bits of the
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* target register in an undefined state on PA 2.0 systems. */
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.macro dep_safe i, p, len, t
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#ifdef CONFIG_64BIT
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depd \i, 32+(\p), \len, \t
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#else
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depw \i, \p, \len, \t
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#endif
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.endm
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/* load 32-bit 'value' into 'reg' compensating for the ldil
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* sign-extension when running in wide mode.
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* WARNING!! neither 'value' nor 'reg' can be expressions
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@ -54,6 +54,7 @@ void parisc_setup_cache_timing(void);
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#define asm_io_sync() asm volatile("sync" \
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ALTERNATIVE(ALT_COND_NO_DCACHE, INSN_NOP) \
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ALTERNATIVE(ALT_COND_NO_IOC_FDC, INSN_NOP) :::"memory")
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#define asm_syncdma() asm volatile("syncdma" :::"memory")
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#endif /* ! __ASSEMBLY__ */
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@ -9,12 +9,27 @@
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*
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* All of the values in this file must be <4GB (because of assembly
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* loading restrictions). If you place this region anywhere above
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* __PAGE_OFFSET, you must adjust the memory map accordingly */
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* __PAGE_OFFSET, you must adjust the memory map accordingly
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*/
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/* The alias region is used in kernel space to do copy/clear to or
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* from areas congruently mapped with user space. It is 8MB large
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* and must be 16MB aligned */
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#define TMPALIAS_MAP_START ((__PAGE_OFFSET) - 16*1024*1024)
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/*
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* The tmpalias region is used in kernel space to copy/clear/flush data
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* from pages congruently mapped with user space. It is comprised of
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* a pair regions. The size of these regions is determined by the largest
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* cache aliasing boundary for machines that support equivalent aliasing.
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*
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* The c3750 with PA8700 processor returns an alias value of 11. This
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* indicates that it has an alias boundary of 4 MB. It also supports
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* non-equivalent aliasing without a performance penalty.
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*
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* Machines with PA8800/PA8900 processors return an alias value of 0.
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* This indicates the alias boundary is unknown and may be larger than
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* 16 MB. Non-equivalent aliasing is not supported.
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*
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* Here we assume the maximum alias boundary is 4 MB.
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*/
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#define TMPALIAS_SIZE_BITS 22 /* 4 MB */
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#define TMPALIAS_MAP_START ((__PAGE_OFFSET) - (2 << TMPALIAS_SIZE_BITS))
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#define FIXMAP_SIZE (FIX_BITMAP_COUNT << PAGE_SHIFT)
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#define FIXMAP_START (TMPALIAS_MAP_START - FIXMAP_SIZE)
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@ -142,7 +142,6 @@ type name(type1 arg1, type2 arg2, type3 arg3, type4 arg4, type5 arg5) \
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}
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#define __ARCH_WANT_NEW_STAT
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#define __ARCH_WANT_OLD_READDIR
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#define __ARCH_WANT_STAT64
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#define __ARCH_WANT_SYS_ALARM
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#define __ARCH_WANT_SYS_GETHOSTNAME
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@ -156,7 +155,6 @@ type name(type1 arg1, type2 arg2, type3 arg3, type4 arg4, type5 arg5) \
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#define __ARCH_WANT_SYS_FADVISE64
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#define __ARCH_WANT_SYS_GETPGRP
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#define __ARCH_WANT_SYS_NICE
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#define __ARCH_WANT_SYS_OLDUMOUNT
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#define __ARCH_WANT_SYS_SIGPENDING
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#define __ARCH_WANT_SYS_SIGPROCMASK
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#define __ARCH_WANT_SYS_FORK
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@ -754,6 +754,9 @@ void invalidate_kernel_vmap_range(void *vaddr, int size)
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unsigned long start = (unsigned long)vaddr;
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unsigned long end = start + size;
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/* Ensure DMA is complete */
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asm_syncdma();
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if ((!IS_ENABLED(CONFIG_SMP) || !arch_irqs_disabled()) &&
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(unsigned long)size >= parisc_cache_flush_threshold) {
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flush_tlb_kernel_range(start, end);
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@ -554,8 +554,9 @@
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extrd,s \pte,63,25,\pte
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.endm
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/* The alias region is an 8MB aligned 16MB to do clear and
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* copy user pages at addresses congruent with the user
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/* The alias region is comprised of a pair of 4 MB regions
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* aligned to 8 MB. It is used to clear/copy/flush user pages
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* using kernel virtual addresses congruent with the user
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* virtual address.
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*
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* To use the alias page, you set %r26 up with the to TLB
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@ -565,13 +566,8 @@
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.macro do_alias spc,tmp,tmp1,va,pte,prot,fault,patype
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cmpib,COND(<>),n 0,\spc,\fault
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ldil L%(TMPALIAS_MAP_START),\tmp
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#if defined(CONFIG_64BIT) && (TMPALIAS_MAP_START >= 0x80000000)
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/* on LP64, ldi will sign extend into the upper 32 bits,
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* which is behaviour we don't want */
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depdi 0,31,32,\tmp
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#endif
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copy \va,\tmp1
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depi 0,31,23,\tmp1
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depi_safe 0,31,TMPALIAS_SIZE_BITS+1,\tmp1
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cmpb,COND(<>),n \tmp,\tmp1,\fault
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mfctl %cr19,\tmp /* iir */
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/* get the opcode (first six bits) into \tmp */
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@ -604,13 +600,13 @@
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* OK, it is in the temp alias region, check whether "from" or "to".
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* Check "subtle" note in pacache.S re: r23/r26.
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*/
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#ifdef CONFIG_64BIT
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extrd,u,*= \va,41,1,%r0
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#else
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extrw,u,= \va,9,1,%r0
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#endif
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extrw,u,= \va,31-TMPALIAS_SIZE_BITS,1,%r0
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or,COND(tr) %r23,%r0,\pte
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or %r26,%r0,\pte
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/* convert phys addr in \pte (from r23 or r26) to tlb insert format */
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SHRREG \pte,PAGE_SHIFT+PAGE_ADD_SHIFT-5, \pte
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depi_safe _PAGE_SIZE_ENCODING_DEFAULT, 31,5, \pte
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.endm
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@ -300,7 +300,6 @@ fdoneloop2:
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fdce,m %arg1(%sr1, %arg0) /* Fdce for one loop */
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fdsync:
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syncdma
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sync
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mtsm %r22 /* restore I-bit */
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89: ALTERNATIVE(88b, 89b, ALT_COND_NO_DCACHE, INSN_NOP)
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@ -488,6 +487,8 @@ ENDPROC_CFI(copy_page_asm)
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* parisc chip designers that there will not ever be a parisc
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* chip with a larger alias boundary (Never say never :-) ).
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*
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* Yah, what about the PA8800 and PA8900 processors?
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*
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* Subtle: the dtlb miss handlers support the temp alias region by
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* "knowing" that if a dtlb miss happens within the temp alias
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* region it must have occurred while in clear_user_page. Since
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@ -499,19 +500,10 @@ ENDPROC_CFI(copy_page_asm)
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* miss on the translation, the dtlb miss handler inserts the
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* translation into the tlb using these values:
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*
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* %r26 physical page (shifted for tlb insert) of "to" translation
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* %r23 physical page (shifted for tlb insert) of "from" translation
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* %r26 physical address of "to" translation
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* %r23 physical address of "from" translation
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*/
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/* Drop prot bits and convert to page addr for iitlbt and idtlbt */
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#define PAGE_ADD_SHIFT (PAGE_SHIFT-12)
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.macro convert_phys_for_tlb_insert20 phys
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extrd,u \phys, 56-PAGE_ADD_SHIFT, 32-PAGE_ADD_SHIFT, \phys
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#if _PAGE_SIZE_ENCODING_DEFAULT
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depdi _PAGE_SIZE_ENCODING_DEFAULT, 63, (63-58), \phys
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#endif
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.endm
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/*
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* copy_user_page_asm() performs a page copy using mappings
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* equivalent to the user page mappings. It can be used to
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@ -540,24 +532,10 @@ ENTRY_CFI(copy_user_page_asm)
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sub %r25, %r1, %r23
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ldil L%(TMPALIAS_MAP_START), %r28
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#ifdef CONFIG_64BIT
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#if (TMPALIAS_MAP_START >= 0x80000000)
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depdi 0, 31,32, %r28 /* clear any sign extension */
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#endif
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convert_phys_for_tlb_insert20 %r26 /* convert phys addr to tlb insert format */
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convert_phys_for_tlb_insert20 %r23 /* convert phys addr to tlb insert format */
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depd %r24,63,22, %r28 /* Form aliased virtual address 'to' */
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depdi 0, 63,PAGE_SHIFT, %r28 /* Clear any offset bits */
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dep_safe %r24, 31,TMPALIAS_SIZE_BITS, %r28 /* Form aliased virtual address 'to' */
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depi_safe 0, 31,PAGE_SHIFT, %r28 /* Clear any offset bits */
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copy %r28, %r29
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depdi 1, 41,1, %r29 /* Form aliased virtual address 'from' */
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#else
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extrw,u %r26, 24,25, %r26 /* convert phys addr to tlb insert format */
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extrw,u %r23, 24,25, %r23 /* convert phys addr to tlb insert format */
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depw %r24, 31,22, %r28 /* Form aliased virtual address 'to' */
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depwi 0, 31,PAGE_SHIFT, %r28 /* Clear any offset bits */
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copy %r28, %r29
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depwi 1, 9,1, %r29 /* Form aliased virtual address 'from' */
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#endif
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depi_safe 1, 31-TMPALIAS_SIZE_BITS,1, %r29 /* Form aliased virtual address 'from' */
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/* Purge any old translations */
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@ -687,18 +665,8 @@ ENTRY_CFI(clear_user_page_asm)
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tophys_r1 %r26
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ldil L%(TMPALIAS_MAP_START), %r28
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#ifdef CONFIG_64BIT
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#if (TMPALIAS_MAP_START >= 0x80000000)
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depdi 0, 31,32, %r28 /* clear any sign extension */
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#endif
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convert_phys_for_tlb_insert20 %r26 /* convert phys addr to tlb insert format */
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depd %r25, 63,22, %r28 /* Form aliased virtual address 'to' */
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depdi 0, 63,PAGE_SHIFT, %r28 /* Clear any offset bits */
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#else
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extrw,u %r26, 24,25, %r26 /* convert phys addr to tlb insert format */
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depw %r25, 31,22, %r28 /* Form aliased virtual address 'to' */
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depwi 0, 31,PAGE_SHIFT, %r28 /* Clear any offset bits */
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#endif
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dep_safe %r25, 31,TMPALIAS_SIZE_BITS, %r28 /* Form aliased virtual address 'to' */
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depi_safe 0, 31,PAGE_SHIFT, %r28 /* Clear any offset bits */
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/* Purge any old translation */
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@ -763,18 +731,8 @@ ENDPROC_CFI(clear_user_page_asm)
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ENTRY_CFI(flush_dcache_page_asm)
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ldil L%(TMPALIAS_MAP_START), %r28
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#ifdef CONFIG_64BIT
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#if (TMPALIAS_MAP_START >= 0x80000000)
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depdi 0, 31,32, %r28 /* clear any sign extension */
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#endif
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convert_phys_for_tlb_insert20 %r26 /* convert phys addr to tlb insert format */
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depd %r25, 63,22, %r28 /* Form aliased virtual address 'to' */
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depdi 0, 63,PAGE_SHIFT, %r28 /* Clear any offset bits */
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#else
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extrw,u %r26, 24,25, %r26 /* convert phys addr to tlb insert format */
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depw %r25, 31,22, %r28 /* Form aliased virtual address 'to' */
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depwi 0, 31,PAGE_SHIFT, %r28 /* Clear any offset bits */
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#endif
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dep_safe %r25, 31,TMPALIAS_SIZE_BITS, %r28 /* Form aliased virtual address 'to' */
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depi_safe 0, 31,PAGE_SHIFT, %r28 /* Clear any offset bits */
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/* Purge any old translation */
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@ -822,18 +780,8 @@ ENDPROC_CFI(flush_dcache_page_asm)
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ENTRY_CFI(purge_dcache_page_asm)
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ldil L%(TMPALIAS_MAP_START), %r28
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#ifdef CONFIG_64BIT
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#if (TMPALIAS_MAP_START >= 0x80000000)
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depdi 0, 31,32, %r28 /* clear any sign extension */
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#endif
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convert_phys_for_tlb_insert20 %r26 /* convert phys addr to tlb insert format */
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depd %r25, 63,22, %r28 /* Form aliased virtual address 'to' */
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depdi 0, 63,PAGE_SHIFT, %r28 /* Clear any offset bits */
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#else
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extrw,u %r26, 24,25, %r26 /* convert phys addr to tlb insert format */
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depw %r25, 31,22, %r28 /* Form aliased virtual address 'to' */
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depwi 0, 31,PAGE_SHIFT, %r28 /* Clear any offset bits */
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#endif
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dep_safe %r25, 31,TMPALIAS_SIZE_BITS, %r28 /* Form aliased virtual address 'to' */
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depi_safe 0, 31,PAGE_SHIFT, %r28 /* Clear any offset bits */
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/* Purge any old translation */
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@ -881,18 +829,8 @@ ENDPROC_CFI(purge_dcache_page_asm)
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ENTRY_CFI(flush_icache_page_asm)
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ldil L%(TMPALIAS_MAP_START), %r28
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#ifdef CONFIG_64BIT
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#if (TMPALIAS_MAP_START >= 0x80000000)
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depdi 0, 31,32, %r28 /* clear any sign extension */
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#endif
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convert_phys_for_tlb_insert20 %r26 /* convert phys addr to tlb insert format */
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depd %r25, 63,22, %r28 /* Form aliased virtual address 'to' */
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depdi 0, 63,PAGE_SHIFT, %r28 /* Clear any offset bits */
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#else
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extrw,u %r26, 24,25, %r26 /* convert phys addr to tlb insert format */
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depw %r25, 31,22, %r28 /* Form aliased virtual address 'to' */
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depwi 0, 31,PAGE_SHIFT, %r28 /* Clear any offset bits */
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#endif
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dep_safe %r25, 31,TMPALIAS_SIZE_BITS, %r28 /* Form aliased virtual address 'to' */
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depi_safe 0, 31,PAGE_SHIFT, %r28 /* Clear any offset bits */
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/* Purge any old translation. Note that the FIC instruction
|
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* may use either the instruction or data TLB. Given that we
|
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@ -1098,7 +1036,6 @@ ENTRY_CFI(flush_kernel_dcache_range_asm)
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sync
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89: ALTERNATIVE(88b, 89b, ALT_COND_NO_DCACHE, INSN_NOP)
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syncdma
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bv %r0(%r2)
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nop
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ENDPROC_CFI(flush_kernel_dcache_range_asm)
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@ -1140,7 +1077,6 @@ ENTRY_CFI(purge_kernel_dcache_range_asm)
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sync
|
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89: ALTERNATIVE(88b, 89b, ALT_COND_NO_DCACHE, INSN_NOP)
|
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syncdma
|
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bv %r0(%r2)
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nop
|
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ENDPROC_CFI(purge_kernel_dcache_range_asm)
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|
|
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@ -555,6 +555,12 @@ void __init mem_init(void)
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BUILD_BUG_ON(PT_INITIAL > PTRS_PER_PGD);
|
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#endif
|
||||
|
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#ifdef CONFIG_64BIT
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/* avoid ldil_%L() asm statements to sign-extend into upper 32-bits */
|
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BUILD_BUG_ON(__PAGE_OFFSET >= 0x80000000);
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BUILD_BUG_ON(TMPALIAS_MAP_START >= 0x80000000);
|
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#endif
|
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|
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high_memory = __va((max_pfn << PAGE_SHIFT));
|
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set_max_mapnr(max_low_pfn);
|
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memblock_free_all();
|
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|
|
|
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@ -549,6 +549,26 @@ sti_select_fbfont(struct sti_cooked_rom *cooked_rom, const char *fbfont_name)
|
|||
}
|
||||
#endif
|
||||
|
||||
static void sti_dump_font(struct sti_cooked_font *font)
|
||||
{
|
||||
#ifdef STI_DUMP_FONT
|
||||
unsigned char *p = (unsigned char *)font->raw;
|
||||
int n;
|
||||
|
||||
p += sizeof(struct sti_rom_font);
|
||||
pr_debug(" w %d h %d bpc %d\n", font->width, font->height,
|
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font->raw->bytes_per_char);
|
||||
|
||||
for (n = 0; n < 256 * font->raw->bytes_per_char; n += 16, p += 16) {
|
||||
pr_debug(" 0x%02x, 0x%02x, 0x%02x, 0x%02x, 0x%02x, 0x%02x,"
|
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" 0x%02x, 0x%02x, 0x%02x, 0x%02x, 0x%02x, 0x%02x,"
|
||||
" 0x%02x, 0x%02x, 0x%02x, 0x%02x,\n",
|
||||
p[0], p[1], p[2], p[3], p[4], p[5], p[6], p[7], p[8],
|
||||
p[9], p[10], p[11], p[12], p[13], p[14], p[15]);
|
||||
}
|
||||
#endif
|
||||
}
|
||||
|
||||
static int sti_search_font(struct sti_cooked_rom *rom, int height, int width)
|
||||
{
|
||||
struct sti_cooked_font *font;
|
||||
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@ -796,6 +816,7 @@ static int sti_read_rom(int wordmode, struct sti_struct *sti,
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sti->font->width = sti->font->raw->width;
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sti->font->height = sti->font->raw->height;
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sti_font_convert_bytemode(sti, sti->font);
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sti_dump_font(sti->font);
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sti->sti_mem_request = raw->sti_mem_req;
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sti->graphics_id[0] = raw->graphics_id[0];
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