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ARM: imx: Remove i.MX35 board files 

i.MX35 has basic device tree support.

To achieve the goal of converting all i.MX SoCs to a
devicetree-only platform, remove imx35 board files.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This commit is contained in:
Fabio Estevam 2020-09-02 09:49:51 -03:00 коммит произвёл Shawn Guo
Родитель c93197b004
Коммит e1324ece2a
7 изменённых файлов: 10 добавлений и 1310 удалений
Показать статистику Скачать Patch файл Скачать Diff файл Показать все файлы Свернуть все файлы

5
arch/arm/configs/imx_v6_v7_defconfig
Просмотреть файл

@ -15,11 +15,8 @@ CONFIG_PERF_EVENTS=y
# CONFIG_COMPAT_BRK is not set
CONFIG_ARCH_MULTI_V6=y
CONFIG_ARCH_MXC=y
CONFIG_MACH_IMX35_DT=y
CONFIG_MACH_PCM043=y
CONFIG_MACH_MX35_3DS=y
CONFIG_MACH_VPR200=y
CONFIG_SOC_IMX31=y
CONFIG_SOC_IMX35=y
CONFIG_SOC_IMX50=y
CONFIG_SOC_IMX51=y
CONFIG_SOC_IMX53=y

73
arch/arm/mach-imx/Kconfig
Просмотреть файл

@ -53,14 +53,10 @@ config IMX_HAVE_IOMUX_V1
config ARCH_MXC_IOMUX_V3
bool
config SOC_IMX35
bool
select ARCH_MXC_IOMUX_V3
select MXC_AVIC
select PINCTRL_IMX35
if ARCH_MULTI_V6
comment "ARM1136 platforms"
config SOC_IMX31
bool "i.MX31 support"
select CPU_V6
@ -68,66 +64,13 @@ config SOC_IMX31
help
This enables support for Freescale i.MX31 processor
comment "MX35 platforms:"
config MACH_IMX35_DT
bool "Support i.MX35 platforms from device tree"
select SOC_IMX35
config SOC_IMX35
bool "i.MX35 support"
select ARCH_MXC_IOMUX_V3
select MXC_AVIC
select PINCTRL_IMX35
help
Include support for Freescale i.MX35 based platforms
using the device tree for discovery.
config MACH_PCM043
bool "Support Phytec pcm043 (i.MX35) platforms"
select IMX_HAVE_PLATFORM_FLEXCAN
select IMX_HAVE_PLATFORM_FSL_USB2_UDC
select IMX_HAVE_PLATFORM_IMX2_WDT
select IMX_HAVE_PLATFORM_IMX_I2C
select IMX_HAVE_PLATFORM_IMX_SSI
select IMX_HAVE_PLATFORM_IMX_UART
select IMX_HAVE_PLATFORM_IPU_CORE
select IMX_HAVE_PLATFORM_MXC_EHCI
select IMX_HAVE_PLATFORM_MXC_NAND
select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX
select USB_ULPI_VIEWPORT if USB_ULPI
select SOC_IMX35
help
Include support for Phytec pcm043 platform. This includes
specific configurations for the board and its peripherals.
config MACH_MX35_3DS
bool "Support MX35PDK platform"
select IMX_HAVE_PLATFORM_FSL_USB2_UDC
select IMX_HAVE_PLATFORM_IMX2_WDT
select IMX_HAVE_PLATFORM_IMX_FB
select IMX_HAVE_PLATFORM_IMX_I2C
select IMX_HAVE_PLATFORM_IMX_UART
select IMX_HAVE_PLATFORM_IPU_CORE
select IMX_HAVE_PLATFORM_MXC_EHCI
select IMX_HAVE_PLATFORM_MXC_NAND
select IMX_HAVE_PLATFORM_MXC_RTC
select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX
select MXC_DEBUG_BOARD
select SOC_IMX35
help
Include support for MX35PDK platform. This includes specific
configurations for the board and its peripherals.
config MACH_VPR200
bool "Support VPR200 platform"
select IMX_HAVE_PLATFORM_FSL_USB2_UDC
select IMX_HAVE_PLATFORM_GPIO_KEYS
select IMX_HAVE_PLATFORM_IMX2_WDT
select IMX_HAVE_PLATFORM_IMX_I2C
select IMX_HAVE_PLATFORM_IMX_UART
select IMX_HAVE_PLATFORM_IPU_CORE
select IMX_HAVE_PLATFORM_MXC_EHCI
select IMX_HAVE_PLATFORM_MXC_NAND
select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX
select SOC_IMX35
help
Include support for VPR200 platform. This includes specific
configurations for the board and its peripherals.
This enables support for Freescale i.MX31 processor
endif

8
arch/arm/mach-imx/Makefile
Просмотреть файл

@ -7,7 +7,7 @@ obj-$(CONFIG_SOC_IMX27) += cpu-imx27.o pm-imx27.o mach-imx27.o
obj-$(CONFIG_SOC_IMX27) += mm-imx27.o ehci-imx27.o
obj-$(CONFIG_SOC_IMX31) += mm-imx3.o cpu-imx31.o iomux-imx31.o ehci-imx31.o mach-imx31.o
obj-$(CONFIG_SOC_IMX35) += mm-imx3.o cpu-imx35.o ehci-imx35.o
obj-$(CONFIG_SOC_IMX35) += mm-imx3.o cpu-imx35.o ehci-imx35.o mach-imx35.o
imx5-pm-$(CONFIG_PM) += pm-imx5.o
obj-$(CONFIG_SOC_IMX5) += cpu-imx5.o $(imx5-pm-y)
@ -35,12 +35,6 @@ obj-y += ssi-fiq.o
obj-y += ssi-fiq-ksym.o
endif
# i.MX35 based machines
obj-$(CONFIG_MACH_PCM043) += mach-pcm043.o
obj-$(CONFIG_MACH_MX35_3DS) += mach-mx35_3ds.o
obj-$(CONFIG_MACH_VPR200) += mach-vpr200.o
obj-$(CONFIG_MACH_IMX35_DT) += imx35-dt.o
obj-$(CONFIG_HAVE_IMX_ANATOP) += anatop.o
obj-$(CONFIG_HAVE_IMX_GPC) += gpc.o
obj-$(CONFIG_HAVE_IMX_MMDC) += mmdc.o

0
arch/arm/mach-imx/imx35-dt.c → arch/arm/mach-imx/mach-imx35.c
Просмотреть файл

516
arch/arm/mach-imx/mach-mx35_3ds.c
Просмотреть файл

@ -1,516 +0,0 @@
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* Copyright 2009 Freescale Semiconductor, Inc. All Rights Reserved.
* Copyright (C) 2009 Marc Kleine-Budde, Pengutronix
*
* Author: Fabio Estevam <fabio.estevam@freescale.com>
*
* Copyright (C) 2011 Meprolight, Ltd.
* Alex Gershgorin <alexg@meprolight.com>
*
* Modified from i.MX31 3-Stack Development System
*/
/*
* This machine is known as:
* - i.MX35 3-Stack Development System
* - i.MX35 Platform Development Kit (i.MX35 PDK)
*/
#include <linux/types.h>
#include <linux/init.h>
#include <linux/platform_device.h>
#include <linux/memory.h>
#include <linux/gpio.h>
#include <linux/usb/otg.h>
#include <linux/mtd/physmap.h>
#include <linux/mfd/mc13892.h>
#include <linux/regulator/machine.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/time.h>
#include <asm/mach/map.h>
#include <video/platform_lcd.h>
#include "3ds_debugboard.h"
#include "common.h"
#include "devices-imx35.h"
#include "ehci.h"
#include "hardware.h"
#include "iomux-mx35.h"
#define GPIO_MC9S08DZ60_GPS_ENABLE 0
#define GPIO_MC9S08DZ60_HDD_ENABLE 4
#define GPIO_MC9S08DZ60_WIFI_ENABLE 5
#define GPIO_MC9S08DZ60_LCD_ENABLE 6
#define GPIO_MC9S08DZ60_SPEAKER_ENABLE 8
static const struct fb_videomode fb_modedb[] = {
{
/* 800x480 @ 55 Hz */
.name = "Ceramate-CLAA070VC01",
.refresh = 55,
.xres = 800,
.yres = 480,
.pixclock = 40000,
.left_margin = 40,
.right_margin = 40,
.upper_margin = 5,
.lower_margin = 5,
.hsync_len = 20,
.vsync_len = 10,
.sync = FB_SYNC_OE_ACT_HIGH,
.vmode = FB_VMODE_NONINTERLACED,
.flag = 0,
},
};
static struct mx3fb_platform_data mx3fb_pdata __initdata = {
.name = "Ceramate-CLAA070VC01",
.mode = fb_modedb,
.num_modes = ARRAY_SIZE(fb_modedb),
};
static struct i2c_board_info __initdata i2c_devices_3ds[] = {
{
I2C_BOARD_INFO("mc9s08dz60", 0x69),
},
};
static int lcd_power_gpio = -ENXIO;
static int mc9s08dz60_gpiochip_match(struct gpio_chip *chip, void *data)
{
return !strcmp(chip->label, data);
}
static void mx35_3ds_lcd_set_power(
struct plat_lcd_data *pd, unsigned int power)
{
struct gpio_chip *chip;
if (!gpio_is_valid(lcd_power_gpio)) {
chip = gpiochip_find(
"mc9s08dz60", mc9s08dz60_gpiochip_match);
if (chip) {
lcd_power_gpio =
chip->base + GPIO_MC9S08DZ60_LCD_ENABLE;
if (gpio_request(lcd_power_gpio, "lcd_power") < 0) {
pr_err("error: gpio already requested!\n");
lcd_power_gpio = -ENXIO;
}
} else {
pr_err("error: didn't find mc9s08dz60 gpio chip\n");
}
}
if (gpio_is_valid(lcd_power_gpio))
gpio_set_value_cansleep(lcd_power_gpio, power);
}
static struct plat_lcd_data mx35_3ds_lcd_data = {
.set_power = mx35_3ds_lcd_set_power,
};
static struct platform_device mx35_3ds_lcd = {
.name = "platform-lcd",
.dev.platform_data = &mx35_3ds_lcd_data,
};
static const struct imxuart_platform_data uart_pdata __initconst = {
.flags = IMXUART_HAVE_RTSCTS,
};
static struct physmap_flash_data mx35pdk_flash_data = {
.width = 2,
};
static struct resource mx35pdk_flash_resource = {
.start = MX35_CS0_BASE_ADDR,
.end = MX35_CS0_BASE_ADDR + SZ_64M - 1,
.flags = IORESOURCE_MEM,
};
static struct platform_device mx35pdk_flash = {
.name = "physmap-flash",
.id = 0,
.dev = {
.platform_data = &mx35pdk_flash_data,
},
.resource = &mx35pdk_flash_resource,
.num_resources = 1,
};
static const struct mxc_nand_platform_data mx35pdk_nand_board_info __initconst = {
.width = 1,
.hw_ecc = 1,
.flash_bbt = 1,
};
static struct platform_device *devices[] __initdata = {
&mx35pdk_flash,
};
static const iomux_v3_cfg_t mx35pdk_pads[] __initconst = {
/* UART1 */
MX35_PAD_CTS1__UART1_CTS,
MX35_PAD_RTS1__UART1_RTS,
MX35_PAD_TXD1__UART1_TXD_MUX,
MX35_PAD_RXD1__UART1_RXD_MUX,
/* FEC */
MX35_PAD_FEC_TX_CLK__FEC_TX_CLK,
MX35_PAD_FEC_RX_CLK__FEC_RX_CLK,
MX35_PAD_FEC_RX_DV__FEC_RX_DV,
MX35_PAD_FEC_COL__FEC_COL,
MX35_PAD_FEC_RDATA0__FEC_RDATA_0,
MX35_PAD_FEC_TDATA0__FEC_TDATA_0,
MX35_PAD_FEC_TX_EN__FEC_TX_EN,
MX35_PAD_FEC_MDC__FEC_MDC,
MX35_PAD_FEC_MDIO__FEC_MDIO,
MX35_PAD_FEC_TX_ERR__FEC_TX_ERR,
MX35_PAD_FEC_RX_ERR__FEC_RX_ERR,
MX35_PAD_FEC_CRS__FEC_CRS,
MX35_PAD_FEC_RDATA1__FEC_RDATA_1,
MX35_PAD_FEC_TDATA1__FEC_TDATA_1,
MX35_PAD_FEC_RDATA2__FEC_RDATA_2,
MX35_PAD_FEC_TDATA2__FEC_TDATA_2,
MX35_PAD_FEC_RDATA3__FEC_RDATA_3,
MX35_PAD_FEC_TDATA3__FEC_TDATA_3,
/* USBOTG */
MX35_PAD_USBOTG_PWR__USB_TOP_USBOTG_PWR,
MX35_PAD_USBOTG_OC__USB_TOP_USBOTG_OC,
/* USBH1 */
MX35_PAD_I2C2_CLK__USB_TOP_USBH2_PWR,
MX35_PAD_I2C2_DAT__USB_TOP_USBH2_OC,
/* SDCARD */
MX35_PAD_SD1_CMD__ESDHC1_CMD,
MX35_PAD_SD1_CLK__ESDHC1_CLK,
MX35_PAD_SD1_DATA0__ESDHC1_DAT0,
MX35_PAD_SD1_DATA1__ESDHC1_DAT1,
MX35_PAD_SD1_DATA2__ESDHC1_DAT2,
MX35_PAD_SD1_DATA3__ESDHC1_DAT3,
/* I2C1 */
MX35_PAD_I2C1_CLK__I2C1_SCL,
MX35_PAD_I2C1_DAT__I2C1_SDA,
/* Display */
MX35_PAD_LD0__IPU_DISPB_DAT_0,
MX35_PAD_LD1__IPU_DISPB_DAT_1,
MX35_PAD_LD2__IPU_DISPB_DAT_2,
MX35_PAD_LD3__IPU_DISPB_DAT_3,
MX35_PAD_LD4__IPU_DISPB_DAT_4,
MX35_PAD_LD5__IPU_DISPB_DAT_5,
MX35_PAD_LD6__IPU_DISPB_DAT_6,
MX35_PAD_LD7__IPU_DISPB_DAT_7,
MX35_PAD_LD8__IPU_DISPB_DAT_8,
MX35_PAD_LD9__IPU_DISPB_DAT_9,
MX35_PAD_LD10__IPU_DISPB_DAT_10,
MX35_PAD_LD11__IPU_DISPB_DAT_11,
MX35_PAD_LD12__IPU_DISPB_DAT_12,
MX35_PAD_LD13__IPU_DISPB_DAT_13,
MX35_PAD_LD14__IPU_DISPB_DAT_14,
MX35_PAD_LD15__IPU_DISPB_DAT_15,
MX35_PAD_LD16__IPU_DISPB_DAT_16,
MX35_PAD_LD17__IPU_DISPB_DAT_17,
MX35_PAD_D3_HSYNC__IPU_DISPB_D3_HSYNC,
MX35_PAD_D3_FPSHIFT__IPU_DISPB_D3_CLK,
MX35_PAD_D3_DRDY__IPU_DISPB_D3_DRDY,
MX35_PAD_CONTRAST__IPU_DISPB_CONTR,
MX35_PAD_D3_VSYNC__IPU_DISPB_D3_VSYNC,
MX35_PAD_D3_REV__IPU_DISPB_D3_REV,
MX35_PAD_D3_CLS__IPU_DISPB_D3_CLS,
/*PMIC IRQ*/
MX35_PAD_GPIO2_0__GPIO2_0,
};
static struct regulator_consumer_supply sw1_consumers[] = {
{
.supply = "cpu_vcc",
}
};
static struct regulator_consumer_supply vcam_consumers[] = {
/* sgtl5000 */
REGULATOR_SUPPLY("VDDA", "0-000a"),
};
static struct regulator_init_data sw1_init = {
.constraints = {
.name = "SW1",
.min_uV = 600000,
.max_uV = 1375000,
.valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
.valid_modes_mask = 0,
.always_on = 1,
.boot_on = 1,
},
.num_consumer_supplies = ARRAY_SIZE(sw1_consumers),
.consumer_supplies = sw1_consumers,
};
static struct regulator_init_data sw2_init = {
.constraints = {
.name = "SW2",
.always_on = 1,
.boot_on = 1,
}
};
static struct regulator_init_data sw3_init = {
.constraints = {
.name = "SW3",
.always_on = 1,
.boot_on = 1,
}
};
static struct regulator_init_data sw4_init = {
.constraints = {
.name = "SW4",
.always_on = 1,
.boot_on = 1,
}
};
static struct regulator_init_data viohi_init = {
.constraints = {
.name = "VIOHI",
.boot_on = 1,
}
};
static struct regulator_init_data vusb_init = {
.constraints = {
.name = "VUSB",
.boot_on = 1,
}
};
static struct regulator_init_data vdig_init = {
.constraints = {
.name = "VDIG",
.boot_on = 1,
}
};
static struct regulator_init_data vpll_init = {
.constraints = {
.name = "VPLL",
.boot_on = 1,
}
};
static struct regulator_init_data vusb2_init = {
.constraints = {
.name = "VUSB2",
.boot_on = 1,
}
};
static struct regulator_init_data vvideo_init = {
.constraints = {
.name = "VVIDEO",
.boot_on = 1
}
};
static struct regulator_init_data vcam_init = {
.constraints = {
.name = "VCAM",
.min_uV = 2500000,
.max_uV = 3000000,
.valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
REGULATOR_CHANGE_MODE,
.valid_modes_mask = REGULATOR_MODE_FAST | REGULATOR_MODE_NORMAL,
.boot_on = 1
},
.num_consumer_supplies = ARRAY_SIZE(vcam_consumers),
.consumer_supplies = vcam_consumers,
};
static struct regulator_init_data vgen1_init = {
.constraints = {
.name = "VGEN1",
}
};
static struct regulator_init_data vgen2_init = {
.constraints = {
.name = "VGEN2",
.boot_on = 1,
}
};
static struct regulator_init_data vgen3_init = {
.constraints = {
.name = "VGEN3",
}
};
static struct mc13xxx_regulator_init_data mx35_3ds_regulators[] = {
{ .id = MC13892_SW1, .init_data = &sw1_init },
{ .id = MC13892_SW2, .init_data = &sw2_init },
{ .id = MC13892_SW3, .init_data = &sw3_init },
{ .id = MC13892_SW4, .init_data = &sw4_init },
{ .id = MC13892_VIOHI, .init_data = &viohi_init },
{ .id = MC13892_VPLL, .init_data = &vpll_init },
{ .id = MC13892_VDIG, .init_data = &vdig_init },
{ .id = MC13892_VUSB2, .init_data = &vusb2_init },
{ .id = MC13892_VVIDEO, .init_data = &vvideo_init },
{ .id = MC13892_VCAM, .init_data = &vcam_init },
{ .id = MC13892_VGEN1, .init_data = &vgen1_init },
{ .id = MC13892_VGEN2, .init_data = &vgen2_init },
{ .id = MC13892_VGEN3, .init_data = &vgen3_init },
{ .id = MC13892_VUSB, .init_data = &vusb_init },
};
static struct mc13xxx_platform_data mx35_3ds_mc13892_data = {
.flags = MC13XXX_USE_RTC | MC13XXX_USE_TOUCHSCREEN,
.regulators = {
.num_regulators = ARRAY_SIZE(mx35_3ds_regulators),
.regulators = mx35_3ds_regulators,
},
};
#define GPIO_PMIC_INT IMX_GPIO_NR(2, 0)
static struct i2c_board_info mx35_3ds_i2c_mc13892 = {
I2C_BOARD_INFO("mc13892", 0x08),
.platform_data = &mx35_3ds_mc13892_data,
/* irq number is run-time assigned */
};
static void __init imx35_3ds_init_mc13892(void)
{
int ret = gpio_request_one(GPIO_PMIC_INT, GPIOF_DIR_IN, "pmic irq");
if (ret) {
pr_err("failed to get pmic irq: %d\n", ret);
return;
}
mx35_3ds_i2c_mc13892.irq = gpio_to_irq(GPIO_PMIC_INT);
i2c_register_board_info(0, &mx35_3ds_i2c_mc13892, 1);
}
static int mx35_3ds_otg_init(struct platform_device *pdev)
{
return mx35_initialize_usb_hw(pdev->id, MXC_EHCI_INTERNAL_PHY);
}
/* OTG config */
static const struct fsl_usb2_platform_data usb_otg_pdata __initconst = {
.operating_mode = FSL_USB2_DR_DEVICE,
.phy_mode = FSL_USB2_PHY_UTMI_WIDE,
.workaround = FLS_USB2_WORKAROUND_ENGCM09152,
/*
* ENGCM09152 also requires a hardware change.
* Please check the MX35 Chip Errata document for details.
*/
};
static struct mxc_usbh_platform_data otg_pdata __initdata = {
.init = mx35_3ds_otg_init,
.portsc = MXC_EHCI_MODE_UTMI,
};
static int mx35_3ds_usbh_init(struct platform_device *pdev)
{
return mx35_initialize_usb_hw(pdev->id, MXC_EHCI_INTERFACE_SINGLE_UNI |
MXC_EHCI_INTERNAL_PHY);
}
/* USB HOST config */
static const struct mxc_usbh_platform_data usb_host_pdata __initconst = {
.init = mx35_3ds_usbh_init,
.portsc = MXC_EHCI_MODE_SERIAL,
};
static bool otg_mode_host __initdata;
static int __init mx35_3ds_otg_mode(char *options)
{
if (!strcmp(options, "host"))
otg_mode_host = true;
else if (!strcmp(options, "device"))
otg_mode_host = false;
else
pr_info("otg_mode neither \"host\" nor \"device\". "
"Defaulting to device\n");
return 1;
}
__setup("otg_mode=", mx35_3ds_otg_mode);
static const struct imxi2c_platform_data mx35_3ds_i2c0_data __initconst = {
.bitrate = 100000,
};
/*
* Board specific initialization.
*/
static void __init mx35_3ds_init(void)
{
imx35_soc_init();
mxc_iomux_v3_setup_multiple_pads(mx35pdk_pads, ARRAY_SIZE(mx35pdk_pads));
imx35_add_fec(NULL);
imx35_add_imx2_wdt();
imx35_add_mxc_rtc();
platform_add_devices(devices, ARRAY_SIZE(devices));
imx35_add_imx_uart0(&uart_pdata);
if (otg_mode_host)
imx35_add_mxc_ehci_otg(&otg_pdata);
imx35_add_mxc_ehci_hs(&usb_host_pdata);
if (!otg_mode_host)
imx35_add_fsl_usb2_udc(&usb_otg_pdata);
imx35_add_mxc_nand(&mx35pdk_nand_board_info);
imx35_add_sdhci_esdhc_imx(0, NULL);
imx35_add_imx_i2c0(&mx35_3ds_i2c0_data);
i2c_register_board_info(
0, i2c_devices_3ds, ARRAY_SIZE(i2c_devices_3ds));
imx35_add_ipu_core();
}
static void __init mx35_3ds_late_init(void)
{
struct platform_device *imx35_fb_pdev;
if (mxc_expio_init(MX35_CS5_BASE_ADDR, IMX_GPIO_NR(1, 1)))
pr_warn("Init of the debugboard failed, all "
"devices on the debugboard are unusable.\n");
imx35_fb_pdev = imx35_add_mx3_sdc_fb(&mx3fb_pdata);
mx35_3ds_lcd.dev.parent = &imx35_fb_pdev->dev;
platform_device_register(&mx35_3ds_lcd);
imx35_3ds_init_mc13892();
}
static void __init mx35pdk_timer_init(void)
{
mx35_clocks_init();
}
MACHINE_START(MX35_3DS, "Freescale MX35PDK")
/* Maintainer: Freescale Semiconductor, Inc */
.atag_offset = 0x100,
.map_io = mx35_map_io,
.init_early = imx35_init_early,
.init_irq = mx35_init_irq,
.init_time = mx35pdk_timer_init,
.init_machine = mx35_3ds_init,
.init_late = mx35_3ds_late_init,
.restart = mxc_restart,
MACHINE_END

412
arch/arm/mach-imx/mach-pcm043.c
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// SPDX-License-Identifier: GPL-2.0-or-later
/*
* Copyright (C) 2009 Sascha Hauer, Pengutronix
*/
#include <linux/types.h>
#include <linux/init.h>
#include <linux/platform_device.h>
#include <linux/mtd/physmap.h>
#include <linux/mtd/plat-ram.h>
#include <linux/memory.h>
#include <linux/gpio.h>
#include <linux/gpio/machine.h>
#include <linux/smc911x.h>
#include <linux/interrupt.h>
#include <linux/delay.h>
#include <linux/i2c.h>
#include <linux/property.h>
#include <linux/usb/otg.h>
#include <linux/usb/ulpi.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/time.h>
#include <asm/mach/map.h>
#include "common.h"
#include "devices-imx35.h"
#include "ehci.h"
#include "hardware.h"
#include "iomux-mx35.h"
#include "ulpi.h"
static const struct fb_videomode fb_modedb[] = {
{
/* 240x320 @ 60 Hz */
.name = "Sharp-LQ035Q7",
.refresh = 60,
.xres = 240,
.yres = 320,
.pixclock = 185925,
.left_margin = 9,
.right_margin = 16,
.upper_margin = 7,
.lower_margin = 9,
.hsync_len = 1,
.vsync_len = 1,
.sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_SHARP_MODE | FB_SYNC_CLK_INVERT | FB_SYNC_CLK_IDLE_EN,
.vmode = FB_VMODE_NONINTERLACED,
.flag = 0,
}, {
/* 240x320 @ 60 Hz */
.name = "TX090",
.refresh = 60,
.xres = 240,
.yres = 320,
.pixclock = 38255,
.left_margin = 144,
.right_margin = 0,
.upper_margin = 7,
.lower_margin = 40,
.hsync_len = 96,
.vsync_len = 1,
.sync = FB_SYNC_VERT_HIGH_ACT | FB_SYNC_OE_ACT_HIGH,
.vmode = FB_VMODE_NONINTERLACED,
.flag = 0,
},
};
static struct mx3fb_platform_data mx3fb_pdata __initdata = {
.name = "Sharp-LQ035Q7",
.mode = fb_modedb,
.num_modes = ARRAY_SIZE(fb_modedb),
};
static struct physmap_flash_data pcm043_flash_data = {
.width = 2,
};
static struct resource pcm043_flash_resource = {
.start = 0xa0000000,
.end = 0xa1ffffff,
.flags = IORESOURCE_MEM,
};
static struct platform_device pcm043_flash = {
.name = "physmap-flash",
.id = 0,
.dev = {
.platform_data = &pcm043_flash_data,
},
.resource = &pcm043_flash_resource,
.num_resources = 1,
};
static const struct imxuart_platform_data uart_pdata __initconst = {
.flags = IMXUART_HAVE_RTSCTS,
};
static const struct imxi2c_platform_data pcm043_i2c0_data __initconst = {
.bitrate = 50000,
};
static const struct property_entry board_eeprom_properties[] = {
PROPERTY_ENTRY_U32("pagesize", 32),
{ }
};
static struct i2c_board_info pcm043_i2c_devices[] = {
{
I2C_BOARD_INFO("24c32", 0x52), /* E0=0, E1=1, E2=0 */
.properties = board_eeprom_properties,
}, {
I2C_BOARD_INFO("pcf8563", 0x51),
},
};
static struct platform_device *devices[] __initdata = {
&pcm043_flash,
};
static const iomux_v3_cfg_t pcm043_pads[] __initconst = {
/* UART1 */
MX35_PAD_CTS1__UART1_CTS,
MX35_PAD_RTS1__UART1_RTS,
MX35_PAD_TXD1__UART1_TXD_MUX,
MX35_PAD_RXD1__UART1_RXD_MUX,
/* UART2 */
MX35_PAD_CTS2__UART2_CTS,
MX35_PAD_RTS2__UART2_RTS,
MX35_PAD_TXD2__UART2_TXD_MUX,
MX35_PAD_RXD2__UART2_RXD_MUX,
/* FEC */
MX35_PAD_FEC_TX_CLK__FEC_TX_CLK,
MX35_PAD_FEC_RX_CLK__FEC_RX_CLK,
MX35_PAD_FEC_RX_DV__FEC_RX_DV,
MX35_PAD_FEC_COL__FEC_COL,
MX35_PAD_FEC_RDATA0__FEC_RDATA_0,
MX35_PAD_FEC_TDATA0__FEC_TDATA_0,
MX35_PAD_FEC_TX_EN__FEC_TX_EN,
MX35_PAD_FEC_MDC__FEC_MDC,
MX35_PAD_FEC_MDIO__FEC_MDIO,
MX35_PAD_FEC_TX_ERR__FEC_TX_ERR,
MX35_PAD_FEC_RX_ERR__FEC_RX_ERR,
MX35_PAD_FEC_CRS__FEC_CRS,
MX35_PAD_FEC_RDATA1__FEC_RDATA_1,
MX35_PAD_FEC_TDATA1__FEC_TDATA_1,
MX35_PAD_FEC_RDATA2__FEC_RDATA_2,
MX35_PAD_FEC_TDATA2__FEC_TDATA_2,
MX35_PAD_FEC_RDATA3__FEC_RDATA_3,
MX35_PAD_FEC_TDATA3__FEC_TDATA_3,
/* I2C1 */
MX35_PAD_I2C1_CLK__I2C1_SCL,
MX35_PAD_I2C1_DAT__I2C1_SDA,
/* Display */
MX35_PAD_LD0__IPU_DISPB_DAT_0,
MX35_PAD_LD1__IPU_DISPB_DAT_1,
MX35_PAD_LD2__IPU_DISPB_DAT_2,
MX35_PAD_LD3__IPU_DISPB_DAT_3,
MX35_PAD_LD4__IPU_DISPB_DAT_4,
MX35_PAD_LD5__IPU_DISPB_DAT_5,
MX35_PAD_LD6__IPU_DISPB_DAT_6,
MX35_PAD_LD7__IPU_DISPB_DAT_7,
MX35_PAD_LD8__IPU_DISPB_DAT_8,
MX35_PAD_LD9__IPU_DISPB_DAT_9,
MX35_PAD_LD10__IPU_DISPB_DAT_10,
MX35_PAD_LD11__IPU_DISPB_DAT_11,
MX35_PAD_LD12__IPU_DISPB_DAT_12,
MX35_PAD_LD13__IPU_DISPB_DAT_13,
MX35_PAD_LD14__IPU_DISPB_DAT_14,
MX35_PAD_LD15__IPU_DISPB_DAT_15,
MX35_PAD_LD16__IPU_DISPB_DAT_16,
MX35_PAD_LD17__IPU_DISPB_DAT_17,
MX35_PAD_D3_HSYNC__IPU_DISPB_D3_HSYNC,
MX35_PAD_D3_FPSHIFT__IPU_DISPB_D3_CLK,
MX35_PAD_D3_DRDY__IPU_DISPB_D3_DRDY,
MX35_PAD_CONTRAST__IPU_DISPB_CONTR,
MX35_PAD_D3_VSYNC__IPU_DISPB_D3_VSYNC,
MX35_PAD_D3_REV__IPU_DISPB_D3_REV,
MX35_PAD_D3_CLS__IPU_DISPB_D3_CLS,
/* gpio */
MX35_PAD_ATA_CS0__GPIO2_6,
/* USB host */
MX35_PAD_I2C2_CLK__USB_TOP_USBH2_PWR,
MX35_PAD_I2C2_DAT__USB_TOP_USBH2_OC,
/* SSI */
MX35_PAD_STXFS4__AUDMUX_AUD4_TXFS,
MX35_PAD_STXD4__AUDMUX_AUD4_TXD,
MX35_PAD_SRXD4__AUDMUX_AUD4_RXD,
MX35_PAD_SCK4__AUDMUX_AUD4_TXC,
/* CAN2 */
MX35_PAD_TX5_RX0__CAN2_TXCAN,
MX35_PAD_TX4_RX1__CAN2_RXCAN,
/* esdhc */
MX35_PAD_SD1_CMD__ESDHC1_CMD,
MX35_PAD_SD1_CLK__ESDHC1_CLK,
MX35_PAD_SD1_DATA0__ESDHC1_DAT0,
MX35_PAD_SD1_DATA1__ESDHC1_DAT1,
MX35_PAD_SD1_DATA2__ESDHC1_DAT2,
MX35_PAD_SD1_DATA3__ESDHC1_DAT3,
MX35_PAD_ATA_DATA10__GPIO2_23, /* WriteProtect */
MX35_PAD_ATA_DATA11__GPIO2_24, /* CardDetect */
};
#define AC97_GPIO_TXFS IMX_GPIO_NR(2, 31)
#define AC97_GPIO_TXD IMX_GPIO_NR(2, 28)
#define AC97_GPIO_RESET IMX_GPIO_NR(2, 0)
static void pcm043_ac97_warm_reset(struct snd_ac97 *ac97)
{
iomux_v3_cfg_t txfs_gpio = MX35_PAD_STXFS4__GPIO2_31;
iomux_v3_cfg_t txfs = MX35_PAD_STXFS4__AUDMUX_AUD4_TXFS;
int ret;
ret = gpio_request(AC97_GPIO_TXFS, "SSI");
if (ret) {
printk("failed to get GPIO_TXFS: %d\n", ret);
return;
}
mxc_iomux_v3_setup_pad(txfs_gpio);
/* warm reset */
gpio_direction_output(AC97_GPIO_TXFS, 1);
udelay(2);
gpio_set_value(AC97_GPIO_TXFS, 0);
gpio_free(AC97_GPIO_TXFS);
mxc_iomux_v3_setup_pad(txfs);
}
static void pcm043_ac97_cold_reset(struct snd_ac97 *ac97)
{
iomux_v3_cfg_t txfs_gpio = MX35_PAD_STXFS4__GPIO2_31;
iomux_v3_cfg_t txfs = MX35_PAD_STXFS4__AUDMUX_AUD4_TXFS;
iomux_v3_cfg_t txd_gpio = MX35_PAD_STXD4__GPIO2_28;
iomux_v3_cfg_t txd = MX35_PAD_STXD4__AUDMUX_AUD4_TXD;
iomux_v3_cfg_t reset_gpio = MX35_PAD_SD2_CMD__GPIO2_0;
int ret;
ret = gpio_request(AC97_GPIO_TXFS, "SSI");
if (ret)
goto err1;
ret = gpio_request(AC97_GPIO_TXD, "SSI");
if (ret)
goto err2;
ret = gpio_request(AC97_GPIO_RESET, "SSI");
if (ret)
goto err3;
mxc_iomux_v3_setup_pad(txfs_gpio);
mxc_iomux_v3_setup_pad(txd_gpio);
mxc_iomux_v3_setup_pad(reset_gpio);
gpio_direction_output(AC97_GPIO_TXFS, 0);
gpio_direction_output(AC97_GPIO_TXD, 0);
/* cold reset */
gpio_direction_output(AC97_GPIO_RESET, 0);
udelay(10);
gpio_direction_output(AC97_GPIO_RESET, 1);
mxc_iomux_v3_setup_pad(txd);
mxc_iomux_v3_setup_pad(txfs);
gpio_free(AC97_GPIO_RESET);
err3:
gpio_free(AC97_GPIO_TXD);
err2:
gpio_free(AC97_GPIO_TXFS);
err1:
if (ret)
printk("%s failed with %d\n", __func__, ret);
mdelay(1);
}
static const struct imx_ssi_platform_data pcm043_ssi_pdata __initconst = {
.ac97_reset = pcm043_ac97_cold_reset,
.ac97_warm_reset = pcm043_ac97_warm_reset,
.flags = IMX_SSI_USE_AC97,
};
static const struct mxc_nand_platform_data
pcm037_nand_board_info __initconst = {
.width = 1,
.hw_ecc = 1,
};
static int pcm043_otg_init(struct platform_device *pdev)
{
return mx35_initialize_usb_hw(pdev->id, MXC_EHCI_INTERFACE_DIFF_UNI);
}
static struct mxc_usbh_platform_data otg_pdata __initdata = {
.init = pcm043_otg_init,
.portsc = MXC_EHCI_MODE_UTMI,
};
static int pcm043_usbh1_init(struct platform_device *pdev)
{
return mx35_initialize_usb_hw(pdev->id, MXC_EHCI_INTERFACE_SINGLE_UNI |
MXC_EHCI_INTERNAL_PHY | MXC_EHCI_IPPUE_DOWN);
}
static const struct mxc_usbh_platform_data usbh1_pdata __initconst = {
.init = pcm043_usbh1_init,
.portsc = MXC_EHCI_MODE_SERIAL,
};
static const struct fsl_usb2_platform_data otg_device_pdata __initconst = {
.operating_mode = FSL_USB2_DR_DEVICE,
.phy_mode = FSL_USB2_PHY_UTMI,
};
static bool otg_mode_host __initdata;
static int __init pcm043_otg_mode(char *options)
{
if (!strcmp(options, "host"))
otg_mode_host = true;
else if (!strcmp(options, "device"))
otg_mode_host = false;
else
pr_info("otg_mode neither \"host\" nor \"device\". "
"Defaulting to device\n");
return 1;
}
__setup("otg_mode=", pcm043_otg_mode);
static struct esdhc_platform_data sd1_pdata = {
.wp_type = ESDHC_WP_GPIO,
.cd_type = ESDHC_CD_GPIO,
};
static struct gpiod_lookup_table sd1_gpio_table = {
.dev_id = "sdhci-esdhc-imx35.0",
.table = {
/* Card detect: bank 2 offset 24 */
GPIO_LOOKUP("imx35-gpio.2", 24, "cd", GPIO_ACTIVE_LOW),
/* Write protect: bank 2 offset 23 */
GPIO_LOOKUP("imx35-gpio.2", 23, "wp", GPIO_ACTIVE_LOW),
{ },
},
};
/*
* Board specific initialization.
*/
static void __init pcm043_init(void)
{
imx35_soc_init();
mxc_iomux_v3_setup_multiple_pads(pcm043_pads, ARRAY_SIZE(pcm043_pads));
imx35_add_fec(NULL);
platform_add_devices(devices, ARRAY_SIZE(devices));
imx35_add_imx2_wdt();
imx35_add_imx_uart0(&uart_pdata);
imx35_add_mxc_nand(&pcm037_nand_board_info);
imx35_add_imx_uart1(&uart_pdata);
i2c_register_board_info(0, pcm043_i2c_devices,
ARRAY_SIZE(pcm043_i2c_devices));
imx35_add_imx_i2c0(&pcm043_i2c0_data);
imx35_add_ipu_core();
imx35_add_mx3_sdc_fb(&mx3fb_pdata);
if (otg_mode_host) {
otg_pdata.otg = imx_otg_ulpi_create(ULPI_OTG_DRVVBUS |
ULPI_OTG_DRVVBUS_EXT);
if (otg_pdata.otg)
imx35_add_mxc_ehci_otg(&otg_pdata);
}
imx35_add_mxc_ehci_hs(&usbh1_pdata);
if (!otg_mode_host)
imx35_add_fsl_usb2_udc(&otg_device_pdata);
imx35_add_flexcan1();
}
static void __init pcm043_late_init(void)
{
imx35_add_imx_ssi(0, &pcm043_ssi_pdata);
gpiod_add_lookup_table(&sd1_gpio_table);
imx35_add_sdhci_esdhc_imx(0, &sd1_pdata);
}
static void __init pcm043_timer_init(void)
{
mx35_clocks_init();
}
MACHINE_START(PCM043, "Phytec Phycore pcm043")
/* Maintainer: Pengutronix */
.atag_offset = 0x100,
.map_io = mx35_map_io,
.init_early = imx35_init_early,
.init_irq = mx35_init_irq,
.init_time = pcm043_timer_init,
.init_machine = pcm043_init,
.init_late = pcm043_late_init,
.restart = mxc_restart,
MACHINE_END

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arch/arm/mach-imx/mach-vpr200.c
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// SPDX-License-Identifier: GPL-2.0-or-later
/*
* Copyright 2009 Freescale Semiconductor, Inc. All Rights Reserved.
* Copyright (C) 2009 Marc Kleine-Budde, Pengutronix
* Copyright 2010 Creative Product Design
*
* Derived from mx35 3stack.
* Original author: Fabio Estevam <fabio.estevam@freescale.com>
*/
#include <linux/types.h>
#include <linux/init.h>
#include <linux/platform_device.h>
#include <linux/mtd/physmap.h>
#include <linux/memory.h>
#include <linux/gpio.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/time.h>
#include <linux/i2c.h>
#include <linux/mfd/mc13xxx.h>
#include "common.h"
#include "devices-imx35.h"
#include "ehci.h"
#include "hardware.h"
#include "iomux-mx35.h"
#define GPIO_LCDPWR IMX_GPIO_NR(1, 2)
#define GPIO_PMIC_INT IMX_GPIO_NR(2, 0)
#define GPIO_BUTTON1 IMX_GPIO_NR(1, 4)
#define GPIO_BUTTON2 IMX_GPIO_NR(1, 5)
#define GPIO_BUTTON3 IMX_GPIO_NR(1, 7)
#define GPIO_BUTTON4 IMX_GPIO_NR(1, 8)
#define GPIO_BUTTON5 IMX_GPIO_NR(1, 9)
#define GPIO_BUTTON6 IMX_GPIO_NR(1, 10)
#define GPIO_BUTTON7 IMX_GPIO_NR(1, 11)
#define GPIO_BUTTON8 IMX_GPIO_NR(1, 12)
static const struct fb_videomode fb_modedb[] = {
{
/* 800x480 @ 60 Hz */
.name = "PT0708048",
.refresh = 60,
.xres = 800,
.yres = 480,
.pixclock = KHZ2PICOS(33260),
.left_margin = 50,
.right_margin = 156,
.upper_margin = 10,
.lower_margin = 10,
.hsync_len = 1, /* note: DE only display */
.vsync_len = 1, /* note: DE only display */
.sync = FB_SYNC_CLK_IDLE_EN | FB_SYNC_OE_ACT_HIGH,
.vmode = FB_VMODE_NONINTERLACED,
.flag = 0,
}, {
/* 800x480 @ 60 Hz */
.name = "CTP-CLAA070LC0ACW",
.refresh = 60,
.xres = 800,
.yres = 480,
.pixclock = KHZ2PICOS(27000),
.left_margin = 50,
.right_margin = 50, /* whole line should have 900 clocks */
.upper_margin = 10,
.lower_margin = 10, /* whole frame should have 500 lines */
.hsync_len = 1, /* note: DE only display */
.vsync_len = 1, /* note: DE only display */
.sync = FB_SYNC_CLK_IDLE_EN | FB_SYNC_OE_ACT_HIGH,
.vmode = FB_VMODE_NONINTERLACED,
.flag = 0,
}
};
static struct mx3fb_platform_data mx3fb_pdata __initdata = {
.name = "PT0708048",
.mode = fb_modedb,
.num_modes = ARRAY_SIZE(fb_modedb),
};
static struct physmap_flash_data vpr200_flash_data = {
.width = 2,
};
static struct resource vpr200_flash_resource = {
.start = MX35_CS0_BASE_ADDR,
.end = MX35_CS0_BASE_ADDR + SZ_64M - 1,
.flags = IORESOURCE_MEM,
};
static struct platform_device vpr200_flash = {
.name = "physmap-flash",
.id = 0,
.dev = {
.platform_data = &vpr200_flash_data,
},
.resource = &vpr200_flash_resource,
.num_resources = 1,
};
static const struct mxc_nand_platform_data
vpr200_nand_board_info __initconst = {
.width = 1,
.hw_ecc = 1,
.flash_bbt = 1,
};
#define VPR_KEY_DEBOUNCE 500
static struct gpio_keys_button vpr200_gpio_keys_table[] = {
{KEY_F2, GPIO_BUTTON1, 1, "vpr-keys: F2", 0, VPR_KEY_DEBOUNCE},
{KEY_F3, GPIO_BUTTON2, 1, "vpr-keys: F3", 0, VPR_KEY_DEBOUNCE},
{KEY_F4, GPIO_BUTTON3, 1, "vpr-keys: F4", 0, VPR_KEY_DEBOUNCE},
{KEY_F5, GPIO_BUTTON4, 1, "vpr-keys: F5", 0, VPR_KEY_DEBOUNCE},
{KEY_F6, GPIO_BUTTON5, 1, "vpr-keys: F6", 0, VPR_KEY_DEBOUNCE},
{KEY_F7, GPIO_BUTTON6, 1, "vpr-keys: F7", 0, VPR_KEY_DEBOUNCE},
{KEY_F8, GPIO_BUTTON7, 1, "vpr-keys: F8", 1, VPR_KEY_DEBOUNCE},
{KEY_F9, GPIO_BUTTON8, 1, "vpr-keys: F9", 1, VPR_KEY_DEBOUNCE},
};
static const struct gpio_keys_platform_data
vpr200_gpio_keys_data __initconst = {
.buttons = vpr200_gpio_keys_table,
.nbuttons = ARRAY_SIZE(vpr200_gpio_keys_table),
};
static struct mc13xxx_platform_data vpr200_pmic = {
.flags = MC13XXX_USE_ADC | MC13XXX_USE_TOUCHSCREEN,
};
static const struct imxi2c_platform_data vpr200_i2c0_data __initconst = {
.bitrate = 50000,
};
static struct i2c_board_info vpr200_i2c_devices[] = {
{
I2C_BOARD_INFO("24c02", 0x50), /* E0=0, E1=0, E2=0 */
}, {
I2C_BOARD_INFO("mc13892", 0x08),
.platform_data = &vpr200_pmic,
/* irq number is run-time assigned */
}
};
static const iomux_v3_cfg_t vpr200_pads[] __initconst = {
/* UART1 */
MX35_PAD_TXD1__UART1_TXD_MUX,
MX35_PAD_RXD1__UART1_RXD_MUX,
/* UART3 */
MX35_PAD_ATA_DATA10__UART3_RXD_MUX,
MX35_PAD_ATA_DATA11__UART3_TXD_MUX,
/* FEC */
MX35_PAD_FEC_TX_CLK__FEC_TX_CLK,
MX35_PAD_FEC_RX_CLK__FEC_RX_CLK,
MX35_PAD_FEC_RX_DV__FEC_RX_DV,
MX35_PAD_FEC_COL__FEC_COL,
MX35_PAD_FEC_RDATA0__FEC_RDATA_0,
MX35_PAD_FEC_TDATA0__FEC_TDATA_0,
MX35_PAD_FEC_TX_EN__FEC_TX_EN,
MX35_PAD_FEC_MDC__FEC_MDC,
MX35_PAD_FEC_MDIO__FEC_MDIO,
MX35_PAD_FEC_TX_ERR__FEC_TX_ERR,
MX35_PAD_FEC_RX_ERR__FEC_RX_ERR,
MX35_PAD_FEC_CRS__FEC_CRS,
MX35_PAD_FEC_RDATA1__FEC_RDATA_1,
MX35_PAD_FEC_TDATA1__FEC_TDATA_1,
MX35_PAD_FEC_RDATA2__FEC_RDATA_2,
MX35_PAD_FEC_TDATA2__FEC_TDATA_2,
MX35_PAD_FEC_RDATA3__FEC_RDATA_3,
MX35_PAD_FEC_TDATA3__FEC_TDATA_3,
/* Display */
MX35_PAD_LD0__IPU_DISPB_DAT_0,
MX35_PAD_LD1__IPU_DISPB_DAT_1,
MX35_PAD_LD2__IPU_DISPB_DAT_2,
MX35_PAD_LD3__IPU_DISPB_DAT_3,
MX35_PAD_LD4__IPU_DISPB_DAT_4,
MX35_PAD_LD5__IPU_DISPB_DAT_5,
MX35_PAD_LD6__IPU_DISPB_DAT_6,
MX35_PAD_LD7__IPU_DISPB_DAT_7,
MX35_PAD_LD8__IPU_DISPB_DAT_8,
MX35_PAD_LD9__IPU_DISPB_DAT_9,
MX35_PAD_LD10__IPU_DISPB_DAT_10,
MX35_PAD_LD11__IPU_DISPB_DAT_11,
MX35_PAD_LD12__IPU_DISPB_DAT_12,
MX35_PAD_LD13__IPU_DISPB_DAT_13,
MX35_PAD_LD14__IPU_DISPB_DAT_14,
MX35_PAD_LD15__IPU_DISPB_DAT_15,
MX35_PAD_LD16__IPU_DISPB_DAT_16,
MX35_PAD_LD17__IPU_DISPB_DAT_17,
MX35_PAD_D3_FPSHIFT__IPU_DISPB_D3_CLK,
MX35_PAD_D3_DRDY__IPU_DISPB_D3_DRDY,
MX35_PAD_CONTRAST__IPU_DISPB_CONTR,
/* LCD Enable */
MX35_PAD_D3_VSYNC__GPIO1_2,
/* USBOTG */
MX35_PAD_USBOTG_PWR__USB_TOP_USBOTG_PWR,
MX35_PAD_USBOTG_OC__USB_TOP_USBOTG_OC,
/* SDCARD */
MX35_PAD_SD1_CMD__ESDHC1_CMD,
MX35_PAD_SD1_CLK__ESDHC1_CLK,
MX35_PAD_SD1_DATA0__ESDHC1_DAT0,
MX35_PAD_SD1_DATA1__ESDHC1_DAT1,
MX35_PAD_SD1_DATA2__ESDHC1_DAT2,
MX35_PAD_SD1_DATA3__ESDHC1_DAT3,
/* PMIC */
MX35_PAD_GPIO2_0__GPIO2_0,
/* GPIO keys */
MX35_PAD_SCKR__GPIO1_4,
MX35_PAD_COMPARE__GPIO1_5,
MX35_PAD_SCKT__GPIO1_7,
MX35_PAD_FST__GPIO1_8,
MX35_PAD_HCKT__GPIO1_9,
MX35_PAD_TX5_RX0__GPIO1_10,
MX35_PAD_TX4_RX1__GPIO1_11,
MX35_PAD_TX3_RX2__GPIO1_12,
};
/* USB Device config */
static const struct fsl_usb2_platform_data otg_device_pdata __initconst = {
.operating_mode = FSL_USB2_DR_DEVICE,
.phy_mode = FSL_USB2_PHY_UTMI,
.workaround = FLS_USB2_WORKAROUND_ENGCM09152,
};
static int vpr200_usbh_init(struct platform_device *pdev)
{
return mx35_initialize_usb_hw(pdev->id,
MXC_EHCI_INTERFACE_SINGLE_UNI | MXC_EHCI_INTERNAL_PHY);
}
/* USB HOST config */
static const struct mxc_usbh_platform_data usb_host_pdata __initconst = {
.init = vpr200_usbh_init,
.portsc = MXC_EHCI_MODE_SERIAL,
};
static struct platform_device *devices[] __initdata = {
&vpr200_flash,
};
/*
* Board specific initialization.
*/
static void __init vpr200_board_init(void)
{
imx35_soc_init();
mxc_iomux_v3_setup_multiple_pads(vpr200_pads, ARRAY_SIZE(vpr200_pads));
imx35_add_fec(NULL);
imx35_add_imx2_wdt();
imx35_add_imx_uart0(NULL);
imx35_add_imx_uart2(NULL);
imx35_add_ipu_core();
imx35_add_mx3_sdc_fb(&mx3fb_pdata);
imx35_add_fsl_usb2_udc(&otg_device_pdata);
imx35_add_mxc_ehci_hs(&usb_host_pdata);
imx35_add_mxc_nand(&vpr200_nand_board_info);
imx35_add_sdhci_esdhc_imx(0, NULL);
}
static void __init vpr200_late_init(void)
{
imx_add_gpio_keys(&vpr200_gpio_keys_data);
platform_add_devices(devices, ARRAY_SIZE(devices));
if (0 != gpio_request(GPIO_LCDPWR, "LCDPWR"))
printk(KERN_WARNING "vpr200: Couldn't get LCDPWR gpio\n");
else
gpio_direction_output(GPIO_LCDPWR, 0);
if (0 != gpio_request(GPIO_PMIC_INT, "PMIC_INT"))
printk(KERN_WARNING "vpr200: Couldn't get PMIC_INT gpio\n");
else
gpio_direction_input(GPIO_PMIC_INT);
vpr200_i2c_devices[1].irq = gpio_to_irq(GPIO_PMIC_INT);
i2c_register_board_info(0, vpr200_i2c_devices,
ARRAY_SIZE(vpr200_i2c_devices));
imx35_add_imx_i2c0(&vpr200_i2c0_data);
}
static void __init vpr200_timer_init(void)
{
mx35_clocks_init();
}
MACHINE_START(VPR200, "VPR200")
/* Maintainer: Creative Product Design */
.map_io = mx35_map_io,
.init_early = imx35_init_early,
.init_irq = mx35_init_irq,
.init_time = vpr200_timer_init,
.init_machine = vpr200_board_init,
.init_late = vpr200_late_init,
.restart = mxc_restart,
MACHINE_END