IB/ehca: Fix error paths in post_send and post_recv
Always set bad_wr when an immediate error is detected. Do not report success if an error occurred. Signed-off-by: Frank Zago <fzago@systemfabricworks.com> Signed-off-by: Roland Dreier <rolandd@cisco.com>
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9420269428
Коммит
e147de0361
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@ -400,7 +400,6 @@ static inline void map_ib_wc_status(u32 cqe_status,
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static inline int post_one_send(struct ehca_qp *my_qp,
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struct ib_send_wr *cur_send_wr,
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struct ib_send_wr **bad_send_wr,
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int hidden)
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{
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struct ehca_wqe *wqe_p;
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@ -412,8 +411,6 @@ static inline int post_one_send(struct ehca_qp *my_qp,
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wqe_p = ipz_qeit_get_inc(&my_qp->ipz_squeue);
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if (unlikely(!wqe_p)) {
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/* too many posted work requests: queue overflow */
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if (bad_send_wr)
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*bad_send_wr = cur_send_wr;
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ehca_err(my_qp->ib_qp.device, "Too many posted WQEs "
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"qp_num=%x", my_qp->ib_qp.qp_num);
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return -ENOMEM;
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@ -433,8 +430,6 @@ static inline int post_one_send(struct ehca_qp *my_qp,
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*/
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if (unlikely(ret)) {
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my_qp->ipz_squeue.current_q_offset = start_offset;
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if (bad_send_wr)
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*bad_send_wr = cur_send_wr;
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ehca_err(my_qp->ib_qp.device, "Could not write WQE "
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"qp_num=%x", my_qp->ib_qp.qp_num);
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return -EINVAL;
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@ -448,7 +443,6 @@ int ehca_post_send(struct ib_qp *qp,
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struct ib_send_wr **bad_send_wr)
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{
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struct ehca_qp *my_qp = container_of(qp, struct ehca_qp, ib_qp);
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struct ib_send_wr *cur_send_wr;
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int wqe_cnt = 0;
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int ret = 0;
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unsigned long flags;
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@ -457,7 +451,8 @@ int ehca_post_send(struct ib_qp *qp,
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if (unlikely(my_qp->state < IB_QPS_RTS)) {
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ehca_err(qp->device, "Invalid QP state qp_state=%d qpn=%x",
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my_qp->state, qp->qp_num);
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return -EINVAL;
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ret = -EINVAL;
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goto out;
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}
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/* LOCK the QUEUE */
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@ -476,24 +471,21 @@ int ehca_post_send(struct ib_qp *qp,
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struct ib_send_wr circ_wr;
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memset(&circ_wr, 0, sizeof(circ_wr));
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circ_wr.opcode = IB_WR_RDMA_READ;
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post_one_send(my_qp, &circ_wr, NULL, 1); /* ignore retcode */
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post_one_send(my_qp, &circ_wr, 1); /* ignore retcode */
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wqe_cnt++;
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ehca_dbg(qp->device, "posted circ wr qp_num=%x", qp->qp_num);
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my_qp->message_count = my_qp->packet_count = 0;
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}
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/* loop processes list of send reqs */
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for (cur_send_wr = send_wr; cur_send_wr != NULL;
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cur_send_wr = cur_send_wr->next) {
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ret = post_one_send(my_qp, cur_send_wr, bad_send_wr, 0);
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while (send_wr) {
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ret = post_one_send(my_qp, send_wr, 0);
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if (unlikely(ret)) {
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/* if one or more WQEs were successful, don't fail */
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if (wqe_cnt)
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ret = 0;
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goto post_send_exit0;
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}
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wqe_cnt++;
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} /* eof for cur_send_wr */
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send_wr = send_wr->next;
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}
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post_send_exit0:
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iosync(); /* serialize GAL register access */
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@ -503,6 +495,10 @@ post_send_exit0:
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my_qp, qp->qp_num, wqe_cnt, ret);
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my_qp->message_count += wqe_cnt;
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spin_unlock_irqrestore(&my_qp->spinlock_s, flags);
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out:
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if (ret)
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*bad_send_wr = send_wr;
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return ret;
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}
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@ -511,7 +507,6 @@ static int internal_post_recv(struct ehca_qp *my_qp,
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struct ib_recv_wr *recv_wr,
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struct ib_recv_wr **bad_recv_wr)
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{
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struct ib_recv_wr *cur_recv_wr;
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struct ehca_wqe *wqe_p;
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int wqe_cnt = 0;
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int ret = 0;
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@ -522,27 +517,23 @@ static int internal_post_recv(struct ehca_qp *my_qp,
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if (unlikely(!HAS_RQ(my_qp))) {
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ehca_err(dev, "QP has no RQ ehca_qp=%p qp_num=%x ext_type=%d",
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my_qp, my_qp->real_qp_num, my_qp->ext_type);
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return -ENODEV;
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ret = -ENODEV;
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goto out;
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}
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/* LOCK the QUEUE */
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spin_lock_irqsave(&my_qp->spinlock_r, flags);
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/* loop processes list of send reqs */
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for (cur_recv_wr = recv_wr; cur_recv_wr != NULL;
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cur_recv_wr = cur_recv_wr->next) {
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/* loop processes list of recv reqs */
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while (recv_wr) {
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u64 start_offset = my_qp->ipz_rqueue.current_q_offset;
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/* get pointer next to free WQE */
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wqe_p = ipz_qeit_get_inc(&my_qp->ipz_rqueue);
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if (unlikely(!wqe_p)) {
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/* too many posted work requests: queue overflow */
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if (bad_recv_wr)
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*bad_recv_wr = cur_recv_wr;
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if (wqe_cnt == 0) {
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ret = -ENOMEM;
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ehca_err(dev, "Too many posted WQEs "
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"qp_num=%x", my_qp->real_qp_num);
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}
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ret = -ENOMEM;
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ehca_err(dev, "Too many posted WQEs "
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"qp_num=%x", my_qp->real_qp_num);
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goto post_recv_exit0;
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}
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/*
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@ -552,7 +543,7 @@ static int internal_post_recv(struct ehca_qp *my_qp,
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rq_map_idx = start_offset / my_qp->ipz_rqueue.qe_size;
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/* write a RECV WQE into the QUEUE */
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ret = ehca_write_rwqe(&my_qp->ipz_rqueue, wqe_p, cur_recv_wr,
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ret = ehca_write_rwqe(&my_qp->ipz_rqueue, wqe_p, recv_wr,
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rq_map_idx);
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/*
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* if something failed,
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@ -560,22 +551,20 @@ static int internal_post_recv(struct ehca_qp *my_qp,
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*/
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if (unlikely(ret)) {
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my_qp->ipz_rqueue.current_q_offset = start_offset;
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*bad_recv_wr = cur_recv_wr;
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if (wqe_cnt == 0) {
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ret = -EINVAL;
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ehca_err(dev, "Could not write WQE "
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"qp_num=%x", my_qp->real_qp_num);
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}
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ret = -EINVAL;
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ehca_err(dev, "Could not write WQE "
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"qp_num=%x", my_qp->real_qp_num);
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goto post_recv_exit0;
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}
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qmap_entry = &my_qp->rq_map.map[rq_map_idx];
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qmap_entry->app_wr_id = get_app_wr_id(cur_recv_wr->wr_id);
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qmap_entry->app_wr_id = get_app_wr_id(recv_wr->wr_id);
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qmap_entry->reported = 0;
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qmap_entry->cqe_req = 1;
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wqe_cnt++;
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} /* eof for cur_recv_wr */
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recv_wr = recv_wr->next;
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} /* eof for recv_wr */
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post_recv_exit0:
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iosync(); /* serialize GAL register access */
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@ -584,6 +573,11 @@ post_recv_exit0:
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ehca_dbg(dev, "ehca_qp=%p qp_num=%x wqe_cnt=%d ret=%i",
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my_qp, my_qp->real_qp_num, wqe_cnt, ret);
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spin_unlock_irqrestore(&my_qp->spinlock_r, flags);
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out:
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if (ret)
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*bad_recv_wr = recv_wr;
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return ret;
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}
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@ -597,6 +591,7 @@ int ehca_post_recv(struct ib_qp *qp,
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if (unlikely(my_qp->state == IB_QPS_RESET)) {
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ehca_err(qp->device, "Invalid QP state qp_state=%d qpn=%x",
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my_qp->state, qp->qp_num);
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*bad_recv_wr = recv_wr;
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return -EINVAL;
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}
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