Blackfin: MPU: support XIP in async flash memory
The NOMPU code already supported executing in the async banks, so this brings the MPU code in line. Signed-off-by: Barry Song <barry.song@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Родитель
d45e8db1b2
Коммит
e187837b6f
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@ -113,11 +113,11 @@ static noinline int dcplb_miss(unsigned int cpu)
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addr = L2_START;
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d_data = L2_DMEMORY;
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} else if (addr >= physical_mem_end) {
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if (addr >= ASYNC_BANK0_BASE && addr < ASYNC_BANK3_BASE + ASYNC_BANK3_SIZE
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&& (status & FAULT_USERSUPV)) {
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addr &= ~0x3fffff;
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if (addr >= ASYNC_BANK0_BASE && addr < ASYNC_BANK3_BASE + ASYNC_BANK3_SIZE) {
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addr &= ~(4 * 1024 * 1024 - 1);
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d_data &= ~PAGE_SIZE_4KB;
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d_data |= PAGE_SIZE_4MB;
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d_data |= CPLB_USER_RD | CPLB_USER_WR;
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} else if (addr >= BOOT_ROM_START && addr < BOOT_ROM_START + BOOT_ROM_LENGTH
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&& (status & (FAULT_RW | FAULT_USERSUPV)) == FAULT_USERSUPV) {
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addr &= ~(1 * 1024 * 1024 - 1);
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@ -203,7 +203,12 @@ static noinline int icplb_miss(unsigned int cpu)
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addr = L2_START;
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i_data = L2_IMEMORY;
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} else if (addr >= physical_mem_end) {
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if (addr >= BOOT_ROM_START && addr < BOOT_ROM_START + BOOT_ROM_LENGTH
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if (addr >= ASYNC_BANK0_BASE && addr < ASYNC_BANK3_BASE + ASYNC_BANK3_SIZE) {
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addr &= ~(4 * 1024 * 1024 - 1);
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i_data &= ~PAGE_SIZE_4KB;
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i_data |= PAGE_SIZE_4MB;
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i_data |= CPLB_USER_RD;
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} else if (addr >= BOOT_ROM_START && addr < BOOT_ROM_START + BOOT_ROM_LENGTH
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&& (status & FAULT_USERSUPV)) {
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addr &= ~(1 * 1024 * 1024 - 1);
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i_data &= ~PAGE_SIZE_4KB;
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