[IA64] Add mapping table between irq and vector
Add mapping tables between irqs and vectors, and its management code. This is necessary for supporting multiple vector domain because 1:1 mapping between irq and vector will be changed to n:1. The irq == vector relationship between irqs and vectors is explicitly remained for percpu interrupts, platform interrupts, isa IRQs and vectors assigned using assign_irq_vector() because some programs might depend on it. And I should consider the following problem. When pci drivers enabled/disabled devices dynamically, its irq number is changed to the different one. Therefore, suspend/resume code may happen problem. To fix this problem, I bound gsi to irq. Signed-off-by: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com> Signed-off-by: Yasuaki Ishimatsu <isimatu.yasuaki@jp.fujitsu.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
This commit is contained in:
Yasuaki Ishimatsu
Tony Luck
Родитель
f8c087f31e
Коммит
e1b30a3928
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@ -117,6 +117,9 @@ static DEFINE_SPINLOCK(iosapic_lock);
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* These tables map IA-64 vectors to the IOSAPIC pin that generates this
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* vector.
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*/
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#define NO_REF_RTE 0
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static struct iosapic {
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char __iomem *addr; /* base address of IOSAPIC */
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unsigned int gsi_base; /* GSI base */
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@ -204,7 +207,7 @@ inline int
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gsi_to_vector (unsigned int gsi)
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{
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int irq = __gsi_to_irq(gsi);
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if (irq < 0)
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if (check_irq_used(irq) < 0)
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return -1;
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return irq_to_vector(irq);
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}
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@ -619,14 +622,18 @@ register_intr (unsigned int gsi, int irq, unsigned char delivery,
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iosapic_intr_info[irq].count++;
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iosapic_lists[index].rtes_inuse++;
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}
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else if (irq_is_shared(irq)) {
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else if (rte->refcnt == NO_REF_RTE) {
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struct iosapic_intr_info *info = &iosapic_intr_info[irq];
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if (info->trigger != trigger || info->polarity != polarity) {
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if (info->count > 0 &&
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(info->trigger != trigger || info->polarity != polarity)){
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printk (KERN_WARNING
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"%s: cannot override the interrupt\n",
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__FUNCTION__);
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return -EINVAL;
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}
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rte->refcnt++;
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iosapic_intr_info[irq].count++;
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iosapic_lists[index].rtes_inuse++;
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}
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iosapic_intr_info[irq].polarity = polarity;
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@ -756,12 +763,17 @@ iosapic_register_intr (unsigned int gsi,
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irq = __gsi_to_irq(gsi);
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if (irq > 0) {
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rte = find_rte(irq, gsi);
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if(iosapic_intr_info[irq].count == 0) {
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assign_irq_vector(irq);
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dynamic_irq_init(irq);
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} else if (rte->refcnt != NO_REF_RTE) {
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rte->refcnt++;
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goto unlock_iosapic_lock;
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}
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} else
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irq = create_irq();
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/* If vector is running out, we try to find a sharable vector */
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irq = create_irq();
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if (irq < 0) {
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irq = iosapic_find_sharable_irq(trigger, polarity);
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if (irq < 0)
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@ -832,18 +844,14 @@ iosapic_unregister_intr (unsigned int gsi)
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if (--rte->refcnt > 0)
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goto out;
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/* Remove the rte entry from the list */
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idesc = irq_desc + irq;
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spin_lock(&idesc->lock);
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list_del(&rte->rte_list);
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spin_unlock(&idesc->lock);
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rte->refcnt = NO_REF_RTE;
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/* Mask the interrupt */
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low32 = iosapic_intr_info[irq].low32 | IOSAPIC_MASK;
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iosapic_write(rte->iosapic, IOSAPIC_RTE_LOW(rte->rte_index), low32);
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iosapic_intr_info[irq].count--;
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iosapic_free_rte(rte);
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index = find_iosapic(gsi);
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iosapic_lists[index].rtes_inuse--;
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WARN_ON(iosapic_lists[index].rtes_inuse < 0);
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@ -857,21 +865,20 @@ iosapic_unregister_intr (unsigned int gsi)
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(polarity == IOSAPIC_POL_HIGH ? "high" : "low"),
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cpu_logical_id(dest), dest, irq_to_vector(irq));
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if (list_empty(&iosapic_intr_info[irq].rtes)) {
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/* Sanity check */
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BUG_ON(iosapic_intr_info[irq].count);
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if (iosapic_intr_info[irq].count == 0) {
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#ifdef CONFIG_SMP
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/* Clear affinity */
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cpus_setall(idesc->affinity);
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#endif
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/* Clear the interrupt information */
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memset(&iosapic_intr_info[irq], 0,
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sizeof(struct iosapic_intr_info));
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iosapic_intr_info[irq].dest = 0;
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iosapic_intr_info[irq].dmode = 0;
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iosapic_intr_info[irq].polarity = 0;
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iosapic_intr_info[irq].trigger = 0;
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iosapic_intr_info[irq].low32 |= IOSAPIC_MASK;
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INIT_LIST_HEAD(&iosapic_intr_info[irq].rtes);
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/* Destroy IRQ */
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destroy_irq(irq);
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/* Destroy and reserve IRQ */
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destroy_and_reserve_irq(irq);
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}
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out:
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spin_unlock_irqrestore(&iosapic_lock, flags);
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@ -892,8 +899,8 @@ iosapic_register_platform_intr (u32 int_type, unsigned int gsi,
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switch (int_type) {
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case ACPI_INTERRUPT_PMI:
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vector = iosapic_vector;
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irq = vector; /* FIXME */
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irq = vector = iosapic_vector;
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bind_irq_vector(irq, vector);
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/*
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* since PMI vector is alloc'd by FW(ACPI) not by kernel,
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* we need to make sure the vector is available
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@ -909,8 +916,8 @@ iosapic_register_platform_intr (u32 int_type, unsigned int gsi,
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delivery = IOSAPIC_INIT;
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break;
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case ACPI_INTERRUPT_CPEI:
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vector = IA64_CPE_VECTOR;
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irq = vector; /* FIXME */
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irq = vector = IA64_CPE_VECTOR;
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BUG_ON(bind_irq_vector(irq, vector));
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delivery = IOSAPIC_LOWEST_PRIORITY;
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mask = 1;
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break;
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@ -945,8 +952,8 @@ iosapic_override_isa_irq (unsigned int isa_irq, unsigned int gsi,
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int vector, irq;
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unsigned int dest = cpu_physical_id(smp_processor_id());
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vector = isa_irq_to_vector(isa_irq);
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irq = vector; /* FIXME */
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irq = vector = isa_irq_to_vector(isa_irq);
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BUG_ON(bind_irq_vector(irq, vector));
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register_intr(gsi, irq, IOSAPIC_LOWEST_PRIORITY, polarity, trigger);
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DBG("ISA: IRQ %u -> GSI %u (%s,%s) -> CPU %d (0x%04x) vector %d\n",
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@ -966,6 +973,8 @@ iosapic_system_init (int system_pcat_compat)
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iosapic_intr_info[irq].low32 = IOSAPIC_MASK;
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/* mark as unused */
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INIT_LIST_HEAD(&iosapic_intr_info[irq].rtes);
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iosapic_intr_info[irq].count = 0;
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}
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pcat_compat = system_pcat_compat;
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@ -35,7 +35,7 @@ void ack_bad_irq(unsigned int irq)
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#ifdef CONFIG_IA64_GENERIC
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unsigned int __ia64_local_vector_to_irq (ia64_vector vec)
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{
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return (unsigned int) vec;
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return __get_cpu_var(vector_irq)[vec];
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}
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#endif
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@ -46,6 +46,12 @@
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#define IRQ_DEBUG 0
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#define IRQ_VECTOR_UNASSIGNED (0)
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#define IRQ_UNUSED (0)
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#define IRQ_USED (1)
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#define IRQ_RSVD (2)
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/* These can be overridden in platform_irq_init */
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int ia64_first_device_vector = IA64_DEF_FIRST_DEVICE_VECTOR;
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int ia64_last_device_vector = IA64_DEF_LAST_DEVICE_VECTOR;
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@ -64,46 +70,161 @@ __u8 isa_irq_to_vector_map[16] = {
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};
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EXPORT_SYMBOL(isa_irq_to_vector_map);
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static unsigned long ia64_vector_mask[BITS_TO_LONGS(IA64_MAX_DEVICE_VECTORS)];
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DEFINE_SPINLOCK(vector_lock);
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struct irq_cfg irq_cfg[NR_IRQS] __read_mostly = {
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[0 ... NR_IRQS - 1] = { .vector = IRQ_VECTOR_UNASSIGNED }
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};
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DEFINE_PER_CPU(int[IA64_NUM_VECTORS], vector_irq) = {
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[0 ... IA64_NUM_VECTORS - 1] = IA64_SPURIOUS_INT_VECTOR
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};
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static int irq_status[NR_IRQS] = {
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[0 ... NR_IRQS -1] = IRQ_UNUSED
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};
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int check_irq_used(int irq)
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{
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if (irq_status[irq] == IRQ_USED)
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return 1;
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return -1;
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}
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static void reserve_irq(unsigned int irq)
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{
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unsigned long flags;
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spin_lock_irqsave(&vector_lock, flags);
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irq_status[irq] = IRQ_RSVD;
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spin_unlock_irqrestore(&vector_lock, flags);
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}
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static inline int find_unassigned_irq(void)
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{
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int irq;
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for (irq = IA64_FIRST_DEVICE_VECTOR; irq < NR_IRQS; irq++)
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if (irq_status[irq] == IRQ_UNUSED)
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return irq;
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return -ENOSPC;
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}
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static inline int find_unassigned_vector(void)
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{
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int vector;
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for (vector = IA64_FIRST_DEVICE_VECTOR;
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vector <= IA64_LAST_DEVICE_VECTOR; vector++)
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if (__get_cpu_var(vector_irq[vector]) == IA64_SPURIOUS_INT_VECTOR)
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return vector;
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return -ENOSPC;
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}
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static int __bind_irq_vector(int irq, int vector)
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{
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int cpu;
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if (irq_to_vector(irq) == vector)
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return 0;
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if (irq_to_vector(irq) != IRQ_VECTOR_UNASSIGNED)
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return -EBUSY;
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for_each_online_cpu(cpu)
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per_cpu(vector_irq, cpu)[vector] = irq;
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irq_cfg[irq].vector = vector;
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irq_status[irq] = IRQ_USED;
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return 0;
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}
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int bind_irq_vector(int irq, int vector)
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{
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unsigned long flags;
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int ret;
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spin_lock_irqsave(&vector_lock, flags);
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ret = __bind_irq_vector(irq, vector);
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spin_unlock_irqrestore(&vector_lock, flags);
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return ret;
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}
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static void clear_irq_vector(int irq)
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{
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unsigned long flags;
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int vector, cpu;
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spin_lock_irqsave(&vector_lock, flags);
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BUG_ON((unsigned)irq >= NR_IRQS);
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BUG_ON(irq_cfg[irq].vector == IRQ_VECTOR_UNASSIGNED);
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vector = irq_cfg[irq].vector;
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for_each_online_cpu(cpu)
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per_cpu(vector_irq, cpu)[vector] = IA64_SPURIOUS_INT_VECTOR;
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irq_cfg[irq].vector = IRQ_VECTOR_UNASSIGNED;
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irq_status[irq] = IRQ_UNUSED;
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spin_unlock_irqrestore(&vector_lock, flags);
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}
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int
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assign_irq_vector (int irq)
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{
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int pos, vector;
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again:
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pos = find_first_zero_bit(ia64_vector_mask, IA64_NUM_DEVICE_VECTORS);
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vector = IA64_FIRST_DEVICE_VECTOR + pos;
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if (vector > IA64_LAST_DEVICE_VECTOR)
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return -ENOSPC;
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if (test_and_set_bit(pos, ia64_vector_mask))
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goto again;
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unsigned long flags;
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int vector = -ENOSPC;
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if (irq < 0) {
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goto out;
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}
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spin_lock_irqsave(&vector_lock, flags);
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vector = find_unassigned_vector();
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if (vector < 0)
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goto out;
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BUG_ON(__bind_irq_vector(irq, vector));
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spin_unlock_irqrestore(&vector_lock, flags);
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out:
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return vector;
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}
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void
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free_irq_vector (int vector)
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{
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int pos;
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if (vector < IA64_FIRST_DEVICE_VECTOR || vector > IA64_LAST_DEVICE_VECTOR)
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if (vector < IA64_FIRST_DEVICE_VECTOR ||
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vector > IA64_LAST_DEVICE_VECTOR)
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return;
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pos = vector - IA64_FIRST_DEVICE_VECTOR;
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if (!test_and_clear_bit(pos, ia64_vector_mask))
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printk(KERN_WARNING "%s: double free!\n", __FUNCTION__);
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clear_irq_vector(vector);
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}
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int
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reserve_irq_vector (int vector)
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{
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int pos;
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if (vector < IA64_FIRST_DEVICE_VECTOR ||
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vector > IA64_LAST_DEVICE_VECTOR)
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return -EINVAL;
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return !!bind_irq_vector(vector, vector);
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}
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pos = vector - IA64_FIRST_DEVICE_VECTOR;
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return test_and_set_bit(pos, ia64_vector_mask);
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/*
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* Initialize vector_irq on a new cpu. This function must be called
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* with vector_lock held.
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*/
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void __setup_vector_irq(int cpu)
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{
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int irq, vector;
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/* Clear vector_irq */
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for (vector = 0; vector < IA64_NUM_VECTORS; ++vector)
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per_cpu(vector_irq, cpu)[vector] = IA64_SPURIOUS_INT_VECTOR;
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/* Mark the inuse vectors */
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for (irq = 0; irq < NR_IRQS; ++irq) {
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if ((vector = irq_to_vector(irq)) != IRQ_VECTOR_UNASSIGNED)
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per_cpu(vector_irq, cpu)[vector] = irq;
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}
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}
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void destroy_and_reserve_irq(unsigned int irq)
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{
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dynamic_irq_cleanup(irq);
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clear_irq_vector(irq);
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reserve_irq(irq);
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}
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/*
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@ -111,18 +232,29 @@ reserve_irq_vector (int vector)
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*/
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int create_irq(void)
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{
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int vector = assign_irq_vector(AUTO_ASSIGN);
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unsigned long flags;
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int irq, vector;
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if (vector >= 0)
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dynamic_irq_init(vector);
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return vector;
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irq = -ENOSPC;
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spin_lock_irqsave(&vector_lock, flags);
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vector = find_unassigned_vector();
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if (vector < 0)
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goto out;
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irq = find_unassigned_irq();
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if (irq < 0)
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goto out;
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BUG_ON(__bind_irq_vector(irq, vector));
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out:
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spin_unlock_irqrestore(&vector_lock, flags);
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if (irq >= 0)
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dynamic_irq_init(irq);
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return irq;
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}
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void destroy_irq(unsigned int irq)
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{
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dynamic_irq_cleanup(irq);
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free_irq_vector(irq);
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clear_irq_vector(irq);
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}
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#ifdef CONFIG_SMP
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@ -301,14 +433,13 @@ register_percpu_irq (ia64_vector vec, struct irqaction *action)
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irq_desc_t *desc;
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unsigned int irq;
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for (irq = 0; irq < NR_IRQS; ++irq)
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if (irq_to_vector(irq) == vec) {
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irq = vec;
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BUG_ON(bind_irq_vector(irq, vec));
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desc = irq_desc + irq;
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desc->status |= IRQ_PER_CPU;
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desc->chip = &irq_type_ia64_lsapic;
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if (action)
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setup_irq(irq, action);
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}
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}
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void __init
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@ -395,9 +395,13 @@ smp_callin (void)
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fix_b0_for_bsp();
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lock_ipi_calllock();
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spin_lock(&vector_lock);
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/* Setup the per cpu irq handling data structures */
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__setup_vector_irq(cpuid);
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cpu_set(cpuid, cpu_online_map);
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unlock_ipi_calllock();
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per_cpu(cpu_state, cpuid) = CPU_ONLINE;
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spin_unlock(&vector_lock);
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smp_setup_percpu_timer();
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@ -90,13 +90,24 @@ enum {
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extern __u8 isa_irq_to_vector_map[16];
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#define isa_irq_to_vector(x) isa_irq_to_vector_map[(x)]
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struct irq_cfg {
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ia64_vector vector;
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};
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extern spinlock_t vector_lock;
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extern struct irq_cfg irq_cfg[NR_IRQS];
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DECLARE_PER_CPU(int[IA64_NUM_VECTORS], vector_irq);
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extern struct hw_interrupt_type irq_type_ia64_lsapic; /* CPU-internal interrupt controller */
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extern int bind_irq_vector(int irq, int vector);
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extern int assign_irq_vector (int irq); /* allocate a free vector */
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||||
extern void free_irq_vector (int vector);
|
||||
extern int reserve_irq_vector (int vector);
|
||||
extern void __setup_vector_irq(int cpu);
|
||||
extern void ia64_send_ipi (int cpu, int vector, int delivery_mode, int redirect);
|
||||
extern void register_percpu_irq (ia64_vector vec, struct irqaction *action);
|
||||
extern int check_irq_used (int irq);
|
||||
extern void destroy_and_reserve_irq (unsigned int irq);
|
||||
|
||||
static inline void ia64_resend_irq(unsigned int vector)
|
||||
{
|
||||
|
|
@ -113,7 +124,7 @@ extern irq_desc_t irq_desc[NR_IRQS];
|
|||
static inline unsigned int
|
||||
__ia64_local_vector_to_irq (ia64_vector vec)
|
||||
{
|
||||
return (unsigned int) vec;
|
||||
return __get_cpu_var(vector_irq)[vec];
|
||||
}
|
||||
#endif
|
||||
|
||||
|
|
@ -131,7 +142,7 @@ __ia64_local_vector_to_irq (ia64_vector vec)
|
|||
static inline ia64_vector
|
||||
irq_to_vector (int irq)
|
||||
{
|
||||
return (ia64_vector) irq;
|
||||
return irq_cfg[irq].vector;
|
||||
}
|
||||
|
||||
/*
|
||||
|
|
|
|||
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