x86/pci: add 4 more return parameters to IO_APIC_get_PCI_irq_vector()
To prepare those params for pcibios_irq_enable() to call setup_io_apic_routing(). [ Impact: extend function call API to prepare for new functionality ] Signed-off-by: Yinghai Lu <yinghai@kernel.org> Acked-by: Jesse Barnes <jbarnes@virtuousgeek.org> Cc: Len Brown <lenb@kernel.org> Cc: Andrew Morton <akpm@linux-foundation.org> LKML-Reference: <4A01C406.2040303@kernel.org> Signed-off-by: Ingo Molnar <mingo@elte.hu>
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@ -63,7 +63,9 @@ extern unsigned long io_apic_irqs;
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extern void init_VISWS_APIC_irqs(void);
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extern void setup_IO_APIC(void);
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extern void disable_IO_APIC(void);
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extern int IO_APIC_get_PCI_irq_vector(int bus, int slot, int fn);
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extern int IO_APIC_get_PCI_irq_vector(int bus, int devfn, int pin,
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int *ioapic, int *ioapic_pin,
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int *trigger, int *polarity);
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extern void setup_ioapic_dest(void);
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extern void enable_IO_APIC(void);
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@ -873,54 +873,6 @@ static int __init find_isa_irq_apic(int irq, int type)
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return -1;
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}
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/*
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* Find a specific PCI IRQ entry.
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* Not an __init, possibly needed by modules
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*/
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static int pin_2_irq(int idx, int apic, int pin);
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int IO_APIC_get_PCI_irq_vector(int bus, int slot, int pin)
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{
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int apic, i, best_guess = -1;
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apic_printk(APIC_DEBUG, "querying PCI -> IRQ mapping bus:%d, slot:%d, pin:%d.\n",
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bus, slot, pin);
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if (test_bit(bus, mp_bus_not_pci)) {
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apic_printk(APIC_VERBOSE, "PCI BIOS passed nonexistent PCI bus %d!\n", bus);
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return -1;
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}
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for (i = 0; i < mp_irq_entries; i++) {
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int lbus = mp_irqs[i].srcbus;
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for (apic = 0; apic < nr_ioapics; apic++)
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if (mp_ioapics[apic].apicid == mp_irqs[i].dstapic ||
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mp_irqs[i].dstapic == MP_APIC_ALL)
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break;
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if (!test_bit(lbus, mp_bus_not_pci) &&
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!mp_irqs[i].irqtype &&
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(bus == lbus) &&
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(slot == ((mp_irqs[i].srcbusirq >> 2) & 0x1f))) {
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int irq = pin_2_irq(i, apic, mp_irqs[i].dstirq);
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if (!(apic || IO_APIC_IRQ(irq)))
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continue;
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if (pin == (mp_irqs[i].srcbusirq & 3))
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return irq;
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/*
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* Use the first all-but-pin matching entry as a
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* best-guess fuzzy result for broken mptables.
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*/
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if (best_guess < 0)
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best_guess = irq;
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}
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}
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return best_guess;
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}
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EXPORT_SYMBOL(IO_APIC_get_PCI_irq_vector);
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#if defined(CONFIG_EISA) || defined(CONFIG_MCA)
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/*
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* EISA Edge/Level control register, ELCR
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@ -1139,6 +1091,65 @@ static int pin_2_irq(int idx, int apic, int pin)
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return irq;
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}
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/*
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* Find a specific PCI IRQ entry.
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* Not an __init, possibly needed by modules
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*/
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int IO_APIC_get_PCI_irq_vector(int bus, int slot, int pin,
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int *ioapic, int *ioapic_pin,
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int *trigger, int *polarity)
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{
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int apic, i, best_guess = -1;
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apic_printk(APIC_DEBUG,
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"querying PCI -> IRQ mapping bus:%d, slot:%d, pin:%d.\n",
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bus, slot, pin);
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if (test_bit(bus, mp_bus_not_pci)) {
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apic_printk(APIC_VERBOSE,
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"PCI BIOS passed nonexistent PCI bus %d!\n", bus);
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return -1;
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}
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for (i = 0; i < mp_irq_entries; i++) {
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int lbus = mp_irqs[i].srcbus;
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for (apic = 0; apic < nr_ioapics; apic++)
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if (mp_ioapics[apic].apicid == mp_irqs[i].dstapic ||
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mp_irqs[i].dstapic == MP_APIC_ALL)
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break;
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if (!test_bit(lbus, mp_bus_not_pci) &&
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!mp_irqs[i].irqtype &&
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(bus == lbus) &&
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(slot == ((mp_irqs[i].srcbusirq >> 2) & 0x1f))) {
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int irq = pin_2_irq(i, apic, mp_irqs[i].dstirq);
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if (!(apic || IO_APIC_IRQ(irq)))
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continue;
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if (pin == (mp_irqs[i].srcbusirq & 3)) {
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*ioapic = apic;
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*ioapic_pin = mp_irqs[i].dstirq;
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*trigger = irq_trigger(i);
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*polarity = irq_polarity(i);
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return irq;
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}
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/*
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* Use the first all-but-pin matching entry as a
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* best-guess fuzzy result for broken mptables.
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*/
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if (best_guess < 0) {
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*ioapic = apic;
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*ioapic_pin = mp_irqs[i].dstirq;
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*trigger = irq_trigger(i);
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*polarity = irq_polarity(i);
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best_guess = irq;
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}
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}
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}
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return best_guess;
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}
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EXPORT_SYMBOL(IO_APIC_get_PCI_irq_vector);
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void lock_vector_lock(void)
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{
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/* Used to the online set of cpus does not change
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@ -1051,12 +1051,16 @@ static void __init pcibios_fixup_irqs(void)
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*/
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if (io_apic_assign_pci_irqs) {
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int irq;
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int ioapic = -1, ioapic_pin = -1;
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int triggering, polarity;
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/*
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* interrupt pins are numbered starting from 1
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*/
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irq = IO_APIC_get_PCI_irq_vector(dev->bus->number,
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PCI_SLOT(dev->devfn), pin - 1);
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PCI_SLOT(dev->devfn), pin - 1,
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&ioapic, &ioapic_pin,
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&triggering, &polarity);
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/*
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* Busses behind bridges are typically not listed in the
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* MP-table. In this case we have to look up the IRQ
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@ -1072,7 +1076,10 @@ static void __init pcibios_fixup_irqs(void)
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pin = pci_swizzle_interrupt_pin(dev, pin);
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bus = bridge->bus->number;
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irq = IO_APIC_get_PCI_irq_vector(bus,
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PCI_SLOT(bridge->devfn), pin - 1);
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PCI_SLOT(bridge->devfn),
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pin - 1,
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&ioapic, &ioapic_pin,
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&triggering, &polarity);
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if (irq >= 0)
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dev_warn(&dev->dev,
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"using bridge %s INT %c to "
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@ -1221,8 +1228,14 @@ static int pirq_enable_irq(struct pci_dev *dev)
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if (io_apic_assign_pci_irqs) {
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int irq;
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int ioapic = -1, ioapic_pin = -1;
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int triggering, polarity;
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irq = IO_APIC_get_PCI_irq_vector(dev->bus->number, PCI_SLOT(dev->devfn), pin - 1);
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irq = IO_APIC_get_PCI_irq_vector(dev->bus->number,
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PCI_SLOT(dev->devfn),
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pin - 1,
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&ioapic, &ioapic_pin,
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&triggering, &polarity);
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/*
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* Busses behind bridges are typically not listed in the MP-table.
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* In this case we have to look up the IRQ based on the parent bus,
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@ -1235,7 +1248,10 @@ static int pirq_enable_irq(struct pci_dev *dev)
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pin = pci_swizzle_interrupt_pin(dev, pin);
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irq = IO_APIC_get_PCI_irq_vector(bridge->bus->number,
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PCI_SLOT(bridge->devfn), pin - 1);
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PCI_SLOT(bridge->devfn),
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pin - 1,
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&ioapic, &ioapic_pin,
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&triggering, &polarity);
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if (irq >= 0)
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dev_warn(&dev->dev, "using bridge %s "
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"INT %c to get IRQ %d\n",
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@ -153,45 +153,49 @@ int ibmphp_init_devno(struct slot **cur_slot)
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return -1;
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}
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for (loop = 0; loop < len; loop++) {
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if ((*cur_slot)->number == rtable->slots[loop].slot) {
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if ((*cur_slot)->bus == rtable->slots[loop].bus) {
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if ((*cur_slot)->number == rtable->slots[loop].slot &&
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(*cur_slot)->bus == rtable->slots[loop].bus) {
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int ioapic = -1, ioapic_pin = -1;
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int triggering, polarity;
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(*cur_slot)->device = PCI_SLOT(rtable->slots[loop].devfn);
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for (i = 0; i < 4; i++)
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(*cur_slot)->irq[i] = IO_APIC_get_PCI_irq_vector((int) (*cur_slot)->bus,
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(int) (*cur_slot)->device, i);
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(int) (*cur_slot)->device, i.
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&ioapic, &ioapic_pin,
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&triggering, &polarity);
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debug("(*cur_slot)->irq[0] = %x\n",
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(*cur_slot)->irq[0]);
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debug("(*cur_slot)->irq[1] = %x\n",
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(*cur_slot)->irq[1]);
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debug("(*cur_slot)->irq[2] = %x\n",
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(*cur_slot)->irq[2]);
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debug("(*cur_slot)->irq[3] = %x\n",
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(*cur_slot)->irq[3]);
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debug("(*cur_slot)->irq[0] = %x\n",
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(*cur_slot)->irq[0]);
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debug("(*cur_slot)->irq[1] = %x\n",
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(*cur_slot)->irq[1]);
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debug("(*cur_slot)->irq[2] = %x\n",
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(*cur_slot)->irq[2]);
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debug("(*cur_slot)->irq[3] = %x\n",
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(*cur_slot)->irq[3]);
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debug("rtable->exlusive_irqs = %x\n",
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debug("rtable->exlusive_irqs = %x\n",
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rtable->exclusive_irqs);
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debug("rtable->slots[loop].irq[0].bitmap = %x\n",
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debug("rtable->slots[loop].irq[0].bitmap = %x\n",
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rtable->slots[loop].irq[0].bitmap);
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debug("rtable->slots[loop].irq[1].bitmap = %x\n",
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debug("rtable->slots[loop].irq[1].bitmap = %x\n",
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rtable->slots[loop].irq[1].bitmap);
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debug("rtable->slots[loop].irq[2].bitmap = %x\n",
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debug("rtable->slots[loop].irq[2].bitmap = %x\n",
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rtable->slots[loop].irq[2].bitmap);
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debug("rtable->slots[loop].irq[3].bitmap = %x\n",
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debug("rtable->slots[loop].irq[3].bitmap = %x\n",
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rtable->slots[loop].irq[3].bitmap);
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debug("rtable->slots[loop].irq[0].link = %x\n",
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debug("rtable->slots[loop].irq[0].link = %x\n",
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rtable->slots[loop].irq[0].link);
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debug("rtable->slots[loop].irq[1].link = %x\n",
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debug("rtable->slots[loop].irq[1].link = %x\n",
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rtable->slots[loop].irq[1].link);
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debug("rtable->slots[loop].irq[2].link = %x\n",
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debug("rtable->slots[loop].irq[2].link = %x\n",
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rtable->slots[loop].irq[2].link);
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debug("rtable->slots[loop].irq[3].link = %x\n",
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debug("rtable->slots[loop].irq[3].link = %x\n",
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rtable->slots[loop].irq[3].link);
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debug("end of init_devno\n");
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kfree(rtable);
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return 0;
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}
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debug("end of init_devno\n");
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kfree(rtable);
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return 0;
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}
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}
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