drm/amdgpu: fix vf error handling
The error handling for virtual functions assumed a single vf per VM and didn't properly account for bare metal. Make the error arrays per device and add locking. Reviewed-by: Gavin Wan <gavin.wan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Родитель
6f87a89570
Коммит
e23b74aab5
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@ -2040,6 +2040,7 @@ int amdgpu_device_init(struct amdgpu_device *adev,
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mutex_init(&adev->srbm_mutex);
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mutex_init(&adev->srbm_mutex);
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mutex_init(&adev->grbm_idx_mutex);
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mutex_init(&adev->grbm_idx_mutex);
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mutex_init(&adev->mn_lock);
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mutex_init(&adev->mn_lock);
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mutex_init(&adev->virt.vf_errors.lock);
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hash_init(adev->mn_hash);
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hash_init(adev->mn_hash);
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amdgpu_check_arguments(adev);
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amdgpu_check_arguments(adev);
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@ -2125,7 +2126,7 @@ int amdgpu_device_init(struct amdgpu_device *adev,
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r = amdgpu_atombios_init(adev);
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r = amdgpu_atombios_init(adev);
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if (r) {
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if (r) {
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dev_err(adev->dev, "amdgpu_atombios_init failed\n");
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dev_err(adev->dev, "amdgpu_atombios_init failed\n");
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amdgpu_vf_error_put(AMDGIM_ERROR_VF_ATOMBIOS_INIT_FAIL, 0, 0);
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amdgpu_vf_error_put(adev, AMDGIM_ERROR_VF_ATOMBIOS_INIT_FAIL, 0, 0);
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goto failed;
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goto failed;
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}
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}
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@ -2136,7 +2137,7 @@ int amdgpu_device_init(struct amdgpu_device *adev,
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if (amdgpu_vpost_needed(adev)) {
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if (amdgpu_vpost_needed(adev)) {
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if (!adev->bios) {
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if (!adev->bios) {
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dev_err(adev->dev, "no vBIOS found\n");
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dev_err(adev->dev, "no vBIOS found\n");
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amdgpu_vf_error_put(AMDGIM_ERROR_VF_NO_VBIOS, 0, 0);
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amdgpu_vf_error_put(adev, AMDGIM_ERROR_VF_NO_VBIOS, 0, 0);
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r = -EINVAL;
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r = -EINVAL;
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goto failed;
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goto failed;
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}
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}
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@ -2144,7 +2145,7 @@ int amdgpu_device_init(struct amdgpu_device *adev,
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r = amdgpu_atom_asic_init(adev->mode_info.atom_context);
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r = amdgpu_atom_asic_init(adev->mode_info.atom_context);
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if (r) {
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if (r) {
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dev_err(adev->dev, "gpu post error!\n");
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dev_err(adev->dev, "gpu post error!\n");
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amdgpu_vf_error_put(AMDGIM_ERROR_VF_GPU_POST_ERROR, 0, 0);
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amdgpu_vf_error_put(adev, AMDGIM_ERROR_VF_GPU_POST_ERROR, 0, 0);
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goto failed;
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goto failed;
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}
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}
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} else {
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} else {
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@ -2156,7 +2157,7 @@ int amdgpu_device_init(struct amdgpu_device *adev,
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r = amdgpu_atomfirmware_get_clock_info(adev);
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r = amdgpu_atomfirmware_get_clock_info(adev);
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if (r) {
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if (r) {
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dev_err(adev->dev, "amdgpu_atomfirmware_get_clock_info failed\n");
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dev_err(adev->dev, "amdgpu_atomfirmware_get_clock_info failed\n");
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amdgpu_vf_error_put(AMDGIM_ERROR_VF_ATOMBIOS_GET_CLOCK_FAIL, 0, 0);
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amdgpu_vf_error_put(adev, AMDGIM_ERROR_VF_ATOMBIOS_GET_CLOCK_FAIL, 0, 0);
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goto failed;
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goto failed;
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}
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}
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} else {
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} else {
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@ -2164,7 +2165,7 @@ int amdgpu_device_init(struct amdgpu_device *adev,
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r = amdgpu_atombios_get_clock_info(adev);
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r = amdgpu_atombios_get_clock_info(adev);
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if (r) {
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if (r) {
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dev_err(adev->dev, "amdgpu_atombios_get_clock_info failed\n");
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dev_err(adev->dev, "amdgpu_atombios_get_clock_info failed\n");
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amdgpu_vf_error_put(AMDGIM_ERROR_VF_ATOMBIOS_GET_CLOCK_FAIL, 0, 0);
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amdgpu_vf_error_put(adev, AMDGIM_ERROR_VF_ATOMBIOS_GET_CLOCK_FAIL, 0, 0);
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goto failed;
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goto failed;
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}
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}
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/* init i2c buses */
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/* init i2c buses */
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@ -2175,7 +2176,7 @@ int amdgpu_device_init(struct amdgpu_device *adev,
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r = amdgpu_fence_driver_init(adev);
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r = amdgpu_fence_driver_init(adev);
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if (r) {
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if (r) {
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dev_err(adev->dev, "amdgpu_fence_driver_init failed\n");
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dev_err(adev->dev, "amdgpu_fence_driver_init failed\n");
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amdgpu_vf_error_put(AMDGIM_ERROR_VF_FENCE_INIT_FAIL, 0, 0);
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amdgpu_vf_error_put(adev, AMDGIM_ERROR_VF_FENCE_INIT_FAIL, 0, 0);
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goto failed;
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goto failed;
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}
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}
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@ -2185,7 +2186,7 @@ int amdgpu_device_init(struct amdgpu_device *adev,
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r = amdgpu_init(adev);
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r = amdgpu_init(adev);
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if (r) {
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if (r) {
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dev_err(adev->dev, "amdgpu_init failed\n");
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dev_err(adev->dev, "amdgpu_init failed\n");
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amdgpu_vf_error_put(AMDGIM_ERROR_VF_AMDGPU_INIT_FAIL, 0, 0);
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amdgpu_vf_error_put(adev, AMDGIM_ERROR_VF_AMDGPU_INIT_FAIL, 0, 0);
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amdgpu_fini(adev);
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amdgpu_fini(adev);
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goto failed;
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goto failed;
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}
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}
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@ -2205,7 +2206,7 @@ int amdgpu_device_init(struct amdgpu_device *adev,
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r = amdgpu_ib_pool_init(adev);
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r = amdgpu_ib_pool_init(adev);
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if (r) {
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if (r) {
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dev_err(adev->dev, "IB initialization failed (%d).\n", r);
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dev_err(adev->dev, "IB initialization failed (%d).\n", r);
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amdgpu_vf_error_put(AMDGIM_ERROR_VF_IB_INIT_FAIL, 0, r);
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amdgpu_vf_error_put(adev, AMDGIM_ERROR_VF_IB_INIT_FAIL, 0, r);
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goto failed;
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goto failed;
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}
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}
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@ -2254,7 +2255,7 @@ int amdgpu_device_init(struct amdgpu_device *adev,
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r = amdgpu_late_init(adev);
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r = amdgpu_late_init(adev);
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if (r) {
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if (r) {
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dev_err(adev->dev, "amdgpu_late_init failed\n");
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dev_err(adev->dev, "amdgpu_late_init failed\n");
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amdgpu_vf_error_put(AMDGIM_ERROR_VF_AMDGPU_LATE_INIT_FAIL, 0, r);
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amdgpu_vf_error_put(adev, AMDGIM_ERROR_VF_AMDGPU_LATE_INIT_FAIL, 0, r);
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goto failed;
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goto failed;
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}
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}
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@ -2936,7 +2937,7 @@ out:
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}
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}
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} else {
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} else {
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dev_err(adev->dev, "asic resume failed (%d).\n", r);
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dev_err(adev->dev, "asic resume failed (%d).\n", r);
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amdgpu_vf_error_put(AMDGIM_ERROR_VF_ASIC_RESUME_FAIL, 0, r);
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amdgpu_vf_error_put(adev, AMDGIM_ERROR_VF_ASIC_RESUME_FAIL, 0, r);
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for (i = 0; i < AMDGPU_MAX_RINGS; ++i) {
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for (i = 0; i < AMDGPU_MAX_RINGS; ++i) {
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if (adev->rings[i] && adev->rings[i]->sched.thread) {
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if (adev->rings[i] && adev->rings[i]->sched.thread) {
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kthread_unpark(adev->rings[i]->sched.thread);
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kthread_unpark(adev->rings[i]->sched.thread);
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@ -2950,7 +2951,7 @@ out:
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if (r) {
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if (r) {
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/* bad news, how to tell it to userspace ? */
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/* bad news, how to tell it to userspace ? */
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dev_info(adev->dev, "GPU reset failed\n");
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dev_info(adev->dev, "GPU reset failed\n");
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amdgpu_vf_error_put(AMDGIM_ERROR_VF_GPU_RESET_FAIL, 0, r);
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amdgpu_vf_error_put(adev, AMDGIM_ERROR_VF_GPU_RESET_FAIL, 0, r);
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}
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}
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else {
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else {
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dev_info(adev->dev, "GPU reset successed!\n");
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dev_info(adev->dev, "GPU reset successed!\n");
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@ -25,30 +25,21 @@
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#include "amdgpu_vf_error.h"
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#include "amdgpu_vf_error.h"
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#include "mxgpu_ai.h"
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#include "mxgpu_ai.h"
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#define AMDGPU_VF_ERROR_ENTRY_SIZE 16
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void amdgpu_vf_error_put(struct amdgpu_device *adev,
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uint16_t sub_error_code,
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/* struct error_entry - amdgpu VF error information. */
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uint16_t error_flags,
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struct amdgpu_vf_error_buffer {
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uint64_t error_data)
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int read_count;
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int write_count;
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uint16_t code[AMDGPU_VF_ERROR_ENTRY_SIZE];
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uint16_t flags[AMDGPU_VF_ERROR_ENTRY_SIZE];
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uint64_t data[AMDGPU_VF_ERROR_ENTRY_SIZE];
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};
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struct amdgpu_vf_error_buffer admgpu_vf_errors;
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void amdgpu_vf_error_put(uint16_t sub_error_code, uint16_t error_flags, uint64_t error_data)
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{
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{
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int index;
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int index;
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uint16_t error_code = AMDGIM_ERROR_CODE(AMDGIM_ERROR_CATEGORY_VF, sub_error_code);
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uint16_t error_code = AMDGIM_ERROR_CODE(AMDGIM_ERROR_CATEGORY_VF, sub_error_code);
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index = admgpu_vf_errors.write_count % AMDGPU_VF_ERROR_ENTRY_SIZE;
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mutex_lock(&adev->virt.vf_errors.lock);
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admgpu_vf_errors.code [index] = error_code;
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index = adev->virt.vf_errors.write_count % AMDGPU_VF_ERROR_ENTRY_SIZE;
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admgpu_vf_errors.flags [index] = error_flags;
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adev->virt.vf_errors.code [index] = error_code;
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admgpu_vf_errors.data [index] = error_data;
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adev->virt.vf_errors.flags [index] = error_flags;
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admgpu_vf_errors.write_count ++;
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adev->virt.vf_errors.data [index] = error_data;
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adev->virt.vf_errors.write_count ++;
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mutex_unlock(&adev->virt.vf_errors.lock);
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}
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}
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@ -58,7 +49,8 @@ void amdgpu_vf_error_trans_all(struct amdgpu_device *adev)
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u32 data1, data2, data3;
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u32 data1, data2, data3;
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int index;
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int index;
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if ((NULL == adev) || (!amdgpu_sriov_vf(adev)) || (!adev->virt.ops) || (!adev->virt.ops->trans_msg)) {
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if ((NULL == adev) || (!amdgpu_sriov_vf(adev)) ||
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(!adev->virt.ops) || (!adev->virt.ops->trans_msg)) {
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return;
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return;
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}
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}
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/*
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/*
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@ -68,18 +60,22 @@ void amdgpu_vf_error_trans_all(struct amdgpu_device *adev)
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return;
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return;
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}
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}
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*/
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*/
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mutex_lock(&adev->virt.vf_errors.lock);
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/* The errors are overlay of array, correct read_count as full. */
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/* The errors are overlay of array, correct read_count as full. */
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if (admgpu_vf_errors.write_count - admgpu_vf_errors.read_count > AMDGPU_VF_ERROR_ENTRY_SIZE) {
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if (adev->virt.vf_errors.write_count - adev->virt.vf_errors.read_count > AMDGPU_VF_ERROR_ENTRY_SIZE) {
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admgpu_vf_errors.read_count = admgpu_vf_errors.write_count - AMDGPU_VF_ERROR_ENTRY_SIZE;
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adev->virt.vf_errors.read_count = adev->virt.vf_errors.write_count - AMDGPU_VF_ERROR_ENTRY_SIZE;
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}
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}
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while (admgpu_vf_errors.read_count < admgpu_vf_errors.write_count) {
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while (adev->virt.vf_errors.read_count < adev->virt.vf_errors.write_count) {
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index =admgpu_vf_errors.read_count % AMDGPU_VF_ERROR_ENTRY_SIZE;
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index =adev->virt.vf_errors.read_count % AMDGPU_VF_ERROR_ENTRY_SIZE;
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data1 = AMDGIM_ERROR_CODE_FLAGS_TO_MAILBOX (admgpu_vf_errors.code[index], admgpu_vf_errors.flags[index]);
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data1 = AMDGIM_ERROR_CODE_FLAGS_TO_MAILBOX(adev->virt.vf_errors.code[index],
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data2 = admgpu_vf_errors.data[index] & 0xFFFFFFFF;
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adev->virt.vf_errors.flags[index]);
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data3 = (admgpu_vf_errors.data[index] >> 32) & 0xFFFFFFFF;
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data2 = adev->virt.vf_errors.data[index] & 0xFFFFFFFF;
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data3 = (adev->virt.vf_errors.data[index] >> 32) & 0xFFFFFFFF;
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adev->virt.ops->trans_msg(adev, IDH_LOG_VF_ERROR, data1, data2, data3);
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adev->virt.ops->trans_msg(adev, IDH_LOG_VF_ERROR, data1, data2, data3);
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admgpu_vf_errors.read_count ++;
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adev->virt.vf_errors.read_count ++;
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}
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}
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mutex_unlock(&adev->virt.vf_errors.lock);
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}
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}
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@ -56,7 +56,10 @@ enum AMDGIM_ERROR_CATEGORY {
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AMDGIM_ERROR_CATEGORY_MAX
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AMDGIM_ERROR_CATEGORY_MAX
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};
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};
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void amdgpu_vf_error_put(uint16_t sub_error_code, uint16_t error_flags, uint64_t error_data);
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void amdgpu_vf_error_put(struct amdgpu_device *adev,
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uint16_t sub_error_code,
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uint16_t error_flags,
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uint64_t error_data);
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void amdgpu_vf_error_trans_all (struct amdgpu_device *adev);
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void amdgpu_vf_error_trans_all (struct amdgpu_device *adev);
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#endif /* __VF_ERROR_H__ */
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#endif /* __VF_ERROR_H__ */
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@ -36,6 +36,18 @@ struct amdgpu_mm_table {
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uint64_t gpu_addr;
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uint64_t gpu_addr;
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};
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};
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#define AMDGPU_VF_ERROR_ENTRY_SIZE 16
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/* struct error_entry - amdgpu VF error information. */
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struct amdgpu_vf_error_buffer {
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struct mutex lock;
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int read_count;
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int write_count;
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uint16_t code[AMDGPU_VF_ERROR_ENTRY_SIZE];
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uint16_t flags[AMDGPU_VF_ERROR_ENTRY_SIZE];
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uint64_t data[AMDGPU_VF_ERROR_ENTRY_SIZE];
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};
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/**
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/**
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* struct amdgpu_virt_ops - amdgpu device virt operations
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* struct amdgpu_virt_ops - amdgpu device virt operations
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*/
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*/
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@ -59,6 +71,7 @@ struct amdgpu_virt {
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struct work_struct flr_work;
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struct work_struct flr_work;
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struct amdgpu_mm_table mm_table;
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struct amdgpu_mm_table mm_table;
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const struct amdgpu_virt_ops *ops;
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const struct amdgpu_virt_ops *ops;
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struct amdgpu_vf_error_buffer vf_errors;
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};
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};
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#define AMDGPU_CSA_SIZE (8 * 1024)
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#define AMDGPU_CSA_SIZE (8 * 1024)
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