[POWERPC] Add cpufreq support for Xserve G5
The Xserve G5 are capable of frequency switching like other desktop G5s. This enables it. It also fix a Kconfig issue which prevented from building the G5 cpufreq support if CONFIG_PMAC_SMU was not set (the first version of that driver only worked with SMU based macs, but this isn't the case anymore). Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
This commit is contained in:
Benjamin Herrenschmidt
Paul Mackerras
Родитель
8279d2e606
Коммит
e272a28534
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@ -504,7 +504,7 @@ config CPU_FREQ_PMAC
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config CPU_FREQ_PMAC64
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bool "Support for some Apple G5s"
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depends on CPU_FREQ && PMAC_SMU && PPC64
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depends on CPU_FREQ && PPC64
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select CPU_FREQ_TABLE
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help
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This adds support for frequency switching on Apple iMac G5,
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@ -10,6 +10,8 @@
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* that is iMac G5 and latest single CPU desktop.
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*/
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#undef DEBUG
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#include <linux/module.h>
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#include <linux/types.h>
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#include <linux/errno.h>
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@ -30,13 +32,7 @@
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#include <asm/smu.h>
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#include <asm/pmac_pfunc.h>
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#undef DEBUG
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#ifdef DEBUG
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#define DBG(fmt...) printk(fmt)
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#else
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#define DBG(fmt...)
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#endif
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#define DBG(fmt...) pr_debug(fmt)
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/* see 970FX user manual */
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@ -82,8 +78,6 @@ static struct freq_attr* g5_cpu_freqs_attr[] = {
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/* Power mode data is an array of the 32 bits PCR values to use for
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* the various frequencies, retrieved from the device-tree
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*/
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static u32 *g5_pmode_data;
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static int g5_pmode_max;
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static int g5_pmode_cur;
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static void (*g5_switch_volt)(int speed_mode);
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@ -93,6 +87,11 @@ static int (*g5_query_freq)(void);
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static DEFINE_MUTEX(g5_switch_mutex);
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#ifdef CONFIG_PMAC_SMU
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static u32 *g5_pmode_data;
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static int g5_pmode_max;
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static struct smu_sdbp_fvt *g5_fvt_table; /* table of op. points */
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static int g5_fvt_count; /* number of op. points */
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static int g5_fvt_cur; /* current op. point */
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@ -209,6 +208,16 @@ static int g5_scom_query_freq(void)
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return i;
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}
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/*
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* Fake voltage switching for platforms with missing support
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*/
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static void g5_dummy_switch_volt(int speed_mode)
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{
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}
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#endif /* CONFIG_PMAC_SMU */
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/*
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* Platform function based voltage switching for PowerMac7,2 & 7,3
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*/
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@ -248,6 +257,9 @@ static int g5_pfunc_switch_freq(int speed_mode)
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struct pmf_args args;
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u32 done = 0;
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unsigned long timeout;
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int rc;
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DBG("g5_pfunc_switch_freq(%d)\n", speed_mode);
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/* If frequency is going up, first ramp up the voltage */
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if (speed_mode < g5_pmode_cur)
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@ -255,9 +267,12 @@ static int g5_pfunc_switch_freq(int speed_mode)
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/* Do it */
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if (speed_mode == CPUFREQ_HIGH)
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pmf_call_one(pfunc_cpu_setfreq_high, NULL);
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rc = pmf_call_one(pfunc_cpu_setfreq_high, NULL);
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else
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pmf_call_one(pfunc_cpu_setfreq_low, NULL);
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rc = pmf_call_one(pfunc_cpu_setfreq_low, NULL);
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if (rc)
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printk(KERN_WARNING "cpufreq: pfunc switch error %d\n", rc);
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/* It's an irq GPIO so we should be able to just block here,
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* I'll do that later after I've properly tested the IRQ code for
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@ -296,13 +311,6 @@ static int g5_pfunc_query_freq(void)
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return val ? CPUFREQ_HIGH : CPUFREQ_LOW;
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}
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/*
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* Fake voltage switching for platforms with missing support
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*/
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static void g5_dummy_switch_volt(int speed_mode)
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{
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}
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/*
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* Common interface to the cpufreq core
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@ -375,6 +383,8 @@ static struct cpufreq_driver g5_cpufreq_driver = {
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};
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#ifdef CONFIG_PMAC_SMU
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static int __init g5_neo2_cpufreq_init(struct device_node *cpus)
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{
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struct device_node *cpunode;
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@ -525,6 +535,9 @@ static int __init g5_neo2_cpufreq_init(struct device_node *cpus)
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return rc;
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}
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#endif /* CONFIG_PMAC_SMU */
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static int __init g5_pm72_cpufreq_init(struct device_node *cpus)
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{
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struct device_node *cpuid = NULL, *hwclock = NULL, *cpunode = NULL;
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@ -533,6 +546,9 @@ static int __init g5_pm72_cpufreq_init(struct device_node *cpus)
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u64 max_freq, min_freq, ih, il;
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int has_volt = 1, rc = 0;
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DBG("cpufreq: Initializing for PowerMac7,2, PowerMac7,3 and"
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" RackMac3,1...\n");
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/* Get first CPU node */
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for (cpunode = NULL;
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(cpunode = of_get_next_child(cpus, cpunode)) != NULL;) {
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@ -636,6 +652,15 @@ static int __init g5_pm72_cpufreq_init(struct device_node *cpus)
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*/
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ih = *((u32 *)(eeprom + 0x10));
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il = *((u32 *)(eeprom + 0x20));
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/* Check for machines with no useful settings */
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if (il == ih) {
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printk(KERN_WARNING "cpufreq: No low frequency mode available"
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" on this model !\n");
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rc = -ENODEV;
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goto bail;
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}
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min_freq = 0;
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if (ih != 0 && il != 0)
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min_freq = (max_freq * il) / ih;
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@ -643,7 +668,7 @@ static int __init g5_pm72_cpufreq_init(struct device_node *cpus)
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/* Sanity check */
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if (min_freq >= max_freq || min_freq < 1000) {
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printk(KERN_ERR "cpufreq: Can't calculate low frequency !\n");
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rc = -ENODEV;
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rc = -ENXIO;
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goto bail;
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}
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g5_cpu_freqs[0].frequency = max_freq;
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@ -690,16 +715,10 @@ static int __init g5_pm72_cpufreq_init(struct device_node *cpus)
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return rc;
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}
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static int __init g5_rm31_cpufreq_init(struct device_node *cpus)
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{
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/* NYI */
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return 0;
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}
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static int __init g5_cpufreq_init(void)
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{
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struct device_node *cpus;
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int rc;
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int rc = 0;
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cpus = of_find_node_by_path("/cpus");
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if (cpus == NULL) {
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@ -708,12 +727,13 @@ static int __init g5_cpufreq_init(void)
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}
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if (machine_is_compatible("PowerMac7,2") ||
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machine_is_compatible("PowerMac7,3"))
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machine_is_compatible("PowerMac7,3") ||
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machine_is_compatible("RackMac3,1"))
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rc = g5_pm72_cpufreq_init(cpus);
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else if (machine_is_compatible("RackMac3,1"))
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rc = g5_rm31_cpufreq_init(cpus);
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#ifdef CONFIG_PMAC_SMU
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else
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rc = g5_neo2_cpufreq_init(cpus);
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#endif /* CONFIG_PMAC_SMU */
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of_node_put(cpus);
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return rc;
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