power: improve inline asm memory constraints
Use "+m" rather than a combination of "=m" and "m" for improved clarity and consistency. Signed-off-by: Linus Torvalds <torvalds@osdl.org>
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a496e25dfb
Коммит
e2a3d40258
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@ -27,8 +27,8 @@ static __inline__ void atomic_add(int a, atomic_t *v)
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PPC405_ERR77(0,%3)
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" stwcx. %0,0,%3 \n\
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bne- 1b"
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: "=&r" (t), "=m" (v->counter)
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: "r" (a), "r" (&v->counter), "m" (v->counter)
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: "=&r" (t), "+m" (v->counter)
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: "r" (a), "r" (&v->counter)
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: "cc");
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}
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@ -63,8 +63,8 @@ static __inline__ void atomic_sub(int a, atomic_t *v)
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PPC405_ERR77(0,%3)
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" stwcx. %0,0,%3 \n\
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bne- 1b"
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: "=&r" (t), "=m" (v->counter)
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: "r" (a), "r" (&v->counter), "m" (v->counter)
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: "=&r" (t), "+m" (v->counter)
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: "r" (a), "r" (&v->counter)
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: "cc");
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}
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@ -97,8 +97,8 @@ static __inline__ void atomic_inc(atomic_t *v)
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PPC405_ERR77(0,%2)
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" stwcx. %0,0,%2 \n\
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bne- 1b"
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: "=&r" (t), "=m" (v->counter)
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: "r" (&v->counter), "m" (v->counter)
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: "=&r" (t), "+m" (v->counter)
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: "r" (&v->counter)
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: "cc");
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}
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@ -141,8 +141,8 @@ static __inline__ void atomic_dec(atomic_t *v)
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PPC405_ERR77(0,%2)\
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" stwcx. %0,0,%2\n\
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bne- 1b"
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: "=&r" (t), "=m" (v->counter)
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: "r" (&v->counter), "m" (v->counter)
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: "=&r" (t), "+m" (v->counter)
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: "r" (&v->counter)
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: "cc");
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}
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@ -253,8 +253,8 @@ static __inline__ void atomic64_add(long a, atomic64_t *v)
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add %0,%2,%0\n\
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stdcx. %0,0,%3 \n\
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bne- 1b"
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: "=&r" (t), "=m" (v->counter)
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: "r" (a), "r" (&v->counter), "m" (v->counter)
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: "=&r" (t), "+m" (v->counter)
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: "r" (a), "r" (&v->counter)
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: "cc");
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}
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@ -287,8 +287,8 @@ static __inline__ void atomic64_sub(long a, atomic64_t *v)
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subf %0,%2,%0\n\
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stdcx. %0,0,%3 \n\
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bne- 1b"
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: "=&r" (t), "=m" (v->counter)
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: "r" (a), "r" (&v->counter), "m" (v->counter)
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: "=&r" (t), "+m" (v->counter)
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: "r" (a), "r" (&v->counter)
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: "cc");
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}
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@ -319,8 +319,8 @@ static __inline__ void atomic64_inc(atomic64_t *v)
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addic %0,%0,1\n\
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stdcx. %0,0,%2 \n\
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bne- 1b"
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: "=&r" (t), "=m" (v->counter)
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: "r" (&v->counter), "m" (v->counter)
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: "=&r" (t), "+m" (v->counter)
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: "r" (&v->counter)
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: "cc");
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}
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@ -361,8 +361,8 @@ static __inline__ void atomic64_dec(atomic64_t *v)
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addic %0,%0,-1\n\
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stdcx. %0,0,%2\n\
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bne- 1b"
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: "=&r" (t), "=m" (v->counter)
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: "r" (&v->counter), "m" (v->counter)
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: "=&r" (t), "+m" (v->counter)
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: "r" (&v->counter)
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: "cc");
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}
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@ -65,8 +65,8 @@ static __inline__ void set_bit(int nr, volatile unsigned long *addr)
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PPC405_ERR77(0,%3)
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PPC_STLCX "%0,0,%3\n"
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"bne- 1b"
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: "=&r"(old), "=m"(*p)
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: "r"(mask), "r"(p), "m"(*p)
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: "=&r" (old), "+m" (*p)
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: "r" (mask), "r" (p)
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: "cc" );
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}
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@ -82,8 +82,8 @@ static __inline__ void clear_bit(int nr, volatile unsigned long *addr)
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PPC405_ERR77(0,%3)
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PPC_STLCX "%0,0,%3\n"
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"bne- 1b"
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: "=&r"(old), "=m"(*p)
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: "r"(mask), "r"(p), "m"(*p)
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: "=&r" (old), "+m" (*p)
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: "r" (mask), "r" (p)
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: "cc" );
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}
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@ -99,8 +99,8 @@ static __inline__ void change_bit(int nr, volatile unsigned long *addr)
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PPC405_ERR77(0,%3)
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PPC_STLCX "%0,0,%3\n"
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"bne- 1b"
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: "=&r"(old), "=m"(*p)
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: "r"(mask), "r"(p), "m"(*p)
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: "=&r" (old), "+m" (*p)
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: "r" (mask), "r" (p)
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: "cc" );
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}
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@ -179,8 +179,8 @@ static __inline__ void set_bits(unsigned long mask, unsigned long *addr)
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"or %0,%0,%2\n"
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PPC_STLCX "%0,0,%3\n"
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"bne- 1b"
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: "=&r" (old), "=m" (*addr)
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: "r" (mask), "r" (addr), "m" (*addr)
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: "=&r" (old), "+m" (*addr)
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: "r" (mask), "r" (addr)
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: "cc");
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}
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@ -220,8 +220,8 @@ __xchg_u32(volatile void *p, unsigned long val)
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" stwcx. %3,0,%2 \n\
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bne- 1b"
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ISYNC_ON_SMP
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: "=&r" (prev), "=m" (*(volatile unsigned int *)p)
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: "r" (p), "r" (val), "m" (*(volatile unsigned int *)p)
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: "=&r" (prev), "+m" (*(volatile unsigned int *)p)
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: "r" (p), "r" (val)
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: "cc", "memory");
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return prev;
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@ -240,8 +240,8 @@ __xchg_u64(volatile void *p, unsigned long val)
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" stdcx. %3,0,%2 \n\
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bne- 1b"
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ISYNC_ON_SMP
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: "=&r" (prev), "=m" (*(volatile unsigned long *)p)
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: "r" (p), "r" (val), "m" (*(volatile unsigned long *)p)
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: "=&r" (prev), "+m" (*(volatile unsigned long *)p)
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: "r" (p), "r" (val)
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: "cc", "memory");
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return prev;
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@ -299,8 +299,8 @@ __cmpxchg_u32(volatile unsigned int *p, unsigned long old, unsigned long new)
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ISYNC_ON_SMP
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"\n\
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2:"
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: "=&r" (prev), "=m" (*p)
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: "r" (p), "r" (old), "r" (new), "m" (*p)
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: "=&r" (prev), "+m" (*p)
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: "r" (p), "r" (old), "r" (new)
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: "cc", "memory");
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return prev;
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@ -322,8 +322,8 @@ __cmpxchg_u64(volatile unsigned long *p, unsigned long old, unsigned long new)
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ISYNC_ON_SMP
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"\n\
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2:"
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: "=&r" (prev), "=m" (*p)
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: "r" (p), "r" (old), "r" (new), "m" (*p)
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: "=&r" (prev), "+m" (*p)
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: "r" (p), "r" (old), "r" (new)
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: "cc", "memory");
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return prev;
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