drm/scheduler: Scheduler priority fixes (v2)
Remove DRM_SCHED_PRIORITY_LOW, as it was used in only one place. Rename and separate by a line DRM_SCHED_PRIORITY_MAX to DRM_SCHED_PRIORITY_COUNT as it represents a (total) count of said priorities and it is used as such in loops throughout the code. (0-based indexing is the the count number.) Remove redundant word HIGH in priority names, and rename *KERNEL* to *HIGH*, as it really means that, high. v2: Add back KERNEL and remove SW and HW, in lieu of a single HIGH between NORMAL and KERNEL. Signed-off-by: Luben Tuikov <luben.tuikov@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -46,7 +46,7 @@ const unsigned int amdgpu_ctx_num_entities[AMDGPU_HW_IP_NUM] = {
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static int amdgpu_ctx_priority_permit(struct drm_file *filp,
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enum drm_sched_priority priority)
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{
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if (priority < 0 || priority >= DRM_SCHED_PRIORITY_MAX)
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if (priority < 0 || priority >= DRM_SCHED_PRIORITY_COUNT)
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return -EINVAL;
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/* NORMAL and below are accessible by everyone */
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@ -65,7 +65,7 @@ static int amdgpu_ctx_priority_permit(struct drm_file *filp,
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static enum gfx_pipe_priority amdgpu_ctx_sched_prio_to_compute_prio(enum drm_sched_priority prio)
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{
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switch (prio) {
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case DRM_SCHED_PRIORITY_HIGH_HW:
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case DRM_SCHED_PRIORITY_HIGH:
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case DRM_SCHED_PRIORITY_KERNEL:
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return AMDGPU_GFX_PIPE_PRIO_HIGH;
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default:
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@ -251,7 +251,7 @@ void amdgpu_job_stop_all_jobs_on_sched(struct drm_gpu_scheduler *sched)
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int i;
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/* Signal all jobs not yet scheduled */
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for (i = DRM_SCHED_PRIORITY_MAX - 1; i >= DRM_SCHED_PRIORITY_MIN; i--) {
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for (i = DRM_SCHED_PRIORITY_COUNT - 1; i >= DRM_SCHED_PRIORITY_MIN; i--) {
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struct drm_sched_rq *rq = &sched->sched_rq[i];
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if (!rq)
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@ -267,7 +267,7 @@ int amdgpu_ring_init(struct amdgpu_device *adev, struct amdgpu_ring *ring,
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&ring->sched;
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}
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for (i = 0; i < DRM_SCHED_PRIORITY_MAX; ++i)
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for (i = DRM_SCHED_PRIORITY_MIN; i < DRM_SCHED_PRIORITY_COUNT; ++i)
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atomic_set(&ring->num_jobs[i], 0);
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return 0;
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@ -243,7 +243,7 @@ struct amdgpu_ring {
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bool has_compute_vm_bug;
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bool no_scheduler;
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atomic_t num_jobs[DRM_SCHED_PRIORITY_MAX];
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atomic_t num_jobs[DRM_SCHED_PRIORITY_COUNT];
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struct mutex priority_mutex;
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/* protected by priority_mutex */
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int priority;
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@ -36,14 +36,14 @@ enum drm_sched_priority amdgpu_to_sched_priority(int amdgpu_priority)
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{
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switch (amdgpu_priority) {
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case AMDGPU_CTX_PRIORITY_VERY_HIGH:
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return DRM_SCHED_PRIORITY_HIGH_HW;
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return DRM_SCHED_PRIORITY_HIGH;
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case AMDGPU_CTX_PRIORITY_HIGH:
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return DRM_SCHED_PRIORITY_HIGH_SW;
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return DRM_SCHED_PRIORITY_HIGH;
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case AMDGPU_CTX_PRIORITY_NORMAL:
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return DRM_SCHED_PRIORITY_NORMAL;
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case AMDGPU_CTX_PRIORITY_LOW:
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case AMDGPU_CTX_PRIORITY_VERY_LOW:
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return DRM_SCHED_PRIORITY_LOW;
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return DRM_SCHED_PRIORITY_MIN;
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case AMDGPU_CTX_PRIORITY_UNSET:
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return DRM_SCHED_PRIORITY_UNSET;
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default:
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@ -2109,7 +2109,7 @@ void amdgpu_ttm_set_buffer_funcs_status(struct amdgpu_device *adev, bool enable)
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ring = adev->mman.buffer_funcs_ring;
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sched = &ring->sched;
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r = drm_sched_entity_init(&adev->mman.entity,
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DRM_SCHED_PRIORITY_KERNEL, &sched,
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DRM_SCHED_PRIORITY_KERNEL, &sched,
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1, NULL);
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if (r) {
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DRM_ERROR("Failed setting up TTM BO move entity (%d)\n",
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@ -623,7 +623,7 @@ drm_sched_select_entity(struct drm_gpu_scheduler *sched)
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return NULL;
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/* Kernel run queue has higher priority than normal run queue*/
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for (i = DRM_SCHED_PRIORITY_MAX - 1; i >= DRM_SCHED_PRIORITY_MIN; i--) {
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for (i = DRM_SCHED_PRIORITY_COUNT - 1; i >= DRM_SCHED_PRIORITY_MIN; i--) {
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entity = drm_sched_rq_select_entity(&sched->sched_rq[i]);
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if (entity)
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break;
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@ -851,7 +851,7 @@ int drm_sched_init(struct drm_gpu_scheduler *sched,
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sched->name = name;
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sched->timeout = timeout;
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sched->hang_limit = hang_limit;
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for (i = DRM_SCHED_PRIORITY_MIN; i < DRM_SCHED_PRIORITY_MAX; i++)
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for (i = DRM_SCHED_PRIORITY_MIN; i < DRM_SCHED_PRIORITY_COUNT; i++)
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drm_sched_rq_init(sched, &sched->sched_rq[i]);
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init_waitqueue_head(&sched->wake_up_worker);
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@ -33,14 +33,16 @@
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struct drm_gpu_scheduler;
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struct drm_sched_rq;
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/* These are often used as an (initial) index
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* to an array, and as such should start at 0.
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*/
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enum drm_sched_priority {
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DRM_SCHED_PRIORITY_MIN,
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DRM_SCHED_PRIORITY_LOW = DRM_SCHED_PRIORITY_MIN,
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DRM_SCHED_PRIORITY_NORMAL,
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DRM_SCHED_PRIORITY_HIGH_SW,
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DRM_SCHED_PRIORITY_HIGH_HW,
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DRM_SCHED_PRIORITY_HIGH,
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DRM_SCHED_PRIORITY_KERNEL,
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DRM_SCHED_PRIORITY_MAX,
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DRM_SCHED_PRIORITY_COUNT,
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DRM_SCHED_PRIORITY_INVALID = -1,
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DRM_SCHED_PRIORITY_UNSET = -2
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};
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@ -274,7 +276,7 @@ struct drm_gpu_scheduler {
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uint32_t hw_submission_limit;
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long timeout;
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const char *name;
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struct drm_sched_rq sched_rq[DRM_SCHED_PRIORITY_MAX];
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struct drm_sched_rq sched_rq[DRM_SCHED_PRIORITY_COUNT];
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wait_queue_head_t wake_up_worker;
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wait_queue_head_t job_scheduled;
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atomic_t hw_rq_count;
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