bcma/ssb: parse new attributes from sprom
These newly added attributes are used by brcmsmac. Now bcma should parse all attributes used by brcmsmac out of the sprom. Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> Tested-by: Arend van Spriel <arend@broadcom.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
This commit is contained in:
Hauke Mehrtens
John W. Linville
Родитель
432c4d1eef
Коммит
e2da4bd3ec
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@ -185,6 +185,18 @@ static int bcma_sprom_valid(const u16 *sprom)
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bus->sprom._field = ((((u32)sprom[SPOFF((_offset)+2)] << 16 | \
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sprom[SPOFF(_offset)]) & (_mask)) >> (_shift))
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#define SPEX_ARRAY8(_field, _offset, _mask, _shift) \
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do { \
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SPEX(_field[0], _offset + 0, _mask, _shift); \
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SPEX(_field[1], _offset + 2, _mask, _shift); \
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SPEX(_field[2], _offset + 4, _mask, _shift); \
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SPEX(_field[3], _offset + 6, _mask, _shift); \
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SPEX(_field[4], _offset + 8, _mask, _shift); \
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SPEX(_field[5], _offset + 10, _mask, _shift); \
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SPEX(_field[6], _offset + 12, _mask, _shift); \
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SPEX(_field[7], _offset + 14, _mask, _shift); \
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} while (0)
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static void bcma_sprom_extract_r8(struct bcma_bus *bus, const u16 *sprom)
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{
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u16 v, o;
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@ -375,6 +387,64 @@ static void bcma_sprom_extract_r8(struct bcma_bus *bus, const u16 *sprom)
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SSB_SPROM8_AGAIN2, SSB_SPROM8_AGAIN2_SHIFT);
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SPEX(antenna_gain.a3, SSB_SPROM8_AGAIN23,
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SSB_SPROM8_AGAIN3, SSB_SPROM8_AGAIN3_SHIFT);
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SPEX(leddc_on_time, SSB_SPROM8_LEDDC, SSB_SPROM8_LEDDC_ON,
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SSB_SPROM8_LEDDC_ON_SHIFT);
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SPEX(leddc_off_time, SSB_SPROM8_LEDDC, SSB_SPROM8_LEDDC_OFF,
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SSB_SPROM8_LEDDC_OFF_SHIFT);
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SPEX(txchain, SSB_SPROM8_TXRXC, SSB_SPROM8_TXRXC_TXCHAIN,
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SSB_SPROM8_TXRXC_TXCHAIN_SHIFT);
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SPEX(rxchain, SSB_SPROM8_TXRXC, SSB_SPROM8_TXRXC_RXCHAIN,
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SSB_SPROM8_TXRXC_RXCHAIN_SHIFT);
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SPEX(antswitch, SSB_SPROM8_TXRXC, SSB_SPROM8_TXRXC_SWITCH,
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SSB_SPROM8_TXRXC_SWITCH_SHIFT);
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SPEX(opo, SSB_SPROM8_OFDM2GPO, 0x00ff, 0);
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SPEX_ARRAY8(mcs2gpo, SSB_SPROM8_2G_MCSPO, ~0, 0);
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SPEX_ARRAY8(mcs5gpo, SSB_SPROM8_5G_MCSPO, ~0, 0);
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SPEX_ARRAY8(mcs5glpo, SSB_SPROM8_5GL_MCSPO, ~0, 0);
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SPEX_ARRAY8(mcs5ghpo, SSB_SPROM8_5GH_MCSPO, ~0, 0);
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SPEX(rawtempsense, SSB_SPROM8_RAWTS, SSB_SPROM8_RAWTS_RAWTEMP,
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SSB_SPROM8_RAWTS_RAWTEMP_SHIFT);
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SPEX(measpower, SSB_SPROM8_RAWTS, SSB_SPROM8_RAWTS_MEASPOWER,
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SSB_SPROM8_RAWTS_MEASPOWER_SHIFT);
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SPEX(tempsense_slope, SSB_SPROM8_OPT_CORRX,
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SSB_SPROM8_OPT_CORRX_TEMP_SLOPE,
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SSB_SPROM8_OPT_CORRX_TEMP_SLOPE_SHIFT);
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SPEX(tempcorrx, SSB_SPROM8_OPT_CORRX, SSB_SPROM8_OPT_CORRX_TEMPCORRX,
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SSB_SPROM8_OPT_CORRX_TEMPCORRX_SHIFT);
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SPEX(tempsense_option, SSB_SPROM8_OPT_CORRX,
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SSB_SPROM8_OPT_CORRX_TEMP_OPTION,
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SSB_SPROM8_OPT_CORRX_TEMP_OPTION_SHIFT);
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SPEX(freqoffset_corr, SSB_SPROM8_HWIQ_IQSWP,
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SSB_SPROM8_HWIQ_IQSWP_FREQ_CORR,
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SSB_SPROM8_HWIQ_IQSWP_FREQ_CORR_SHIFT);
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SPEX(iqcal_swp_dis, SSB_SPROM8_HWIQ_IQSWP,
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SSB_SPROM8_HWIQ_IQSWP_IQCAL_SWP,
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SSB_SPROM8_HWIQ_IQSWP_IQCAL_SWP_SHIFT);
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SPEX(hw_iqcal_en, SSB_SPROM8_HWIQ_IQSWP, SSB_SPROM8_HWIQ_IQSWP_HW_IQCAL,
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SSB_SPROM8_HWIQ_IQSWP_HW_IQCAL_SHIFT);
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SPEX(bw40po, SSB_SPROM8_BW40PO, ~0, 0);
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SPEX(cddpo, SSB_SPROM8_CDDPO, ~0, 0);
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SPEX(stbcpo, SSB_SPROM8_STBCPO, ~0, 0);
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SPEX(bwduppo, SSB_SPROM8_BWDUPPO, ~0, 0);
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SPEX(tempthresh, SSB_SPROM8_THERMAL, SSB_SPROM8_THERMAL_TRESH,
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SSB_SPROM8_THERMAL_TRESH_SHIFT);
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SPEX(tempoffset, SSB_SPROM8_THERMAL, SSB_SPROM8_THERMAL_OFFSET,
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SSB_SPROM8_THERMAL_OFFSET_SHIFT);
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SPEX(phycal_tempdelta, SSB_SPROM8_TEMPDELTA,
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SSB_SPROM8_TEMPDELTA_PHYCAL,
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SSB_SPROM8_TEMPDELTA_PHYCAL_SHIFT);
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SPEX(temps_period, SSB_SPROM8_TEMPDELTA, SSB_SPROM8_TEMPDELTA_PERIOD,
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SSB_SPROM8_TEMPDELTA_PERIOD_SHIFT);
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SPEX(temps_hysteresis, SSB_SPROM8_TEMPDELTA,
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SSB_SPROM8_TEMPDELTA_HYSTERESIS,
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SSB_SPROM8_TEMPDELTA_HYSTERESIS_SHIFT);
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}
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/*
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@ -178,6 +178,18 @@ err_pci:
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#define SPEX(_outvar, _offset, _mask, _shift) \
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SPEX16(_outvar, _offset, _mask, _shift)
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#define SPEX_ARRAY8(_field, _offset, _mask, _shift) \
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do { \
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SPEX(_field[0], _offset + 0, _mask, _shift); \
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SPEX(_field[1], _offset + 2, _mask, _shift); \
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SPEX(_field[2], _offset + 4, _mask, _shift); \
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SPEX(_field[3], _offset + 6, _mask, _shift); \
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SPEX(_field[4], _offset + 8, _mask, _shift); \
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SPEX(_field[5], _offset + 10, _mask, _shift); \
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SPEX(_field[6], _offset + 12, _mask, _shift); \
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SPEX(_field[7], _offset + 14, _mask, _shift); \
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} while (0)
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static inline u8 ssb_crc8(u8 crc, u8 data)
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{
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@ -663,6 +675,63 @@ static void sprom_extract_r8(struct ssb_sprom *out, const u16 *in)
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SPEX(fem.ghz5.antswlut, SSB_SPROM8_FEM5G,
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SSB_SROM8_FEM_ANTSWLUT, SSB_SROM8_FEM_ANTSWLUT_SHIFT);
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SPEX(leddc_on_time, SSB_SPROM8_LEDDC, SSB_SPROM8_LEDDC_ON,
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SSB_SPROM8_LEDDC_ON_SHIFT);
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SPEX(leddc_off_time, SSB_SPROM8_LEDDC, SSB_SPROM8_LEDDC_OFF,
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SSB_SPROM8_LEDDC_OFF_SHIFT);
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SPEX(txchain, SSB_SPROM8_TXRXC, SSB_SPROM8_TXRXC_TXCHAIN,
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SSB_SPROM8_TXRXC_TXCHAIN_SHIFT);
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SPEX(rxchain, SSB_SPROM8_TXRXC, SSB_SPROM8_TXRXC_RXCHAIN,
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SSB_SPROM8_TXRXC_RXCHAIN_SHIFT);
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SPEX(antswitch, SSB_SPROM8_TXRXC, SSB_SPROM8_TXRXC_SWITCH,
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SSB_SPROM8_TXRXC_SWITCH_SHIFT);
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SPEX(opo, SSB_SPROM8_OFDM2GPO, 0x00ff, 0);
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SPEX_ARRAY8(mcs2gpo, SSB_SPROM8_2G_MCSPO, ~0, 0);
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SPEX_ARRAY8(mcs5gpo, SSB_SPROM8_5G_MCSPO, ~0, 0);
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SPEX_ARRAY8(mcs5glpo, SSB_SPROM8_5GL_MCSPO, ~0, 0);
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SPEX_ARRAY8(mcs5ghpo, SSB_SPROM8_5GH_MCSPO, ~0, 0);
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SPEX(rawtempsense, SSB_SPROM8_RAWTS, SSB_SPROM8_RAWTS_RAWTEMP,
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SSB_SPROM8_RAWTS_RAWTEMP_SHIFT);
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SPEX(measpower, SSB_SPROM8_RAWTS, SSB_SPROM8_RAWTS_MEASPOWER,
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SSB_SPROM8_RAWTS_MEASPOWER_SHIFT);
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SPEX(tempsense_slope, SSB_SPROM8_OPT_CORRX,
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SSB_SPROM8_OPT_CORRX_TEMP_SLOPE,
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SSB_SPROM8_OPT_CORRX_TEMP_SLOPE_SHIFT);
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SPEX(tempcorrx, SSB_SPROM8_OPT_CORRX, SSB_SPROM8_OPT_CORRX_TEMPCORRX,
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SSB_SPROM8_OPT_CORRX_TEMPCORRX_SHIFT);
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SPEX(tempsense_option, SSB_SPROM8_OPT_CORRX,
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SSB_SPROM8_OPT_CORRX_TEMP_OPTION,
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SSB_SPROM8_OPT_CORRX_TEMP_OPTION_SHIFT);
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SPEX(freqoffset_corr, SSB_SPROM8_HWIQ_IQSWP,
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SSB_SPROM8_HWIQ_IQSWP_FREQ_CORR,
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SSB_SPROM8_HWIQ_IQSWP_FREQ_CORR_SHIFT);
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SPEX(iqcal_swp_dis, SSB_SPROM8_HWIQ_IQSWP,
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SSB_SPROM8_HWIQ_IQSWP_IQCAL_SWP,
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SSB_SPROM8_HWIQ_IQSWP_IQCAL_SWP_SHIFT);
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SPEX(hw_iqcal_en, SSB_SPROM8_HWIQ_IQSWP, SSB_SPROM8_HWIQ_IQSWP_HW_IQCAL,
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SSB_SPROM8_HWIQ_IQSWP_HW_IQCAL_SHIFT);
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SPEX(bw40po, SSB_SPROM8_BW40PO, ~0, 0);
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SPEX(cddpo, SSB_SPROM8_CDDPO, ~0, 0);
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SPEX(stbcpo, SSB_SPROM8_STBCPO, ~0, 0);
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SPEX(bwduppo, SSB_SPROM8_BWDUPPO, ~0, 0);
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SPEX(tempthresh, SSB_SPROM8_THERMAL, SSB_SPROM8_THERMAL_TRESH,
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SSB_SPROM8_THERMAL_TRESH_SHIFT);
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SPEX(tempoffset, SSB_SPROM8_THERMAL, SSB_SPROM8_THERMAL_OFFSET,
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SSB_SPROM8_THERMAL_OFFSET_SHIFT);
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SPEX(phycal_tempdelta, SSB_SPROM8_TEMPDELTA,
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SSB_SPROM8_TEMPDELTA_PHYCAL,
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SSB_SPROM8_TEMPDELTA_PHYCAL_SHIFT);
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SPEX(temps_period, SSB_SPROM8_TEMPDELTA, SSB_SPROM8_TEMPDELTA_PERIOD,
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SSB_SPROM8_TEMPDELTA_PERIOD_SHIFT);
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SPEX(temps_hysteresis, SSB_SPROM8_TEMPDELTA,
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SSB_SPROM8_TEMPDELTA_HYSTERESIS,
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SSB_SPROM8_TEMPDELTA_HYSTERESIS_SHIFT);
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sprom_extract_r458(out, in);
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/* TODO - get remaining rev 8 stuff needed */
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@ -391,6 +391,11 @@
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#define SSB_SPROM8_GPIOB_P2 0x00FF /* Pin 2 */
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#define SSB_SPROM8_GPIOB_P3 0xFF00 /* Pin 3 */
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#define SSB_SPROM8_GPIOB_P3_SHIFT 8
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#define SSB_SPROM8_LEDDC 0x009A
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#define SSB_SPROM8_LEDDC_ON 0xFF00 /* oncount */
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#define SSB_SPROM8_LEDDC_ON_SHIFT 8
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#define SSB_SPROM8_LEDDC_OFF 0x00FF /* offcount */
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#define SSB_SPROM8_LEDDC_OFF_SHIFT 0
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#define SSB_SPROM8_ANTAVAIL 0x009C /* Antenna available bitfields*/
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#define SSB_SPROM8_ANTAVAIL_A 0xFF00 /* A-PHY bitfield */
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#define SSB_SPROM8_ANTAVAIL_A_SHIFT 8
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@ -406,6 +411,13 @@
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#define SSB_SPROM8_AGAIN2_SHIFT 0
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#define SSB_SPROM8_AGAIN3 0xFF00 /* Antenna 3 */
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#define SSB_SPROM8_AGAIN3_SHIFT 8
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#define SSB_SPROM8_TXRXC 0x00A2
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#define SSB_SPROM8_TXRXC_TXCHAIN 0x000f
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#define SSB_SPROM8_TXRXC_TXCHAIN_SHIFT 0
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#define SSB_SPROM8_TXRXC_RXCHAIN 0x00f0
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#define SSB_SPROM8_TXRXC_RXCHAIN_SHIFT 4
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#define SSB_SPROM8_TXRXC_SWITCH 0xff00
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#define SSB_SPROM8_TXRXC_SWITCH_SHIFT 8
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#define SSB_SPROM8_RSSIPARM2G 0x00A4 /* RSSI params for 2GHz */
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#define SSB_SPROM8_RSSISMF2G 0x000F
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#define SSB_SPROM8_RSSISMC2G 0x00F0
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@ -432,6 +444,7 @@
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#define SSB_SPROM8_TRI5GH_SHIFT 8
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#define SSB_SPROM8_RXPO 0x00AC /* RX power offsets */
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#define SSB_SPROM8_RXPO2G 0x00FF /* 2GHz RX power offset */
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#define SSB_SPROM8_RXPO2G_SHIFT 0
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#define SSB_SPROM8_RXPO5G 0xFF00 /* 5GHz RX power offset */
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#define SSB_SPROM8_RXPO5G_SHIFT 8
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#define SSB_SPROM8_FEM2G 0x00AE
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@ -447,10 +460,38 @@
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#define SSB_SROM8_FEM_ANTSWLUT 0xF800
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#define SSB_SROM8_FEM_ANTSWLUT_SHIFT 11
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#define SSB_SPROM8_THERMAL 0x00B2
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#define SSB_SPROM8_MPWR_RAWTS 0x00B4
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#define SSB_SPROM8_TS_SLP_OPT_CORRX 0x00B6
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#define SSB_SPROM8_FOC_HWIQ_IQSWP 0x00B8
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#define SSB_SPROM8_PHYCAL_TEMPDELTA 0x00BA
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#define SSB_SPROM8_THERMAL_OFFSET 0x00ff
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#define SSB_SPROM8_THERMAL_OFFSET_SHIFT 0
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#define SSB_SPROM8_THERMAL_TRESH 0xff00
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#define SSB_SPROM8_THERMAL_TRESH_SHIFT 8
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/* Temp sense related entries */
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#define SSB_SPROM8_RAWTS 0x00B4
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#define SSB_SPROM8_RAWTS_RAWTEMP 0x01ff
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#define SSB_SPROM8_RAWTS_RAWTEMP_SHIFT 0
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#define SSB_SPROM8_RAWTS_MEASPOWER 0xfe00
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#define SSB_SPROM8_RAWTS_MEASPOWER_SHIFT 9
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#define SSB_SPROM8_OPT_CORRX 0x00B6
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#define SSB_SPROM8_OPT_CORRX_TEMP_SLOPE 0x00ff
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#define SSB_SPROM8_OPT_CORRX_TEMP_SLOPE_SHIFT 0
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#define SSB_SPROM8_OPT_CORRX_TEMPCORRX 0xfc00
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#define SSB_SPROM8_OPT_CORRX_TEMPCORRX_SHIFT 10
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#define SSB_SPROM8_OPT_CORRX_TEMP_OPTION 0x0300
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#define SSB_SPROM8_OPT_CORRX_TEMP_OPTION_SHIFT 8
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/* FOC: freiquency offset correction, HWIQ: H/W IOCAL enable, IQSWP: IQ CAL swap disable */
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#define SSB_SPROM8_HWIQ_IQSWP 0x00B8
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#define SSB_SPROM8_HWIQ_IQSWP_FREQ_CORR 0x000f
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#define SSB_SPROM8_HWIQ_IQSWP_FREQ_CORR_SHIFT 0
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#define SSB_SPROM8_HWIQ_IQSWP_IQCAL_SWP 0x0010
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#define SSB_SPROM8_HWIQ_IQSWP_IQCAL_SWP_SHIFT 4
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#define SSB_SPROM8_HWIQ_IQSWP_HW_IQCAL 0x0020
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#define SSB_SPROM8_HWIQ_IQSWP_HW_IQCAL_SHIFT 5
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#define SSB_SPROM8_TEMPDELTA 0x00BA
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#define SSB_SPROM8_TEMPDELTA_PHYCAL 0x00ff
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#define SSB_SPROM8_TEMPDELTA_PHYCAL_SHIFT 0
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#define SSB_SPROM8_TEMPDELTA_PERIOD 0x0f00
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#define SSB_SPROM8_TEMPDELTA_PERIOD_SHIFT 8
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#define SSB_SPROM8_TEMPDELTA_HYSTERESIS 0xf000
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#define SSB_SPROM8_TEMPDELTA_HYSTERESIS_SHIFT 12
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/* There are 4 blocks with power info sharing the same layout */
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#define SSB_SROM8_PWR_INFO_CORE0 0x00C0
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@ -515,6 +556,16 @@
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#define SSB_SPROM8_OFDM5GLPO 0x014A /* 5.2GHz OFDM power offset */
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#define SSB_SPROM8_OFDM5GHPO 0x014E /* 5.8GHz OFDM power offset */
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#define SSB_SPROM8_2G_MCSPO 0x0152
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#define SSB_SPROM8_5G_MCSPO 0x0162
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#define SSB_SPROM8_5GL_MCSPO 0x0172
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#define SSB_SPROM8_5GH_MCSPO 0x0182
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#define SSB_SPROM8_CDDPO 0x0192
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#define SSB_SPROM8_STBCPO 0x0194
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#define SSB_SPROM8_BW40PO 0x0196
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#define SSB_SPROM8_BWDUPPO 0x0198
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/* Values for boardflags_lo read from SPROM */
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#define SSB_BFL_BTCOEXIST 0x0001 /* implements Bluetooth coexistance */
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#define SSB_BFL_PACTRL 0x0002 /* GPIO 9 controlling the PA */
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