amd64_edac: Correct node interleaving removal
When node interleaving is enabled, a subset of the addr[14:12] bits has to be removed in order to get the normalized DCT address of the DRAM channel. The actual number of bits to remove is determined by F1x[1, 0][7C:40][IntlvEn]. Do this correctly. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
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95b0ef55cd
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e2f79dbdfb
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@ -1406,10 +1406,10 @@ static int f10_match_to_this_node(struct amd64_pvt *pvt, int range,
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chan_addr = f10_get_norm_dct_addr(pvt, range, sys_addr,
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chan_addr = f10_get_norm_dct_addr(pvt, range, sys_addr,
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high_range, dct_sel_base);
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high_range, dct_sel_base);
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/* remove Node ID (in case of node interleaving) */
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/* Remove node interleaving, see F1x120 */
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tmp = chan_addr & 0xFC0;
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if (intlv_en)
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chan_addr = ((chan_addr >> (12 + hweight8(intlv_en))) << 12) |
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chan_addr = ((chan_addr >> hweight8(intlv_en)) & GENMASK(12, 47)) | tmp;
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(chan_addr & 0xfff);
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/* remove channel interleave and hash */
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/* remove channel interleave and hash */
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if (dct_interleave_enabled(pvt) &&
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if (dct_interleave_enabled(pvt) &&
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