mmc: sdhci: eliminate sdhci_of_host and sdhci_of_data
The patch migrates the use of sdhci_of_host and sdhci_of_data to sdhci_pltfm_host and sdhci_pltfm_data, so that the former pair can be eliminated. Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Reviewed-by: Grant Likely <grant.likely@secretlab.ca> Reviewed-by: Wolfram Sang <w.sang@pengutronix.de> Acked-by: Anton Vorontsov <cbouatmailru@gmail.com> Signed-off-by: Chris Ball <cjb@laptop.org>
This commit is contained in:
Shawn Guo
Chris Ball
Родитель
85d6509dc8
Коммит
e307148fd4
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@ -1,253 +0,0 @@
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/*
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* OpenFirmware bindings for Secure Digital Host Controller Interface.
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*
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* Copyright (c) 2007 Freescale Semiconductor, Inc.
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* Copyright (c) 2009 MontaVista Software, Inc.
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*
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* Authors: Xiaobo Xie <X.Xie@freescale.com>
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* Anton Vorontsov <avorontsov@ru.mvista.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or (at
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* your option) any later version.
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*/
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#include <linux/err.h>
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#include <linux/module.h>
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#include <linux/init.h>
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#include <linux/io.h>
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#include <linux/interrupt.h>
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#include <linux/delay.h>
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#include <linux/of.h>
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#include <linux/of_platform.h>
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#include <linux/of_address.h>
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#include <linux/of_irq.h>
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#include <linux/mmc/host.h>
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#ifdef CONFIG_PPC
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#include <asm/machdep.h>
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#endif
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#include "sdhci-of.h"
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#include "sdhci.h"
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#ifdef CONFIG_MMC_SDHCI_BIG_ENDIAN_32BIT_BYTE_SWAPPER
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/*
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* These accessors are designed for big endian hosts doing I/O to
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* little endian controllers incorporating a 32-bit hardware byte swapper.
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*/
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u32 sdhci_be32bs_readl(struct sdhci_host *host, int reg)
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{
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return in_be32(host->ioaddr + reg);
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}
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u16 sdhci_be32bs_readw(struct sdhci_host *host, int reg)
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{
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return in_be16(host->ioaddr + (reg ^ 0x2));
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}
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u8 sdhci_be32bs_readb(struct sdhci_host *host, int reg)
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{
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return in_8(host->ioaddr + (reg ^ 0x3));
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}
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void sdhci_be32bs_writel(struct sdhci_host *host, u32 val, int reg)
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{
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out_be32(host->ioaddr + reg, val);
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}
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void sdhci_be32bs_writew(struct sdhci_host *host, u16 val, int reg)
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{
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struct sdhci_of_host *of_host = sdhci_priv(host);
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int base = reg & ~0x3;
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int shift = (reg & 0x2) * 8;
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switch (reg) {
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case SDHCI_TRANSFER_MODE:
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/*
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* Postpone this write, we must do it together with a
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* command write that is down below.
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*/
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of_host->xfer_mode_shadow = val;
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return;
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case SDHCI_COMMAND:
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sdhci_be32bs_writel(host, val << 16 | of_host->xfer_mode_shadow,
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SDHCI_TRANSFER_MODE);
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return;
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}
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clrsetbits_be32(host->ioaddr + base, 0xffff << shift, val << shift);
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}
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void sdhci_be32bs_writeb(struct sdhci_host *host, u8 val, int reg)
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{
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int base = reg & ~0x3;
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int shift = (reg & 0x3) * 8;
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clrsetbits_be32(host->ioaddr + base , 0xff << shift, val << shift);
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}
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#endif /* CONFIG_MMC_SDHCI_BIG_ENDIAN_32BIT_BYTE_SWAPPER */
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#ifdef CONFIG_PM
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static int sdhci_of_suspend(struct platform_device *ofdev, pm_message_t state)
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{
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struct sdhci_host *host = dev_get_drvdata(&ofdev->dev);
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return mmc_suspend_host(host->mmc);
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}
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static int sdhci_of_resume(struct platform_device *ofdev)
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{
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struct sdhci_host *host = dev_get_drvdata(&ofdev->dev);
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return mmc_resume_host(host->mmc);
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}
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#else
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#define sdhci_of_suspend NULL
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#define sdhci_of_resume NULL
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#endif
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static bool __devinit sdhci_of_wp_inverted(struct device_node *np)
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{
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if (of_get_property(np, "sdhci,wp-inverted", NULL))
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return true;
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/* Old device trees don't have the wp-inverted property. */
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#ifdef CONFIG_PPC
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return machine_is(mpc837x_rdb) || machine_is(mpc837x_mds);
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#else
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return false;
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#endif
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}
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static const struct of_device_id sdhci_of_match[];
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static int __devinit sdhci_of_probe(struct platform_device *ofdev)
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{
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const struct of_device_id *match;
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struct device_node *np = ofdev->dev.of_node;
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struct sdhci_of_data *sdhci_of_data;
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struct sdhci_host *host;
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struct sdhci_of_host *of_host;
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const __be32 *clk;
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int size;
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int ret;
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match = of_match_device(sdhci_of_match, &ofdev->dev);
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if (!match)
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return -EINVAL;
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sdhci_of_data = match->data;
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if (!of_device_is_available(np))
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return -ENODEV;
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host = sdhci_alloc_host(&ofdev->dev, sizeof(*of_host));
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if (IS_ERR(host))
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return -ENOMEM;
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of_host = sdhci_priv(host);
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dev_set_drvdata(&ofdev->dev, host);
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host->ioaddr = of_iomap(np, 0);
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if (!host->ioaddr) {
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ret = -ENOMEM;
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goto err_addr_map;
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}
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host->irq = irq_of_parse_and_map(np, 0);
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if (!host->irq) {
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ret = -EINVAL;
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goto err_no_irq;
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}
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host->hw_name = dev_name(&ofdev->dev);
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if (sdhci_of_data) {
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host->quirks = sdhci_of_data->quirks;
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host->ops = &sdhci_of_data->ops;
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}
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if (of_get_property(np, "sdhci,auto-cmd12", NULL))
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host->quirks |= SDHCI_QUIRK_MULTIBLOCK_READ_ACMD12;
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if (of_get_property(np, "sdhci,1-bit-only", NULL))
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host->quirks |= SDHCI_QUIRK_FORCE_1_BIT_DATA;
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if (sdhci_of_wp_inverted(np))
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host->quirks |= SDHCI_QUIRK_INVERTED_WRITE_PROTECT;
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clk = of_get_property(np, "clock-frequency", &size);
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if (clk && size == sizeof(*clk) && *clk)
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of_host->clock = be32_to_cpup(clk);
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ret = sdhci_add_host(host);
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if (ret)
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goto err_add_host;
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return 0;
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err_add_host:
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irq_dispose_mapping(host->irq);
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err_no_irq:
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iounmap(host->ioaddr);
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err_addr_map:
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sdhci_free_host(host);
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return ret;
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}
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static int __devexit sdhci_of_remove(struct platform_device *ofdev)
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{
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struct sdhci_host *host = dev_get_drvdata(&ofdev->dev);
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sdhci_remove_host(host, 0);
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sdhci_free_host(host);
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irq_dispose_mapping(host->irq);
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iounmap(host->ioaddr);
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return 0;
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}
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static const struct of_device_id sdhci_of_match[] = {
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#ifdef CONFIG_MMC_SDHCI_OF_ESDHC
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{ .compatible = "fsl,mpc8379-esdhc", .data = &sdhci_esdhc, },
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{ .compatible = "fsl,mpc8536-esdhc", .data = &sdhci_esdhc, },
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{ .compatible = "fsl,esdhc", .data = &sdhci_esdhc, },
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#endif
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#ifdef CONFIG_MMC_SDHCI_OF_HLWD
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{ .compatible = "nintendo,hollywood-sdhci", .data = &sdhci_hlwd, },
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#endif
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{ .compatible = "generic-sdhci", },
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{},
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};
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MODULE_DEVICE_TABLE(of, sdhci_of_match);
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static struct platform_driver sdhci_of_driver = {
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.driver = {
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.name = "sdhci-of",
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.owner = THIS_MODULE,
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.of_match_table = sdhci_of_match,
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},
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.probe = sdhci_of_probe,
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.remove = __devexit_p(sdhci_of_remove),
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.suspend = sdhci_of_suspend,
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.resume = sdhci_of_resume,
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};
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static int __init sdhci_of_init(void)
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{
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return platform_driver_register(&sdhci_of_driver);
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}
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module_init(sdhci_of_init);
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static void __exit sdhci_of_exit(void)
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{
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platform_driver_unregister(&sdhci_of_driver);
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}
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module_exit(sdhci_of_exit);
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MODULE_DESCRIPTION("Secure Digital Host Controller Interface OF driver");
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MODULE_AUTHOR("Xiaobo Xie <X.Xie@freescale.com>, "
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"Anton Vorontsov <avorontsov@ru.mvista.com>");
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MODULE_LICENSE("GPL");
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@ -60,32 +60,34 @@ static int esdhc_of_enable_dma(struct sdhci_host *host)
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static unsigned int esdhc_of_get_max_clock(struct sdhci_host *host)
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{
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struct sdhci_of_host *of_host = sdhci_priv(host);
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struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
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return of_host->clock;
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return pltfm_host->clock;
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}
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static unsigned int esdhc_of_get_min_clock(struct sdhci_host *host)
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{
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struct sdhci_of_host *of_host = sdhci_priv(host);
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struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
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return of_host->clock / 256 / 16;
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return pltfm_host->clock / 256 / 16;
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}
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struct sdhci_of_data sdhci_esdhc = {
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static struct sdhci_ops sdhci_esdhc_ops = {
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.read_l = sdhci_be32bs_readl,
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.read_w = esdhc_readw,
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.read_b = sdhci_be32bs_readb,
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.write_l = sdhci_be32bs_writel,
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.write_w = esdhc_writew,
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.write_b = esdhc_writeb,
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.set_clock = esdhc_set_clock,
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.enable_dma = esdhc_of_enable_dma,
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.get_max_clock = esdhc_of_get_max_clock,
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.get_min_clock = esdhc_of_get_min_clock,
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};
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struct sdhci_pltfm_data sdhci_esdhc_pdata = {
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/* card detection could be handled via GPIO */
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.quirks = ESDHC_DEFAULT_QUIRKS | SDHCI_QUIRK_BROKEN_CARD_DETECTION
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| SDHCI_QUIRK_NO_CARD_NO_RESET,
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.ops = {
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.read_l = sdhci_be32bs_readl,
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.read_w = esdhc_readw,
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.read_b = sdhci_be32bs_readb,
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.write_l = sdhci_be32bs_writel,
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.write_w = esdhc_writew,
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.write_b = esdhc_writeb,
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.set_clock = esdhc_set_clock,
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.enable_dma = esdhc_of_enable_dma,
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.get_max_clock = esdhc_of_get_max_clock,
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.get_min_clock = esdhc_of_get_min_clock,
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},
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.ops = &sdhci_esdhc_ops,
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};
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@ -51,15 +51,17 @@ static void sdhci_hlwd_writeb(struct sdhci_host *host, u8 val, int reg)
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udelay(SDHCI_HLWD_WRITE_DELAY);
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}
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struct sdhci_of_data sdhci_hlwd = {
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static struct sdhci_ops sdhci_hlwd_ops = {
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.read_l = sdhci_be32bs_readl,
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.read_w = sdhci_be32bs_readw,
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.read_b = sdhci_be32bs_readb,
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.write_l = sdhci_hlwd_writel,
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.write_w = sdhci_hlwd_writew,
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.write_b = sdhci_hlwd_writeb,
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};
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struct sdhci_pltfm_data sdhci_hlwd_pdata = {
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.quirks = SDHCI_QUIRK_32BIT_DMA_ADDR |
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SDHCI_QUIRK_32BIT_DMA_SIZE,
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.ops = {
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.read_l = sdhci_be32bs_readl,
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.read_w = sdhci_be32bs_readw,
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.read_b = sdhci_be32bs_readb,
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.write_l = sdhci_hlwd_writel,
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.write_w = sdhci_hlwd_writew,
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.write_b = sdhci_hlwd_writeb,
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},
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.ops = &sdhci_hlwd_ops,
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};
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@ -18,16 +18,7 @@
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#include <linux/types.h>
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#include "sdhci.h"
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struct sdhci_of_data {
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unsigned int quirks;
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struct sdhci_ops ops;
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};
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struct sdhci_of_host {
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unsigned int clock;
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u16 xfer_mode_shadow;
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};
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#include "sdhci-pltfm.h"
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extern u32 sdhci_be32bs_readl(struct sdhci_host *host, int reg);
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extern u16 sdhci_be32bs_readw(struct sdhci_host *host, int reg);
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@ -36,7 +27,7 @@ extern void sdhci_be32bs_writel(struct sdhci_host *host, u32 val, int reg);
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extern void sdhci_be32bs_writew(struct sdhci_host *host, u16 val, int reg);
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extern void sdhci_be32bs_writeb(struct sdhci_host *host, u8 val, int reg);
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extern struct sdhci_of_data sdhci_esdhc;
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extern struct sdhci_of_data sdhci_hlwd;
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extern struct sdhci_pltfm_data sdhci_esdhc_pdata;
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extern struct sdhci_pltfm_data sdhci_hlwd_pdata;
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#endif /* __SDHCI_OF_H */
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@ -19,6 +19,10 @@
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struct sdhci_pltfm_host {
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struct clk *clk;
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void *priv; /* to handle quirks across io-accessor calls */
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/* migrate from sdhci_of_host */
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unsigned int clock;
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u16 xfer_mode_shadow;
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};
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extern struct sdhci_host *sdhci_pltfm_init(struct platform_device *pdev,
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