IB/hfi1: Optimize cachelines for user SDMA request structure
The current user SDMA request structure layout has holes. The cachelines can be reduced to improve cacheline trading. Separate fields in the following categories: mostly read, writable and shared with interrupt. Reviewed-by: Mike Marciniszyn <mike.marciniszyn@intel.com> Signed-off-by: Sebastian Sanchez <sebastian.sanchez@intel.com> Signed-off-by: Dennis Dalessandro <dennis.dalessandro@intel.com> Signed-off-by: Doug Ledford <dledford@redhat.com>
This commit is contained in:
Sebastian Sanchez
Doug Ledford
Родитель
7be85676f1
Коммит
e3304b7cc4
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@ -117,6 +117,7 @@ MODULE_PARM_DESC(sdma_comp_size, "Size of User SDMA completion ring. Default: 12
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#define AHG_KDETH_INTR_SHIFT 12
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#define AHG_KDETH_SH_SHIFT 13
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#define AHG_KDETH_ARRAY_SIZE 9
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#define PBC2LRH(x) ((((x) & 0xfff) << 2) - 4)
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#define LRH2PBC(x) ((((x) >> 2) + 1) & 0xfff)
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@ -204,25 +205,42 @@ struct evict_data {
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};
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struct user_sdma_request {
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struct sdma_req_info info;
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struct hfi1_user_sdma_pkt_q *pq;
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struct hfi1_user_sdma_comp_q *cq;
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/* This is the original header from user space */
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struct hfi1_pkt_header hdr;
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/* Read mostly fields */
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struct hfi1_user_sdma_pkt_q *pq ____cacheline_aligned_in_smp;
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struct hfi1_user_sdma_comp_q *cq;
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/*
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* Pointer to the SDMA engine for this request.
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* Since different request could be on different VLs,
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* each request will need it's own engine pointer.
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*/
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struct sdma_engine *sde;
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s8 ahg_idx;
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u32 ahg[9];
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struct sdma_req_info info;
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/* TID array values copied from the tid_iov vector */
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u32 *tids;
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/* total length of the data in the request */
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u32 data_len;
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/* number of elements copied to the tids array */
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u16 n_tids;
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/*
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* KDETH.Offset (Eager) field
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* We need to remember the initial value so the headers
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* can be updated properly.
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* We copy the iovs for this request (based on
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* info.iovcnt). These are only the data vectors
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*/
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u32 koffset;
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u8 data_iovs;
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s8 ahg_idx;
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/* Writeable fields shared with interrupt */
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u64 seqcomp ____cacheline_aligned_in_smp;
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u64 seqsubmitted;
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unsigned long flags;
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/* status of the last txreq completed */
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int status;
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/* Send side fields */
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struct list_head txps ____cacheline_aligned_in_smp;
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u64 seqnum;
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/*
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* KDETH.OFFSET (TID) field
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* The offset can cover multiple packets, depending on the
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@ -230,29 +248,19 @@ struct user_sdma_request {
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*/
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u32 tidoffset;
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/*
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* We copy the iovs for this request (based on
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* info.iovcnt). These are only the data vectors
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* KDETH.Offset (Eager) field
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* We need to remember the initial value so the headers
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* can be updated properly.
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*/
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unsigned data_iovs;
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/* total length of the data in the request */
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u32 data_len;
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/* progress index moving along the iovs array */
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unsigned iov_idx;
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struct user_sdma_iovec iovs[MAX_VECTORS_PER_REQ];
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/* number of elements copied to the tids array */
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u16 n_tids;
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/* TID array values copied from the tid_iov vector */
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u32 *tids;
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u16 tididx;
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u32 koffset;
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u32 sent;
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u64 seqnum;
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u64 seqcomp;
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u64 seqsubmitted;
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struct list_head txps;
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unsigned long flags;
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/* status of the last txreq completed */
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int status;
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};
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/* TID index copied from the tid_iov vector */
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u16 tididx;
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/* progress index moving along the iovs array */
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u8 iov_idx;
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struct user_sdma_iovec iovs[MAX_VECTORS_PER_REQ];
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} ____cacheline_aligned_in_smp;
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/*
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* A single txreq could span up to 3 physical pages when the MTU
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@ -1034,11 +1042,6 @@ static int user_sdma_send_pkts(struct user_sdma_request *req, unsigned maxpkts)
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datalen);
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if (changes < 0)
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goto free_tx;
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sdma_txinit_ahg(&tx->txreq,
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SDMA_TXREQ_F_USE_AHG,
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datalen, req->ahg_idx, changes,
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req->ahg, sizeof(req->hdr),
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user_sdma_txreq_cb);
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}
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} else {
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ret = sdma_txinit(&tx->txreq, 0, sizeof(req->hdr) +
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@ -1442,21 +1445,22 @@ done:
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}
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static int set_txreq_header_ahg(struct user_sdma_request *req,
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struct user_sdma_txreq *tx, u32 len)
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struct user_sdma_txreq *tx, u32 datalen)
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{
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u32 ahg[AHG_KDETH_ARRAY_SIZE];
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int diff = 0;
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u8 omfactor; /* KDETH.OM */
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struct hfi1_user_sdma_pkt_q *pq = req->pq;
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struct hfi1_pkt_header *hdr = &req->hdr;
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u16 pbclen = le16_to_cpu(hdr->pbc[0]);
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u32 val32, tidval = 0, lrhlen = get_lrh_len(*hdr, pad_len(len));
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u32 val32, tidval = 0, lrhlen = get_lrh_len(*hdr, pad_len(datalen));
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if (PBC2LRH(pbclen) != lrhlen) {
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/* PBC.PbcLengthDWs */
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AHG_HEADER_SET(req->ahg, diff, 0, 0, 12,
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AHG_HEADER_SET(ahg, diff, 0, 0, 12,
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cpu_to_le16(LRH2PBC(lrhlen)));
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/* LRH.PktLen (we need the full 16 bits due to byte swap) */
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AHG_HEADER_SET(req->ahg, diff, 3, 0, 16,
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AHG_HEADER_SET(ahg, diff, 3, 0, 16,
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cpu_to_be16(lrhlen >> 2));
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}
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@ -1468,13 +1472,12 @@ static int set_txreq_header_ahg(struct user_sdma_request *req,
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(HFI1_CAP_IS_KSET(EXTENDED_PSN) ? 0x7fffffff : 0xffffff);
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if (unlikely(tx->flags & TXREQ_FLAGS_REQ_ACK))
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val32 |= 1UL << 31;
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AHG_HEADER_SET(req->ahg, diff, 6, 0, 16, cpu_to_be16(val32 >> 16));
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AHG_HEADER_SET(req->ahg, diff, 6, 16, 16, cpu_to_be16(val32 & 0xffff));
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AHG_HEADER_SET(ahg, diff, 6, 0, 16, cpu_to_be16(val32 >> 16));
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AHG_HEADER_SET(ahg, diff, 6, 16, 16, cpu_to_be16(val32 & 0xffff));
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/* KDETH.Offset */
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AHG_HEADER_SET(req->ahg, diff, 15, 0, 16,
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AHG_HEADER_SET(ahg, diff, 15, 0, 16,
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cpu_to_le16(req->koffset & 0xffff));
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AHG_HEADER_SET(req->ahg, diff, 15, 16, 16,
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cpu_to_le16(req->koffset >> 16));
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AHG_HEADER_SET(ahg, diff, 15, 16, 16, cpu_to_le16(req->koffset >> 16));
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if (req_opcode(req->info.ctrl) == EXPECTED) {
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__le16 val;
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@ -1492,9 +1495,8 @@ static int set_txreq_header_ahg(struct user_sdma_request *req,
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* we have to check again.
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*/
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if (++req->tididx > req->n_tids - 1 ||
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!req->tids[req->tididx]) {
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!req->tids[req->tididx])
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return -EINVAL;
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}
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tidval = req->tids[req->tididx];
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}
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omfactor = ((EXP_TID_GET(tidval, LEN) *
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@ -1502,7 +1504,7 @@ static int set_txreq_header_ahg(struct user_sdma_request *req,
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KDETH_OM_MAX_SIZE) ? KDETH_OM_LARGE_SHIFT :
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KDETH_OM_SMALL_SHIFT;
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/* KDETH.OM and KDETH.OFFSET (TID) */
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AHG_HEADER_SET(req->ahg, diff, 7, 0, 16,
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AHG_HEADER_SET(ahg, diff, 7, 0, 16,
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((!!(omfactor - KDETH_OM_SMALL_SHIFT)) << 15 |
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((req->tidoffset >> omfactor)
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& 0x7fff)));
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@ -1522,12 +1524,20 @@ static int set_txreq_header_ahg(struct user_sdma_request *req,
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AHG_KDETH_INTR_SHIFT));
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}
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AHG_HEADER_SET(req->ahg, diff, 7, 16, 14, val);
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AHG_HEADER_SET(ahg, diff, 7, 16, 14, val);
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}
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if (diff < 0)
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return diff;
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trace_hfi1_sdma_user_header_ahg(pq->dd, pq->ctxt, pq->subctxt,
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req->info.comp_idx, req->sde->this_idx,
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req->ahg_idx, req->ahg, diff, tidval);
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req->ahg_idx, ahg, diff, tidval);
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sdma_txinit_ahg(&tx->txreq,
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SDMA_TXREQ_F_USE_AHG,
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datalen, req->ahg_idx, diff,
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ahg, sizeof(req->hdr),
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user_sdma_txreq_cb);
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return diff;
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}
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