intel_scu_ipc: Support Medfield processors
Changes to work on bothMmoorestown and Medfield New pci id added for Medfield Return type of ipc_data_readl chnaged from u8 to u32 Signed-off-by: Sreedhara DS <sreedhara.ds@intel.com> Signed-off-by: Alan Cox <alan@linux.intel.com> Signed-off-by: Matthew Garrett <mjg@redhat.com>
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14d10f0a48
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e3359fd5d2
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@ -151,7 +151,7 @@ static inline u8 ipc_data_readb(u32 offset) /* Read ipc byte data */
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return readb(ipcdev.ipc_base + IPC_READ_BUFFER + offset);
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}
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static inline u8 ipc_data_readl(u32 offset) /* Read ipc u32 data */
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static inline u32 ipc_data_readl(u32 offset) /* Read ipc u32 data */
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{
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return readl(ipcdev.ipc_base + IPC_READ_BUFFER + offset);
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}
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@ -181,18 +181,19 @@ static int pwr_reg_rdwr(u16 *addr, u8 *data, u32 count, u32 op, u32 id)
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int nc;
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u32 offset = 0;
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u32 err = 0;
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u8 cbuf[IPC_WWBUF_SIZE] = { '\0' };
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u8 cbuf[IPC_WWBUF_SIZE] = { };
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u32 *wbuf = (u32 *)&cbuf;
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mutex_lock(&ipclock);
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if (ipcdev.pdev == NULL) {
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mutex_unlock(&ipclock);
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return -ENODEV;
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}
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if (platform == 1) {
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if (platform == PLATFORM_LANGWELL) {
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/* Entry is 4 bytes for read/write, 5 bytes for read modify */
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for (nc = 0; nc < count; nc++) {
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for (nc = 0; nc < count; nc++, offset += 3) {
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cbuf[offset] = addr[nc];
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cbuf[offset + 1] = addr[nc] >> 8;
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if (id != IPC_CMD_PCNTRL_R)
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@ -201,33 +202,44 @@ static int pwr_reg_rdwr(u16 *addr, u8 *data, u32 count, u32 op, u32 id)
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cbuf[offset + 3] = data[nc + 1];
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offset += 1;
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}
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offset += 3;
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}
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for (nc = 0, offset = 0; nc < count; nc++, offset += 4)
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ipc_data_writel(wbuf[nc], offset); /* Write wbuff */
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if (id != IPC_CMD_PCNTRL_M)
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ipc_command((count*4) << 16 | id << 12 | 0 << 8 | op);
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else
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ipc_command((count*5) << 16 | id << 12 | 0 << 8 | op);
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} else {
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for (nc = 0, offset = 0; nc < count; nc++, offset += 2)
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ipc_data_writel(addr[nc], offset); /* Write addresses */
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if (id != IPC_CMD_PCNTRL_R) {
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for (nc = 0; nc < count; nc++, offset++)
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ipc_data_writel(data[nc], offset); /* Write data */
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if (id == IPC_CMD_PCNTRL_M)
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ipc_data_writel(data[nc + 1], offset); /* Mask value*/
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for (nc = 0; nc < count; nc++, offset += 2) {
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cbuf[offset] = addr[nc];
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cbuf[offset + 1] = addr[nc] >> 8;
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}
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if (id == IPC_CMD_PCNTRL_R) {
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for (nc = 0, offset = 0; nc < count; nc++, offset += 4)
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ipc_data_writel(wbuf[nc], offset);
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ipc_command((count*2) << 16 | id << 12 | 0 << 8 | op);
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} else if (id == IPC_CMD_PCNTRL_W) {
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for (nc = 0; nc < count; nc++, offset += 1)
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cbuf[offset] = data[nc];
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for (nc = 0, offset = 0; nc < count; nc++, offset += 4)
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ipc_data_writel(wbuf[nc], offset);
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ipc_command((count*3) << 16 | id << 12 | 0 << 8 | op);
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} else if (id == IPC_CMD_PCNTRL_M) {
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cbuf[offset] = data[0];
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cbuf[offset + 1] = data[1];
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ipc_data_writel(wbuf[0], 0); /* Write wbuff */
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ipc_command(4 << 16 | id << 12 | 0 << 8 | op);
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}
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}
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if (id != IPC_CMD_PCNTRL_M)
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ipc_command((count * 3) << 16 | id << 12 | 0 << 8 | op);
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else
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ipc_command((count * 4) << 16 | id << 12 | 0 << 8 | op);
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err = busy_loop();
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if (id == IPC_CMD_PCNTRL_R) { /* Read rbuf */
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/* Workaround: values are read as 0 without memcpy_fromio */
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memcpy_fromio(cbuf, ipcdev.ipc_base + IPC_READ_BUFFER, 16);
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if (platform == 1) {
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memcpy_fromio(cbuf, ipcdev.ipc_base + 0x90, 16);
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if (platform == PLATFORM_LANGWELL) {
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for (nc = 0, offset = 2; nc < count; nc++, offset += 3)
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data[nc] = ipc_data_readb(offset);
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} else {
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@ -800,6 +812,7 @@ static void ipc_remove(struct pci_dev *pdev)
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static const struct pci_device_id pci_ids[] = {
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{PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x080e)},
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{PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x082a)},
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{ 0,}
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};
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MODULE_DEVICE_TABLE(pci, pci_ids);
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