mxc: add MX3 support for i.MX internal UART driver
This patch adds MX3 support for the i.MX internal uart driver. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This commit is contained in:
Родитель
df1bf4bdb2
Коммит
e3d13ff4b9
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@ -4,5 +4,5 @@
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# Object file lists.
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# Object file lists.
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obj-y := mm.o time.o clock.o
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obj-y := mm.o time.o clock.o devices.o
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obj-$(CONFIG_MACH_MX31ADS) += mx31ads.o
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obj-$(CONFIG_MACH_MX31ADS) += mx31ads.o
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@ -0,0 +1,153 @@
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/*
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* Copyright 2006-2007 Freescale Semiconductor, Inc. All Rights Reserved.
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* Copyright 2008 Sascha Hauer, kernel@pengutronix.de
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor,
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* Boston, MA 02110-1301, USA.
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*/
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#include <linux/module.h>
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#include <linux/platform_device.h>
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#include <linux/serial.h>
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#include <asm/hardware.h>
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#include <asm/arch/imx-uart.h>
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static struct resource uart0[] = {
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{
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.start = UART1_BASE_ADDR,
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.end = UART1_BASE_ADDR + 0x0B5,
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.flags = IORESOURCE_MEM,
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}, {
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.start = MXC_INT_UART1,
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.end = MXC_INT_UART1,
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.flags = IORESOURCE_IRQ,
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},
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};
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static struct platform_device mxc_uart_device0 = {
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.name = "imx-uart",
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.id = 0,
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.resource = uart0,
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.num_resources = ARRAY_SIZE(uart0),
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};
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static struct resource uart1[] = {
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{
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.start = UART2_BASE_ADDR,
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.end = UART2_BASE_ADDR + 0x0B5,
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.flags = IORESOURCE_MEM,
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}, {
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.start = MXC_INT_UART2,
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.end = MXC_INT_UART2,
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.flags = IORESOURCE_IRQ,
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},
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};
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static struct platform_device mxc_uart_device1 = {
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.name = "imx-uart",
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.id = 1,
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.resource = uart1,
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.num_resources = ARRAY_SIZE(uart1),
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};
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static struct resource uart2[] = {
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{
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.start = UART3_BASE_ADDR,
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.end = UART3_BASE_ADDR + 0x0B5,
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.flags = IORESOURCE_MEM,
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}, {
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.start = MXC_INT_UART3,
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.end = MXC_INT_UART3,
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.flags = IORESOURCE_IRQ,
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},
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};
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static struct platform_device mxc_uart_device2 = {
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.name = "imx-uart",
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.id = 2,
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.resource = uart2,
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.num_resources = ARRAY_SIZE(uart2),
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};
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static struct resource uart3[] = {
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{
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.start = UART4_BASE_ADDR,
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.end = UART4_BASE_ADDR + 0x0B5,
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.flags = IORESOURCE_MEM,
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}, {
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.start = MXC_INT_UART4,
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.end = MXC_INT_UART4,
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.flags = IORESOURCE_IRQ,
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},
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};
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static struct platform_device mxc_uart_device3 = {
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.name = "imx-uart",
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.id = 3,
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.resource = uart3,
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.num_resources = ARRAY_SIZE(uart3),
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};
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static struct resource uart4[] = {
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{
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.start = UART5_BASE_ADDR,
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.end = UART5_BASE_ADDR + 0x0B5,
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.flags = IORESOURCE_MEM,
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}, {
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.start = MXC_INT_UART5,
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.end = MXC_INT_UART5,
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.flags = IORESOURCE_IRQ,
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},
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};
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static struct platform_device mxc_uart_device4 = {
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.name = "imx-uart",
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.id = 4,
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.resource = uart4,
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.num_resources = ARRAY_SIZE(uart4),
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};
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/*
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* Register only those UARTs that physically exist
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*/
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int __init imx_init_uart(int uart_no, struct imxuart_platform_data *pdata)
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{
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switch (uart_no) {
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case 0:
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mxc_uart_device0.dev.platform_data = pdata;
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platform_device_register(&mxc_uart_device0);
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break;
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case 1:
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mxc_uart_device1.dev.platform_data = pdata;
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platform_device_register(&mxc_uart_device1);
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break;
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case 2:
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mxc_uart_device2.dev.platform_data = pdata;
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platform_device_register(&mxc_uart_device2);
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break;
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case 3:
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mxc_uart_device3.dev.platform_data = pdata;
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platform_device_register(&mxc_uart_device3);
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break;
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case 4:
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mxc_uart_device4.dev.platform_data = pdata;
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platform_device_register(&mxc_uart_device4);
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break;
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default:
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return -ENODEV;
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}
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return 0;
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}
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@ -753,7 +753,7 @@ config BFIN_UART3_CTSRTS
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config SERIAL_IMX
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config SERIAL_IMX
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bool "IMX serial port support"
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bool "IMX serial port support"
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depends on ARM && ARCH_IMX
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depends on ARM && (ARCH_IMX || ARCH_MXC)
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select SERIAL_CORE
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select SERIAL_CORE
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help
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help
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If you have a machine based on a Motorola IMX CPU you
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If you have a machine based on a Motorola IMX CPU you
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@ -62,6 +62,11 @@
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#define UBIR 0xa4 /* BRM Incremental Register */
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#define UBIR 0xa4 /* BRM Incremental Register */
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#define UBMR 0xa8 /* BRM Modulator Register */
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#define UBMR 0xa8 /* BRM Modulator Register */
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#define UBRC 0xac /* Baud Rate Count Register */
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#define UBRC 0xac /* Baud Rate Count Register */
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#ifdef CONFIG_ARCH_MX3
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#define ONEMS 0xb0 /* One Millisecond register */
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#define UTS 0xb4 /* UART Test Register */
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#endif
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#ifdef CONFIG_ARCH_IMX
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#define BIPR1 0xb0 /* Incremental Preset Register 1 */
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#define BIPR1 0xb0 /* Incremental Preset Register 1 */
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#define BIPR2 0xb4 /* Incremental Preset Register 2 */
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#define BIPR2 0xb4 /* Incremental Preset Register 2 */
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#define BIPR3 0xb8 /* Incremental Preset Register 3 */
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#define BIPR3 0xb8 /* Incremental Preset Register 3 */
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@ -71,6 +76,7 @@
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#define BMPR3 0xc8 /* BRM Modulator Register 3 */
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#define BMPR3 0xc8 /* BRM Modulator Register 3 */
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#define BMPR4 0xcc /* BRM Modulator Register 4 */
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#define BMPR4 0xcc /* BRM Modulator Register 4 */
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#define UTS 0xd0 /* UART Test Register */
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#define UTS 0xd0 /* UART Test Register */
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#endif
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/* UART Control Register Bit Fields.*/
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/* UART Control Register Bit Fields.*/
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#define URXD_CHARRDY (1<<15)
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#define URXD_CHARRDY (1<<15)
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@ -90,7 +96,12 @@
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#define UCR1_RTSDEN (1<<5) /* RTS delta interrupt enable */
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#define UCR1_RTSDEN (1<<5) /* RTS delta interrupt enable */
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#define UCR1_SNDBRK (1<<4) /* Send break */
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#define UCR1_SNDBRK (1<<4) /* Send break */
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#define UCR1_TDMAEN (1<<3) /* Transmitter ready DMA enable */
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#define UCR1_TDMAEN (1<<3) /* Transmitter ready DMA enable */
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#ifdef CONFIG_ARCH_IMX
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#define UCR1_UARTCLKEN (1<<2) /* UART clock enabled */
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#define UCR1_UARTCLKEN (1<<2) /* UART clock enabled */
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#endif
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#ifdef CONFIG_ARCH_MX3
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#define UCR1_UARTCLKEN (0) /* not present on mx2/mx3 */
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#endif
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#define UCR1_DOZE (1<<1) /* Doze */
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#define UCR1_DOZE (1<<1) /* Doze */
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#define UCR1_UARTEN (1<<0) /* UART enabled */
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#define UCR1_UARTEN (1<<0) /* UART enabled */
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#define UCR2_ESCI (1<<15) /* Escape seq interrupt enable */
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#define UCR2_ESCI (1<<15) /* Escape seq interrupt enable */
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@ -164,8 +175,19 @@
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#define UTS_SOFTRST (1<<0) /* Software reset */
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#define UTS_SOFTRST (1<<0) /* Software reset */
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/* We've been assigned a range on the "Low-density serial ports" major */
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/* We've been assigned a range on the "Low-density serial ports" major */
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#ifdef CONFIG_ARCH_IMX
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#define SERIAL_IMX_MAJOR 204
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#define SERIAL_IMX_MAJOR 204
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#define MINOR_START 41
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#define MINOR_START 41
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#define DEV_NAME "ttySMX"
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#define MAX_INTERNAL_IRQ IMX_IRQS
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#endif
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#ifdef CONFIG_ARCH_MX3
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#define SERIAL_IMX_MAJOR 207
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#define MINOR_START 16
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#define DEV_NAME "ttymxc"
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#define MAX_INTERNAL_IRQ MXC_MAX_INT_LINES
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#endif
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/*
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/*
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* This determines how often we check the modem status signals
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* This determines how often we check the modem status signals
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@ -409,6 +431,26 @@ out:
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return IRQ_HANDLED;
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return IRQ_HANDLED;
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}
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}
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static irqreturn_t imx_int(int irq, void *dev_id)
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{
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struct imx_port *sport = dev_id;
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unsigned int sts;
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sts = readl(sport->port.membase + USR1);
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if (sts & USR1_RRDY)
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imx_rxint(irq, dev_id);
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if (sts & USR1_TRDY &&
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readl(sport->port.membase + UCR1) & UCR1_TXMPTYEN)
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imx_txint(irq, dev_id);
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if (sts & USR1_RTSS)
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imx_rtsint(irq, dev_id);
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return IRQ_HANDLED;
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}
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/*
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/*
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* Return TIOCSER_TEMT when transmitter is not busy.
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* Return TIOCSER_TEMT when transmitter is not busy.
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*/
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*/
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@ -514,21 +556,34 @@ static int imx_startup(struct uart_port *port)
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writel(temp & ~UCR4_DREN, sport->port.membase + UCR4);
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writel(temp & ~UCR4_DREN, sport->port.membase + UCR4);
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/*
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/*
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* Allocate the IRQ
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* Allocate the IRQ(s) i.MX1 has three interrupts whereas later
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* chips only have one interrupt.
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*/
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*/
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retval = request_irq(sport->rxirq, imx_rxint, 0,
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if (sport->txirq > 0) {
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DRIVER_NAME, sport);
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retval = request_irq(sport->rxirq, imx_rxint, 0,
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if (retval) goto error_out1;
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DRIVER_NAME, sport);
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if (retval)
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goto error_out1;
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retval = request_irq(sport->txirq, imx_txint, 0,
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retval = request_irq(sport->txirq, imx_txint, 0,
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DRIVER_NAME, sport);
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DRIVER_NAME, sport);
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if (retval) goto error_out2;
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if (retval)
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goto error_out2;
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retval = request_irq(sport->rtsirq, imx_rtsint,
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retval = request_irq(sport->rtsirq, imx_rtsint,
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(sport->rtsirq < IMX_IRQS) ? 0 :
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(sport->rtsirq < MAX_INTERNAL_IRQ) ? 0 :
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IRQF_TRIGGER_FALLING | IRQF_TRIGGER_RISING,
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IRQF_TRIGGER_FALLING | IRQF_TRIGGER_RISING,
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DRIVER_NAME, sport);
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DRIVER_NAME, sport);
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if (retval) goto error_out3;
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if (retval)
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goto error_out3;
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} else {
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retval = request_irq(sport->port.irq, imx_int, 0,
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DRIVER_NAME, sport);
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if (retval) {
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free_irq(sport->port.irq, sport);
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goto error_out1;
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}
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}
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/*
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/*
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* Finally, clear and enable interrupts
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* Finally, clear and enable interrupts
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@ -553,9 +608,11 @@ static int imx_startup(struct uart_port *port)
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return 0;
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return 0;
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error_out3:
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error_out3:
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free_irq(sport->txirq, sport);
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if (sport->txirq)
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free_irq(sport->txirq, sport);
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error_out2:
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error_out2:
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free_irq(sport->rxirq, sport);
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if (sport->rxirq)
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free_irq(sport->rxirq, sport);
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error_out1:
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error_out1:
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return retval;
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return retval;
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}
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}
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@ -573,9 +630,12 @@ static void imx_shutdown(struct uart_port *port)
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/*
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/*
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* Free the interrupts
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* Free the interrupts
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*/
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*/
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free_irq(sport->rtsirq, sport);
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if (sport->txirq > 0) {
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free_irq(sport->txirq, sport);
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free_irq(sport->rtsirq, sport);
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free_irq(sport->rxirq, sport);
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free_irq(sport->txirq, sport);
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free_irq(sport->rxirq, sport);
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} else
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free_irq(sport->port.irq, sport);
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/*
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/*
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* Disable all interrupts, port and break condition.
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* Disable all interrupts, port and break condition.
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@ -973,7 +1033,7 @@ imx_console_setup(struct console *co, char *options)
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static struct uart_driver imx_reg;
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static struct uart_driver imx_reg;
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static struct console imx_console = {
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static struct console imx_console = {
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.name = "ttySMX",
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.name = DEV_NAME,
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.write = imx_console_write,
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.write = imx_console_write,
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.device = uart_console_device,
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.device = uart_console_device,
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.setup = imx_console_setup,
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.setup = imx_console_setup,
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@ -990,7 +1050,7 @@ static struct console imx_console = {
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static struct uart_driver imx_reg = {
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static struct uart_driver imx_reg = {
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.owner = THIS_MODULE,
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.owner = THIS_MODULE,
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.driver_name = DRIVER_NAME,
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.driver_name = DRIVER_NAME,
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.dev_name = "ttySMX",
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.dev_name = DEV_NAME,
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.major = SERIAL_IMX_MAJOR,
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.major = SERIAL_IMX_MAJOR,
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.minor = MINOR_START,
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.minor = MINOR_START,
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.nr = ARRAY_SIZE(imx_ports),
|
.nr = ARRAY_SIZE(imx_ports),
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|
|
|
@ -0,0 +1,32 @@
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/*
|
||||||
|
* Copyright (C) 2008 by Sascha Hauer <kernel@pengutronix.de>
|
||||||
|
*
|
||||||
|
* This program is free software; you can redistribute it and/or
|
||||||
|
* modify it under the terms of the GNU General Public License
|
||||||
|
* as published by the Free Software Foundation; either version 2
|
||||||
|
* of the License, or (at your option) any later version.
|
||||||
|
* This program is distributed in the hope that it will be useful,
|
||||||
|
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||||
|
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||||
|
* GNU General Public License for more details.
|
||||||
|
*
|
||||||
|
* You should have received a copy of the GNU General Public License
|
||||||
|
* along with this program; if not, write to the Free Software
|
||||||
|
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
|
||||||
|
* MA 02110-1301, USA.
|
||||||
|
*/
|
||||||
|
|
||||||
|
#ifndef ASMARM_ARCH_UART_H
|
||||||
|
#define ASMARM_ARCH_UART_H
|
||||||
|
|
||||||
|
#define IMXUART_HAVE_RTSCTS (1<<0)
|
||||||
|
|
||||||
|
struct imxuart_platform_data {
|
||||||
|
int (*init)(struct platform_device *pdev);
|
||||||
|
int (*exit)(struct platform_device *pdev);
|
||||||
|
unsigned int flags;
|
||||||
|
};
|
||||||
|
|
||||||
|
int __init imx_init_uart(int uart_no, struct imxuart_platform_data *pdata);
|
||||||
|
|
||||||
|
#endif
|
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