drm/nouveau/pmu: switch to instanced constructor

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>
This commit is contained in:
Ben Skeggs 2020-12-04 12:45:01 +10:00
Родитель 9b70cd54a1
Коммит e4b15b4ca0
19 изменённых файлов: 96 добавлений и 87 удалений

Просмотреть файл

@ -60,7 +60,6 @@ struct nvkm_device {
struct notifier_block nb;
} acpi;
struct nvkm_pmu *pmu;
struct nvkm_therm *therm;
struct nvkm_timer *timer;
struct nvkm_top *top;
@ -128,7 +127,6 @@ struct nvkm_device_chip {
#include <core/layout.h>
#undef NVKM_LAYOUT_INST
#undef NVKM_LAYOUT_ONCE
int (*pmu )(struct nvkm_device *, int idx, struct nvkm_pmu **);
int (*therm )(struct nvkm_device *, int idx, struct nvkm_therm **);
int (*timer )(struct nvkm_device *, int idx, struct nvkm_timer **);
int (*top )(struct nvkm_device *, int idx, struct nvkm_top **);

Просмотреть файл

@ -16,6 +16,7 @@ NVKM_LAYOUT_ONCE(NVKM_SUBDEV_MMU , struct nvkm_mmu , mmu)
NVKM_LAYOUT_ONCE(NVKM_SUBDEV_BAR , struct nvkm_bar , bar)
NVKM_LAYOUT_ONCE(NVKM_SUBDEV_FAULT , struct nvkm_fault , fault)
NVKM_LAYOUT_ONCE(NVKM_SUBDEV_ACR , struct nvkm_acr , acr)
NVKM_LAYOUT_ONCE(NVKM_SUBDEV_PMU , struct nvkm_pmu , pmu)
NVKM_LAYOUT_ONCE(NVKM_SUBDEV_ICCSENSE, struct nvkm_iccsense, iccsense)
NVKM_LAYOUT_ONCE(NVKM_SUBDEV_CLK , struct nvkm_clk , clk)
NVKM_LAYOUT_ONCE(NVKM_SUBDEV_GSP , struct nvkm_gsp , gsp)

Просмотреть файл

@ -40,18 +40,18 @@ int nvkm_pmu_send(struct nvkm_pmu *, u32 reply[2], u32 process,
void nvkm_pmu_pgob(struct nvkm_pmu *, bool enable);
bool nvkm_pmu_fan_controlled(struct nvkm_device *);
int gt215_pmu_new(struct nvkm_device *, int, struct nvkm_pmu **);
int gf100_pmu_new(struct nvkm_device *, int, struct nvkm_pmu **);
int gf119_pmu_new(struct nvkm_device *, int, struct nvkm_pmu **);
int gk104_pmu_new(struct nvkm_device *, int, struct nvkm_pmu **);
int gk110_pmu_new(struct nvkm_device *, int, struct nvkm_pmu **);
int gk208_pmu_new(struct nvkm_device *, int, struct nvkm_pmu **);
int gk20a_pmu_new(struct nvkm_device *, int, struct nvkm_pmu **);
int gm107_pmu_new(struct nvkm_device *, int, struct nvkm_pmu **);
int gm200_pmu_new(struct nvkm_device *, int, struct nvkm_pmu **);
int gm20b_pmu_new(struct nvkm_device *, int, struct nvkm_pmu **);
int gp102_pmu_new(struct nvkm_device *, int, struct nvkm_pmu **);
int gp10b_pmu_new(struct nvkm_device *, int, struct nvkm_pmu **);
int gt215_pmu_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_pmu **);
int gf100_pmu_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_pmu **);
int gf119_pmu_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_pmu **);
int gk104_pmu_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_pmu **);
int gk110_pmu_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_pmu **);
int gk208_pmu_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_pmu **);
int gk20a_pmu_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_pmu **);
int gm107_pmu_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_pmu **);
int gm200_pmu_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_pmu **);
int gm20b_pmu_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_pmu **);
int gp102_pmu_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_pmu **);
int gp10b_pmu_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_pmu **);
/* interface to MEMX process running on PMU */
struct nvkm_memx;

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@ -33,7 +33,6 @@ nvkm_subdev_type[NVKM_SUBDEV_NR] = {
#include <core/layout.h>
#undef NVKM_LAYOUT_ONCE
#undef NVKM_LAYOUT_INST
[NVKM_SUBDEV_PMU ] = "pmu",
[NVKM_SUBDEV_THERM ] = "therm",
[NVKM_SUBDEV_TIMER ] = "tmr",
[NVKM_SUBDEV_TOP ] = "top",

Просмотреть файл

@ -1155,7 +1155,7 @@ nva3_chipset = {
.mmu = { 0x00000001, g84_mmu_new },
.mxm = { 0x00000001, nv50_mxm_new },
.pci = { 0x00000001, g94_pci_new },
.pmu = gt215_pmu_new,
.pmu = { 0x00000001, gt215_pmu_new },
.therm = gt215_therm_new,
.timer = nv41_timer_new,
.volt = nv40_volt_new,
@ -1189,7 +1189,7 @@ nva5_chipset = {
.mmu = { 0x00000001, g84_mmu_new },
.mxm = { 0x00000001, nv50_mxm_new },
.pci = { 0x00000001, g94_pci_new },
.pmu = gt215_pmu_new,
.pmu = { 0x00000001, gt215_pmu_new },
.therm = gt215_therm_new,
.timer = nv41_timer_new,
.volt = nv40_volt_new,
@ -1222,7 +1222,7 @@ nva8_chipset = {
.mmu = { 0x00000001, g84_mmu_new },
.mxm = { 0x00000001, nv50_mxm_new },
.pci = { 0x00000001, g94_pci_new },
.pmu = gt215_pmu_new,
.pmu = { 0x00000001, gt215_pmu_new },
.therm = gt215_therm_new,
.timer = nv41_timer_new,
.volt = nv40_volt_new,
@ -1319,7 +1319,7 @@ nvaf_chipset = {
.mmu = { 0x00000001, mcp77_mmu_new },
.mxm = { 0x00000001, nv50_mxm_new },
.pci = { 0x00000001, g94_pci_new },
.pmu = gt215_pmu_new,
.pmu = { 0x00000001, gt215_pmu_new },
.therm = gt215_therm_new,
.timer = nv41_timer_new,
.volt = nv40_volt_new,
@ -1355,7 +1355,7 @@ nvc0_chipset = {
.mmu = { 0x00000001, gf100_mmu_new },
.mxm = { 0x00000001, nv50_mxm_new },
.pci = { 0x00000001, gf100_pci_new },
.pmu = gf100_pmu_new,
.pmu = { 0x00000001, gf100_pmu_new },
.therm = gt215_therm_new,
.timer = nv41_timer_new,
.volt = gf100_volt_new,
@ -1392,7 +1392,7 @@ nvc1_chipset = {
.mmu = { 0x00000001, gf100_mmu_new },
.mxm = { 0x00000001, nv50_mxm_new },
.pci = { 0x00000001, gf106_pci_new },
.pmu = gf100_pmu_new,
.pmu = { 0x00000001, gf100_pmu_new },
.therm = gt215_therm_new,
.timer = nv41_timer_new,
.volt = gf100_volt_new,
@ -1428,7 +1428,7 @@ nvc3_chipset = {
.mmu = { 0x00000001, gf100_mmu_new },
.mxm = { 0x00000001, nv50_mxm_new },
.pci = { 0x00000001, gf106_pci_new },
.pmu = gf100_pmu_new,
.pmu = { 0x00000001, gf100_pmu_new },
.therm = gt215_therm_new,
.timer = nv41_timer_new,
.volt = gf100_volt_new,
@ -1464,7 +1464,7 @@ nvc4_chipset = {
.mmu = { 0x00000001, gf100_mmu_new },
.mxm = { 0x00000001, nv50_mxm_new },
.pci = { 0x00000001, gf100_pci_new },
.pmu = gf100_pmu_new,
.pmu = { 0x00000001, gf100_pmu_new },
.therm = gt215_therm_new,
.timer = nv41_timer_new,
.volt = gf100_volt_new,
@ -1501,7 +1501,7 @@ nvc8_chipset = {
.mmu = { 0x00000001, gf100_mmu_new },
.mxm = { 0x00000001, nv50_mxm_new },
.pci = { 0x00000001, gf100_pci_new },
.pmu = gf100_pmu_new,
.pmu = { 0x00000001, gf100_pmu_new },
.therm = gt215_therm_new,
.timer = nv41_timer_new,
.volt = gf100_volt_new,
@ -1538,7 +1538,7 @@ nvce_chipset = {
.mmu = { 0x00000001, gf100_mmu_new },
.mxm = { 0x00000001, nv50_mxm_new },
.pci = { 0x00000001, gf100_pci_new },
.pmu = gf100_pmu_new,
.pmu = { 0x00000001, gf100_pmu_new },
.therm = gt215_therm_new,
.timer = nv41_timer_new,
.volt = gf100_volt_new,
@ -1575,7 +1575,7 @@ nvcf_chipset = {
.mmu = { 0x00000001, gf100_mmu_new },
.mxm = { 0x00000001, nv50_mxm_new },
.pci = { 0x00000001, gf106_pci_new },
.pmu = gf100_pmu_new,
.pmu = { 0x00000001, gf100_pmu_new },
.therm = gt215_therm_new,
.timer = nv41_timer_new,
.volt = gf100_volt_new,
@ -1646,7 +1646,7 @@ nvd9_chipset = {
.mmu = { 0x00000001, gf100_mmu_new },
.mxm = { 0x00000001, nv50_mxm_new },
.pci = { 0x00000001, gf106_pci_new },
.pmu = gf119_pmu_new,
.pmu = { 0x00000001, gf119_pmu_new },
.therm = gf119_therm_new,
.timer = nv41_timer_new,
.volt = gf100_volt_new,
@ -1682,7 +1682,7 @@ nve4_chipset = {
.mmu = { 0x00000001, gk104_mmu_new },
.mxm = { 0x00000001, nv50_mxm_new },
.pci = { 0x00000001, gk104_pci_new },
.pmu = gk104_pmu_new,
.pmu = { 0x00000001, gk104_pmu_new },
.therm = gk104_therm_new,
.timer = nv41_timer_new,
.top = gk104_top_new,
@ -1721,7 +1721,7 @@ nve6_chipset = {
.mmu = { 0x00000001, gk104_mmu_new },
.mxm = { 0x00000001, nv50_mxm_new },
.pci = { 0x00000001, gk104_pci_new },
.pmu = gk104_pmu_new,
.pmu = { 0x00000001, gk104_pmu_new },
.therm = gk104_therm_new,
.timer = nv41_timer_new,
.top = gk104_top_new,
@ -1760,7 +1760,7 @@ nve7_chipset = {
.mmu = { 0x00000001, gk104_mmu_new },
.mxm = { 0x00000001, nv50_mxm_new },
.pci = { 0x00000001, gk104_pci_new },
.pmu = gk104_pmu_new,
.pmu = { 0x00000001, gk104_pmu_new },
.therm = gk104_therm_new,
.timer = nv41_timer_new,
.top = gk104_top_new,
@ -1792,7 +1792,7 @@ nvea_chipset = {
.ltc = { 0x00000001, gk104_ltc_new },
.mc = { 0x00000001, gk20a_mc_new },
.mmu = { 0x00000001, gk20a_mmu_new },
.pmu = gk20a_pmu_new,
.pmu = { 0x00000001, gk20a_pmu_new },
.timer = gk20a_timer_new,
.top = gk104_top_new,
.volt = gk20a_volt_new,
@ -1824,7 +1824,7 @@ nvf0_chipset = {
.mmu = { 0x00000001, gk104_mmu_new },
.mxm = { 0x00000001, nv50_mxm_new },
.pci = { 0x00000001, gk104_pci_new },
.pmu = gk110_pmu_new,
.pmu = { 0x00000001, gk110_pmu_new },
.therm = gk104_therm_new,
.timer = nv41_timer_new,
.top = gk104_top_new,
@ -1862,7 +1862,7 @@ nvf1_chipset = {
.mmu = { 0x00000001, gk104_mmu_new },
.mxm = { 0x00000001, nv50_mxm_new },
.pci = { 0x00000001, gk104_pci_new },
.pmu = gk110_pmu_new,
.pmu = { 0x00000001, gk110_pmu_new },
.therm = gk104_therm_new,
.timer = nv41_timer_new,
.top = gk104_top_new,
@ -1900,7 +1900,7 @@ nv106_chipset = {
.mmu = { 0x00000001, gk104_mmu_new },
.mxm = { 0x00000001, nv50_mxm_new },
.pci = { 0x00000001, gk104_pci_new },
.pmu = gk208_pmu_new,
.pmu = { 0x00000001, gk208_pmu_new },
.therm = gk104_therm_new,
.timer = nv41_timer_new,
.top = gk104_top_new,
@ -1938,7 +1938,7 @@ nv108_chipset = {
.mmu = { 0x00000001, gk104_mmu_new },
.mxm = { 0x00000001, nv50_mxm_new },
.pci = { 0x00000001, gk104_pci_new },
.pmu = gk208_pmu_new,
.pmu = { 0x00000001, gk208_pmu_new },
.therm = gk104_therm_new,
.timer = nv41_timer_new,
.top = gk104_top_new,
@ -1976,7 +1976,7 @@ nv117_chipset = {
.mmu = { 0x00000001, gk104_mmu_new },
.mxm = { 0x00000001, nv50_mxm_new },
.pci = { 0x00000001, gk104_pci_new },
.pmu = gm107_pmu_new,
.pmu = { 0x00000001, gm107_pmu_new },
.therm = gm107_therm_new,
.timer = gk20a_timer_new,
.top = gk104_top_new,
@ -2012,7 +2012,7 @@ nv118_chipset = {
.mmu = { 0x00000001, gk104_mmu_new },
.mxm = { 0x00000001, nv50_mxm_new },
.pci = { 0x00000001, gk104_pci_new },
.pmu = gm107_pmu_new,
.pmu = { 0x00000001, gm107_pmu_new },
.therm = gm107_therm_new,
.timer = gk20a_timer_new,
.top = gk104_top_new,
@ -2046,7 +2046,7 @@ nv120_chipset = {
.mmu = { 0x00000001, gm200_mmu_new },
.mxm = { 0x00000001, nv50_mxm_new },
.pci = { 0x00000001, gk104_pci_new },
.pmu = gm200_pmu_new,
.pmu = { 0x00000001, gm200_pmu_new },
.therm = gm200_therm_new,
.timer = gk20a_timer_new,
.top = gk104_top_new,
@ -2084,7 +2084,7 @@ nv124_chipset = {
.mmu = { 0x00000001, gm200_mmu_new },
.mxm = { 0x00000001, nv50_mxm_new },
.pci = { 0x00000001, gk104_pci_new },
.pmu = gm200_pmu_new,
.pmu = { 0x00000001, gm200_pmu_new },
.therm = gm200_therm_new,
.timer = gk20a_timer_new,
.top = gk104_top_new,
@ -2122,7 +2122,7 @@ nv126_chipset = {
.mmu = { 0x00000001, gm200_mmu_new },
.mxm = { 0x00000001, nv50_mxm_new },
.pci = { 0x00000001, gk104_pci_new },
.pmu = gm200_pmu_new,
.pmu = { 0x00000001, gm200_pmu_new },
.therm = gm200_therm_new,
.timer = gk20a_timer_new,
.top = gk104_top_new,
@ -2153,7 +2153,7 @@ nv12b_chipset = {
.ltc = { 0x00000001, gm200_ltc_new },
.mc = { 0x00000001, gk20a_mc_new },
.mmu = { 0x00000001, gm20b_mmu_new },
.pmu = gm20b_pmu_new,
.pmu = { 0x00000001, gm20b_pmu_new },
.timer = gk20a_timer_new,
.top = gk104_top_new,
.ce[2] = gm200_ce_new,
@ -2184,7 +2184,7 @@ nv130_chipset = {
.mmu = { 0x00000001, gp100_mmu_new },
.therm = gp100_therm_new,
.pci = { 0x00000001, gp100_pci_new },
.pmu = gm200_pmu_new,
.pmu = { 0x00000001, gm200_pmu_new },
.timer = gk20a_timer_new,
.top = gk104_top_new,
.ce[0] = gp100_ce_new,
@ -2224,7 +2224,7 @@ nv132_chipset = {
.mmu = { 0x00000001, gp100_mmu_new },
.therm = gp100_therm_new,
.pci = { 0x00000001, gp100_pci_new },
.pmu = gp102_pmu_new,
.pmu = { 0x00000001, gp102_pmu_new },
.timer = gk20a_timer_new,
.top = gk104_top_new,
.ce[0] = gp102_ce_new,
@ -2262,7 +2262,7 @@ nv134_chipset = {
.mmu = { 0x00000001, gp100_mmu_new },
.therm = gp100_therm_new,
.pci = { 0x00000001, gp100_pci_new },
.pmu = gp102_pmu_new,
.pmu = { 0x00000001, gp102_pmu_new },
.timer = gk20a_timer_new,
.top = gk104_top_new,
.ce[0] = gp102_ce_new,
@ -2300,7 +2300,7 @@ nv136_chipset = {
.mmu = { 0x00000001, gp100_mmu_new },
.therm = gp100_therm_new,
.pci = { 0x00000001, gp100_pci_new },
.pmu = gp102_pmu_new,
.pmu = { 0x00000001, gp102_pmu_new },
.timer = gk20a_timer_new,
.top = gk104_top_new,
.ce[0] = gp102_ce_new,
@ -2337,7 +2337,7 @@ nv137_chipset = {
.mmu = { 0x00000001, gp100_mmu_new },
.therm = gp100_therm_new,
.pci = { 0x00000001, gp100_pci_new },
.pmu = gp102_pmu_new,
.pmu = { 0x00000001, gp102_pmu_new },
.timer = gk20a_timer_new,
.top = gk104_top_new,
.ce[0] = gp102_ce_new,
@ -2375,7 +2375,7 @@ nv138_chipset = {
.mmu = { 0x00000001, gp100_mmu_new },
.therm = gp100_therm_new,
.pci = { 0x00000001, gp100_pci_new },
.pmu = gp102_pmu_new,
.pmu = { 0x00000001, gp102_pmu_new },
.timer = gk20a_timer_new,
.top = gk104_top_new,
.ce[0] = gp102_ce_new,
@ -2405,7 +2405,7 @@ nv13b_chipset = {
.ltc = { 0x00000001, gp10b_ltc_new },
.mc = { 0x00000001, gp10b_mc_new },
.mmu = { 0x00000001, gp10b_mmu_new },
.pmu = gp10b_pmu_new,
.pmu = { 0x00000001, gp10b_pmu_new },
.timer = gk20a_timer_new,
.top = gk104_top_new,
.ce[0] = gp100_ce_new,
@ -2435,7 +2435,7 @@ nv140_chipset = {
.mc = { 0x00000001, gp100_mc_new },
.mmu = { 0x00000001, gv100_mmu_new },
.pci = { 0x00000001, gp100_pci_new },
.pmu = gp102_pmu_new,
.pmu = { 0x00000001, gp102_pmu_new },
.therm = gp100_therm_new,
.timer = gk20a_timer_new,
.top = gk104_top_new,
@ -2479,7 +2479,7 @@ nv162_chipset = {
.mc = { 0x00000001, tu102_mc_new },
.mmu = { 0x00000001, tu102_mmu_new },
.pci = { 0x00000001, gp100_pci_new },
.pmu = gp102_pmu_new,
.pmu = { 0x00000001, gp102_pmu_new },
.therm = gp100_therm_new,
.timer = gk20a_timer_new,
.top = gk104_top_new,
@ -2517,7 +2517,7 @@ nv164_chipset = {
.mc = { 0x00000001, tu102_mc_new },
.mmu = { 0x00000001, tu102_mmu_new },
.pci = { 0x00000001, gp100_pci_new },
.pmu = gp102_pmu_new,
.pmu = { 0x00000001, gp102_pmu_new },
.therm = gp100_therm_new,
.timer = gk20a_timer_new,
.top = gk104_top_new,
@ -2556,7 +2556,7 @@ nv166_chipset = {
.mc = { 0x00000001, tu102_mc_new },
.mmu = { 0x00000001, tu102_mmu_new },
.pci = { 0x00000001, gp100_pci_new },
.pmu = gp102_pmu_new,
.pmu = { 0x00000001, gp102_pmu_new },
.therm = gp100_therm_new,
.timer = gk20a_timer_new,
.top = gk104_top_new,
@ -2596,7 +2596,7 @@ nv167_chipset = {
.mc = { 0x00000001, tu102_mc_new },
.mmu = { 0x00000001, tu102_mmu_new },
.pci = { 0x00000001, gp100_pci_new },
.pmu = gp102_pmu_new,
.pmu = { 0x00000001, gp102_pmu_new },
.therm = gp100_therm_new,
.timer = gk20a_timer_new,
.top = gk104_top_new,
@ -2634,7 +2634,7 @@ nv168_chipset = {
.mc = { 0x00000001, tu102_mc_new },
.mmu = { 0x00000001, tu102_mmu_new },
.pci = { 0x00000001, gp100_pci_new },
.pmu = gp102_pmu_new,
.pmu = { 0x00000001, gp102_pmu_new },
.therm = gp100_therm_new,
.timer = gk20a_timer_new,
.top = gk104_top_new,
@ -3248,7 +3248,6 @@ nvkm_device_ctor(const struct nvkm_device_func *func,
#include <core/layout.h>
#undef NVKM_LAYOUT_INST
#undef NVKM_LAYOUT_ONCE
_(NVKM_SUBDEV_PMU , pmu);
_(NVKM_SUBDEV_THERM , therm);
_(NVKM_SUBDEV_TIMER , timer);
_(NVKM_SUBDEV_TOP , top);

Просмотреть файл

@ -163,11 +163,11 @@ nvkm_pmu = {
int
nvkm_pmu_ctor(const struct nvkm_pmu_fwif *fwif, struct nvkm_device *device,
int index, struct nvkm_pmu *pmu)
enum nvkm_subdev_type type, int inst, struct nvkm_pmu *pmu)
{
int ret;
nvkm_subdev_ctor(&nvkm_pmu, device, index, &pmu->subdev);
nvkm_subdev_ctor(&nvkm_pmu, device, type, inst, &pmu->subdev);
mutex_init(&pmu->send.mutex);
@ -197,10 +197,10 @@ nvkm_pmu_ctor(const struct nvkm_pmu_fwif *fwif, struct nvkm_device *device,
int
nvkm_pmu_new_(const struct nvkm_pmu_fwif *fwif, struct nvkm_device *device,
int index, struct nvkm_pmu **ppmu)
enum nvkm_subdev_type type, int inst, struct nvkm_pmu **ppmu)
{
struct nvkm_pmu *pmu;
if (!(pmu = *ppmu = kzalloc(sizeof(*pmu), GFP_KERNEL)))
return -ENOMEM;
return nvkm_pmu_ctor(fwif, device, index, *ppmu);
return nvkm_pmu_ctor(fwif, device, type, inst, *ppmu);
}

Просмотреть файл

@ -69,7 +69,8 @@ gf100_pmu_fwif[] = {
};
int
gf100_pmu_new(struct nvkm_device *device, int index, struct nvkm_pmu **ppmu)
gf100_pmu_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst,
struct nvkm_pmu **ppmu)
{
return nvkm_pmu_new_(gf100_pmu_fwif, device, index, ppmu);
return nvkm_pmu_new_(gf100_pmu_fwif, device, type, inst, ppmu);
}

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@ -47,7 +47,8 @@ gf119_pmu_fwif[] = {
};
int
gf119_pmu_new(struct nvkm_device *device, int index, struct nvkm_pmu **ppmu)
gf119_pmu_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst,
struct nvkm_pmu **ppmu)
{
return nvkm_pmu_new_(gf119_pmu_fwif, device, index, ppmu);
return nvkm_pmu_new_(gf119_pmu_fwif, device, type, inst, ppmu);
}

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@ -127,7 +127,8 @@ gk104_pmu_fwif[] = {
};
int
gk104_pmu_new(struct nvkm_device *device, int index, struct nvkm_pmu **ppmu)
gk104_pmu_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst,
struct nvkm_pmu **ppmu)
{
return nvkm_pmu_new_(gk104_pmu_fwif, device, index, ppmu);
return nvkm_pmu_new_(gk104_pmu_fwif, device, type, inst, ppmu);
}

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@ -106,7 +106,8 @@ gk110_pmu_fwif[] = {
};
int
gk110_pmu_new(struct nvkm_device *device, int index, struct nvkm_pmu **ppmu)
gk110_pmu_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst,
struct nvkm_pmu **ppmu)
{
return nvkm_pmu_new_(gk110_pmu_fwif, device, index, ppmu);
return nvkm_pmu_new_(gk110_pmu_fwif, device, type, inst, ppmu);
}

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@ -48,7 +48,8 @@ gk208_pmu_fwif[] = {
};
int
gk208_pmu_new(struct nvkm_device *device, int index, struct nvkm_pmu **ppmu)
gk208_pmu_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst,
struct nvkm_pmu **ppmu)
{
return nvkm_pmu_new_(gk208_pmu_fwif, device, index, ppmu);
return nvkm_pmu_new_(gk208_pmu_fwif, device, type, inst, ppmu);
}

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@ -210,7 +210,8 @@ gk20a_pmu_fwif[] = {
};
int
gk20a_pmu_new(struct nvkm_device *device, int index, struct nvkm_pmu **ppmu)
gk20a_pmu_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst,
struct nvkm_pmu **ppmu)
{
struct gk20a_pmu *pmu;
int ret;
@ -219,7 +220,7 @@ gk20a_pmu_new(struct nvkm_device *device, int index, struct nvkm_pmu **ppmu)
return -ENOMEM;
*ppmu = &pmu->base;
ret = nvkm_pmu_ctor(gk20a_pmu_fwif, device, index, &pmu->base);
ret = nvkm_pmu_ctor(gk20a_pmu_fwif, device, type, inst, &pmu->base);
if (ret)
return ret;

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@ -49,7 +49,8 @@ gm107_pmu_fwif[] = {
};
int
gm107_pmu_new(struct nvkm_device *device, int index, struct nvkm_pmu **ppmu)
gm107_pmu_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst,
struct nvkm_pmu **ppmu)
{
return nvkm_pmu_new_(gm107_pmu_fwif, device, index, ppmu);
return nvkm_pmu_new_(gm107_pmu_fwif, device, type, inst, ppmu);
}

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@ -45,7 +45,8 @@ gm200_pmu_fwif[] = {
};
int
gm200_pmu_new(struct nvkm_device *device, int index, struct nvkm_pmu **ppmu)
gm200_pmu_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst,
struct nvkm_pmu **ppmu)
{
return nvkm_pmu_new_(gm200_pmu_fwif, device, index, ppmu);
return nvkm_pmu_new_(gm200_pmu_fwif, device, type, inst, ppmu);
}

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@ -240,7 +240,8 @@ gm20b_pmu_fwif[] = {
};
int
gm20b_pmu_new(struct nvkm_device *device, int index, struct nvkm_pmu **ppmu)
gm20b_pmu_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst,
struct nvkm_pmu **ppmu)
{
return nvkm_pmu_new_(gm20b_pmu_fwif, device, index, ppmu);
return nvkm_pmu_new_(gm20b_pmu_fwif, device, type, inst, ppmu);
}

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@ -51,7 +51,8 @@ gp102_pmu_fwif[] = {
};
int
gp102_pmu_new(struct nvkm_device *device, int index, struct nvkm_pmu **ppmu)
gp102_pmu_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst,
struct nvkm_pmu **ppmu)
{
return nvkm_pmu_new_(gp102_pmu_fwif, device, index, ppmu);
return nvkm_pmu_new_(gp102_pmu_fwif, device, type, inst, ppmu);
}

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@ -99,7 +99,8 @@ gp10b_pmu_fwif[] = {
};
int
gp10b_pmu_new(struct nvkm_device *device, int index, struct nvkm_pmu **ppmu)
gp10b_pmu_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst,
struct nvkm_pmu **ppmu)
{
return nvkm_pmu_new_(gp10b_pmu_fwif, device, index, ppmu);
return nvkm_pmu_new_(gp10b_pmu_fwif, device, type, inst, ppmu);
}

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@ -282,7 +282,8 @@ gt215_pmu_fwif[] = {
};
int
gt215_pmu_new(struct nvkm_device *device, int index, struct nvkm_pmu **ppmu)
gt215_pmu_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst,
struct nvkm_pmu **ppmu)
{
return nvkm_pmu_new_(gt215_pmu_fwif, device, index, ppmu);
return nvkm_pmu_new_(gt215_pmu_fwif, device, type, inst, ppmu);
}

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@ -62,8 +62,8 @@ int gf100_pmu_nofw(struct nvkm_pmu *, int, const struct nvkm_pmu_fwif *);
int gm200_pmu_nofw(struct nvkm_pmu *, int, const struct nvkm_pmu_fwif *);
int gm20b_pmu_load(struct nvkm_pmu *, int, const struct nvkm_pmu_fwif *);
int nvkm_pmu_ctor(const struct nvkm_pmu_fwif *, struct nvkm_device *,
int index, struct nvkm_pmu *);
int nvkm_pmu_new_(const struct nvkm_pmu_fwif *, struct nvkm_device *,
int index, struct nvkm_pmu **);
int nvkm_pmu_ctor(const struct nvkm_pmu_fwif *, struct nvkm_device *, enum nvkm_subdev_type, int,
struct nvkm_pmu *);
int nvkm_pmu_new_(const struct nvkm_pmu_fwif *, struct nvkm_device *, enum nvkm_subdev_type, int,
struct nvkm_pmu **);
#endif