alim15x3: fix handling of UDMA enable bit
Clear UDMA enable bit also for PIO modes. Based on libata pata_ali host driver. Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Родитель
a345c7856e
Коммит
e4c7112b56
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@ -62,11 +62,22 @@ static void ali_fifo_control(ide_hwif_t *hwif, ide_drive_t *drive, int on)
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}
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}
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static void ali_program_timings(ide_hwif_t *hwif, ide_drive_t *drive,
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static void ali_program_timings(ide_hwif_t *hwif, ide_drive_t *drive,
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struct ide_timing *t)
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struct ide_timing *t, u8 ultra)
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{
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{
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struct pci_dev *dev = to_pci_dev(hwif->dev);
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struct pci_dev *dev = to_pci_dev(hwif->dev);
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int port = hwif->channel ? 0x5c : 0x58;
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int port = hwif->channel ? 0x5c : 0x58;
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u8 unit = drive->dn & 1;
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int udmat = 0x56 + hwif->channel;
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u8 unit = drive->dn & 1, udma;
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int shift = 4 * unit;
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/* Set up the UDMA */
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pci_read_config_byte(dev, udmat, &udma);
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udma &= ~(0x0F << shift);
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udma |= ultra << shift;
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pci_write_config_byte(dev, udmat, udma);
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if (t == NULL)
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return;
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t->setup = clamp_val(t->setup, 1, 8) & 7;
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t->setup = clamp_val(t->setup, 1, 8) & 7;
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t->act8b = clamp_val(t->act8b, 1, 8) & 7;
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t->act8b = clamp_val(t->act8b, 1, 8) & 7;
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@ -114,7 +125,7 @@ static void ali_set_pio_mode(ide_hwif_t *hwif, ide_drive_t *drive)
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*/
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*/
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ali_fifo_control(hwif, drive, (drive->media == ide_disk) ? 0x05 : 0x00);
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ali_fifo_control(hwif, drive, (drive->media == ide_disk) ? 0x05 : 0x00);
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ali_program_timings(hwif, drive, &t);
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ali_program_timings(hwif, drive, &t, 0);
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}
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}
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/**
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/**
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@ -152,29 +163,16 @@ static u8 ali_udma_filter(ide_drive_t *drive)
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static void ali_set_dma_mode(ide_hwif_t *hwif, ide_drive_t *drive)
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static void ali_set_dma_mode(ide_hwif_t *hwif, ide_drive_t *drive)
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{
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{
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static u8 udma_timing[7] = { 0xC, 0xB, 0xA, 0x9, 0x8, 0xF, 0xD };
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struct pci_dev *dev = to_pci_dev(hwif->dev);
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struct pci_dev *dev = to_pci_dev(hwif->dev);
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ide_drive_t *pair = ide_get_pair_dev(drive);
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ide_drive_t *pair = ide_get_pair_dev(drive);
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int bus_speed = ide_pci_clk ? ide_pci_clk : 33;
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int bus_speed = ide_pci_clk ? ide_pci_clk : 33;
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unsigned long T = 1000000 / bus_speed; /* PCI clock based */
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unsigned long T = 1000000 / bus_speed; /* PCI clock based */
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const u8 speed = drive->dma_mode;
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const u8 speed = drive->dma_mode;
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u8 speed1 = speed;
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u8 unit = drive->dn & 1;
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u8 tmpbyte = 0x00;
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u8 tmpbyte = 0x00;
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int m5229_udma = (hwif->channel) ? 0x57 : 0x56;
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struct ide_timing t;
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struct ide_timing t;
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if (speed == XFER_UDMA_6)
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speed1 = 0x47;
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if (speed < XFER_UDMA_0) {
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if (speed < XFER_UDMA_0) {
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u8 ultra_enable = (unit) ? 0x7f : 0xf7;
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/*
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* clear "ultra enable" bit
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*/
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pci_read_config_byte(dev, m5229_udma, &tmpbyte);
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tmpbyte &= ultra_enable;
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pci_write_config_byte(dev, m5229_udma, tmpbyte);
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ide_timing_compute(drive, drive->dma_mode, &t, T, 1);
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ide_timing_compute(drive, drive->dma_mode, &t, T, 1);
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if (pair) {
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if (pair) {
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struct ide_timing p;
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struct ide_timing p;
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@ -189,15 +187,10 @@ static void ali_set_dma_mode(ide_hwif_t *hwif, ide_drive_t *drive)
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IDE_TIMING_SETUP | IDE_TIMING_8BIT);
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IDE_TIMING_SETUP | IDE_TIMING_8BIT);
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}
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}
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}
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}
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ali_program_timings(hwif, drive, &t);
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ali_program_timings(hwif, drive, &t, 0);
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} else {
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} else {
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pci_read_config_byte(dev, m5229_udma, &tmpbyte);
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ali_program_timings(hwif, drive, NULL,
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tmpbyte &= (0x0f << ((1-unit) << 2));
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udma_timing[speed - XFER_UDMA_0]);
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/*
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* enable ultra dma and set timing
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*/
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tmpbyte |= ((0x08 | ((4-speed1)&0x07)) << (unit << 2));
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pci_write_config_byte(dev, m5229_udma, tmpbyte);
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if (speed >= XFER_UDMA_3) {
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if (speed >= XFER_UDMA_3) {
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pci_read_config_byte(dev, 0x4b, &tmpbyte);
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pci_read_config_byte(dev, 0x4b, &tmpbyte);
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tmpbyte |= 1;
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tmpbyte |= 1;
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