wl18xx: deprecate PG1 support
The new PG2 version of the chip has a few differences in terms of FW API if compared to PG1. PG1 is just a sample that shouldn't be used in real life, so to avoid having to handle both separately, mark the PG1 version as deprecated and bail out during probe. Signed-off-by: Luciano Coelho <coelho@ti.com>
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@ -32,25 +32,21 @@ enum {
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/* numbers of bits the length field takes (add 1 for the actual number) */
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#define WL18XX_HOST_IF_LEN_SIZE_FIELD 15
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#define WL18XX_ACX_EVENTS_VECTOR_PG1 (WL1271_ACX_INTR_WATCHDOG | \
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WL1271_ACX_INTR_INIT_COMPLETE | \
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WL1271_ACX_INTR_EVENT_A | \
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WL1271_ACX_INTR_EVENT_B | \
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WL1271_ACX_INTR_CMD_COMPLETE | \
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WL1271_ACX_INTR_HW_AVAILABLE | \
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WL1271_ACX_INTR_DATA)
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#define WL18XX_ACX_EVENTS_VECTOR (WL1271_ACX_INTR_WATCHDOG | \
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WL1271_ACX_INTR_INIT_COMPLETE | \
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WL1271_ACX_INTR_EVENT_A | \
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WL1271_ACX_INTR_EVENT_B | \
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WL1271_ACX_INTR_CMD_COMPLETE | \
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WL1271_ACX_INTR_HW_AVAILABLE | \
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WL1271_ACX_INTR_DATA | \
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WL1271_ACX_SW_INTR_WATCHDOG)
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#define WL18XX_ACX_EVENTS_VECTOR_PG2 (WL18XX_ACX_EVENTS_VECTOR_PG1 | \
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WL1271_ACX_SW_INTR_WATCHDOG)
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#define WL18XX_INTR_MASK_PG1 (WL1271_ACX_INTR_WATCHDOG | \
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WL1271_ACX_INTR_EVENT_A | \
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WL1271_ACX_INTR_EVENT_B | \
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WL1271_ACX_INTR_HW_AVAILABLE | \
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WL1271_ACX_INTR_DATA)
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#define WL18XX_INTR_MASK_PG2 (WL18XX_INTR_MASK_PG1 | \
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WL1271_ACX_SW_INTR_WATCHDOG)
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#define WL18XX_INTR_MASK (WL1271_ACX_INTR_WATCHDOG | \
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WL1271_ACX_INTR_EVENT_A | \
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WL1271_ACX_INTR_EVENT_B | \
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WL1271_ACX_INTR_HW_AVAILABLE | \
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WL1271_ACX_INTR_DATA | \
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WL1271_ACX_SW_INTR_WATCHDOG)
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struct wl18xx_acx_host_config_bitmap {
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struct acx_header header;
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@ -612,20 +612,11 @@ static int wl18xx_identify_chip(struct wl1271 *wl)
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WLCORE_QUIRK_TX_PAD_LAST_FRAME;
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break;
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case CHIP_ID_185x_PG10:
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wl1271_debug(DEBUG_BOOT, "chip id 0x%x (185x PG10)",
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wl->chip.id);
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wl->sr_fw_name = WL18XX_FW_NAME;
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/* wl18xx uses the same firmware for PLT */
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wl->plt_fw_name = WL18XX_FW_NAME;
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wl->quirks |= WLCORE_QUIRK_NO_ELP |
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WLCORE_QUIRK_FWLOG_NOT_IMPLEMENTED |
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WLCORE_QUIRK_RX_BLOCKSIZE_ALIGN |
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WLCORE_QUIRK_TX_BLOCKSIZE_ALIGN;
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wl1271_warning("chip id 0x%x (185x PG10) is deprecated",
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wl->chip.id);
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ret = -ENODEV;
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goto out;
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/* PG 1.0 has some problems with MCS_13, so disable it */
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wl->ht_cap[IEEE80211_BAND_2GHZ].mcs.rx_mask[1] &= ~BIT(5);
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break;
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default:
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wl1271_warning("unsupported chip id: 0x%x", wl->chip.id);
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ret = -ENODEV;
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@ -776,21 +767,14 @@ out:
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static int wl18xx_set_mac_and_phy(struct wl1271 *wl)
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{
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struct wl18xx_priv *priv = wl->priv;
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size_t len;
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int ret;
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/* the parameters struct is smaller for PG1 */
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if (wl->chip.id == CHIP_ID_185x_PG10)
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len = offsetof(struct wl18xx_mac_and_phy_params, psat) + 1;
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else
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len = sizeof(struct wl18xx_mac_and_phy_params);
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ret = wlcore_set_partition(wl, &wl->ptable[PART_PHY_INIT]);
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if (ret < 0)
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goto out;
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ret = wlcore_write(wl, WL18XX_PHY_INIT_MEM_ADDR, (u8 *)&priv->conf.phy,
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len, false);
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sizeof(struct wl18xx_mac_and_phy_params), false);
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out:
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return ret;
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@ -801,13 +785,8 @@ static int wl18xx_enable_interrupts(struct wl1271 *wl)
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u32 event_mask, intr_mask;
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int ret;
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if (wl->chip.id == CHIP_ID_185x_PG10) {
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event_mask = WL18XX_ACX_EVENTS_VECTOR_PG1;
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intr_mask = WL18XX_INTR_MASK_PG1;
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} else {
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event_mask = WL18XX_ACX_EVENTS_VECTOR_PG2;
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intr_mask = WL18XX_INTR_MASK_PG2;
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}
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event_mask = WL18XX_ACX_EVENTS_VECTOR;
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intr_mask = WL18XX_INTR_MASK;
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ret = wlcore_write_reg(wl, REG_INTERRUPT_MASK, event_mask);
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if (ret < 0)
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@ -1049,16 +1028,6 @@ static u32 wl18xx_ap_get_mimo_wide_rate_mask(struct wl1271 *wl,
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} else if (!strcmp(ht_mode_param, "mimo")) {
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wl1271_debug(DEBUG_ACX, "using MIMO rate mask");
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/*
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* PG 1.0 has some problems with MCS_13, so disable it
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*
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* TODO: instead of hacking this in here, we should
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* make it more general and change a bit in the
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* wlvif->rate_set instead.
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*/
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if (wl->chip.id == CHIP_ID_185x_PG10)
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return CONF_TX_MIMO_RATES & ~CONF_HW_BIT_RATE_MCS_13;
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return CONF_TX_MIMO_RATES;
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} else {
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return 0;
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