net/mlx5e: Refactor eswitch attr flags to just attr flags
The flags are flow attrs and not esw specific attr flags. Refactor to remove the esw prefix and move from eswitch.h to en_tc.h where struct mlx5_flow_attr exists. Signed-off-by: Roi Dayan <roid@nvidia.com> Reviewed-by: Oz Shlomo <ozsh@nvidia.com> Reviewed-by: Vlad Buslov <vladbu@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
This commit is contained in:
Родитель
efe6f961cd
Коммит
e5d4e1da65
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@ -21,7 +21,7 @@ tc_act_parse_accept(struct mlx5e_tc_act_parse_state *parse_state,
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{
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{
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attr->action |= MLX5_FLOW_CONTEXT_ACTION_FWD_DEST |
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attr->action |= MLX5_FLOW_CONTEXT_ACTION_FWD_DEST |
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MLX5_FLOW_CONTEXT_ACTION_COUNT;
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MLX5_FLOW_CONTEXT_ACTION_COUNT;
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attr->flags |= MLX5_ESW_ATTR_FLAG_ACCEPT;
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attr->flags |= MLX5_ATTR_FLAG_ACCEPT;
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return 0;
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return 0;
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}
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}
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@ -28,7 +28,7 @@ tc_act_parse_trap(struct mlx5e_tc_act_parse_state *parse_state,
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{
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{
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attr->action |= MLX5_FLOW_CONTEXT_ACTION_FWD_DEST |
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attr->action |= MLX5_FLOW_CONTEXT_ACTION_FWD_DEST |
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MLX5_FLOW_CONTEXT_ACTION_COUNT;
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MLX5_FLOW_CONTEXT_ACTION_COUNT;
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attr->flags |= MLX5_ESW_ATTR_FLAG_SLOW_PATH;
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attr->flags |= MLX5_ATTR_FLAG_SLOW_PATH;
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return 0;
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return 0;
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}
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}
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@ -403,7 +403,7 @@ add_post_rule(struct mlx5_eswitch *esw, struct mlx5e_sample_flow *sample_flow,
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post_attr->chain = 0;
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post_attr->chain = 0;
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post_attr->prio = 0;
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post_attr->prio = 0;
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post_attr->ft = default_tbl;
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post_attr->ft = default_tbl;
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post_attr->flags = MLX5_ESW_ATTR_FLAG_NO_IN_PORT;
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post_attr->flags = MLX5_ATTR_FLAG_NO_IN_PORT;
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/* When offloading sample and encap action, if there is no valid
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/* When offloading sample and encap action, if there is no valid
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* neigh data struct, a slow path rule is offloaded first. Source
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* neigh data struct, a slow path rule is offloaded first. Source
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@ -581,7 +581,7 @@ mlx5e_tc_sample_offload(struct mlx5e_tc_psample *tc_psample,
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if (tunnel_id)
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if (tunnel_id)
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pre_attr->action |= MLX5_FLOW_CONTEXT_ACTION_DECAP;
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pre_attr->action |= MLX5_FLOW_CONTEXT_ACTION_DECAP;
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pre_attr->modify_hdr = sample_flow->restore->modify_hdr;
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pre_attr->modify_hdr = sample_flow->restore->modify_hdr;
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pre_attr->flags = MLX5_ESW_ATTR_FLAG_SAMPLE;
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pre_attr->flags = MLX5_ATTR_FLAG_SAMPLE;
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pre_attr->inner_match_level = attr->inner_match_level;
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pre_attr->inner_match_level = attr->inner_match_level;
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pre_attr->outer_match_level = attr->outer_match_level;
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pre_attr->outer_match_level = attr->outer_match_level;
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pre_attr->chain = attr->chain;
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pre_attr->chain = attr->chain;
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@ -809,7 +809,7 @@ mlx5_tc_ct_entry_add_rule(struct mlx5_tc_ct_priv *ct_priv,
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attr->ft = nat ? ct_priv->ct_nat : ct_priv->ct;
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attr->ft = nat ? ct_priv->ct_nat : ct_priv->ct;
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attr->outer_match_level = MLX5_MATCH_L4;
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attr->outer_match_level = MLX5_MATCH_L4;
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attr->counter = entry->counter->counter;
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attr->counter = entry->counter->counter;
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attr->flags |= MLX5_ESW_ATTR_FLAG_NO_IN_PORT;
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attr->flags |= MLX5_ATTR_FLAG_NO_IN_PORT;
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if (ct_priv->ns_type == MLX5_FLOW_NAMESPACE_FDB)
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if (ct_priv->ns_type == MLX5_FLOW_NAMESPACE_FDB)
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attr->esw_attr->in_mdev = priv->mdev;
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attr->esw_attr->in_mdev = priv->mdev;
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@ -1157,7 +1157,7 @@ mlx5e_tc_offload_fdb_rules(struct mlx5_eswitch *esw,
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struct mlx5e_tc_mod_hdr_acts *mod_hdr_acts;
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struct mlx5e_tc_mod_hdr_acts *mod_hdr_acts;
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struct mlx5_flow_handle *rule;
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struct mlx5_flow_handle *rule;
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if (attr->flags & MLX5_ESW_ATTR_FLAG_SLOW_PATH)
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if (attr->flags & MLX5_ATTR_FLAG_SLOW_PATH)
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return mlx5_eswitch_add_offloaded_rule(esw, spec, attr);
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return mlx5_eswitch_add_offloaded_rule(esw, spec, attr);
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if (flow_flag_test(flow, CT)) {
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if (flow_flag_test(flow, CT)) {
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@ -1196,7 +1196,7 @@ void mlx5e_tc_unoffload_fdb_rules(struct mlx5_eswitch *esw,
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{
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{
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flow_flag_clear(flow, OFFLOADED);
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flow_flag_clear(flow, OFFLOADED);
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if (attr->flags & MLX5_ESW_ATTR_FLAG_SLOW_PATH)
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if (attr->flags & MLX5_ATTR_FLAG_SLOW_PATH)
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goto offload_rule_0;
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goto offload_rule_0;
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if (attr->esw_attr->split_count)
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if (attr->esw_attr->split_count)
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@ -1226,7 +1226,7 @@ mlx5e_tc_offload_to_slow_path(struct mlx5_eswitch *esw,
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memcpy(slow_attr, flow->attr, ESW_FLOW_ATTR_SZ);
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memcpy(slow_attr, flow->attr, ESW_FLOW_ATTR_SZ);
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slow_attr->action = MLX5_FLOW_CONTEXT_ACTION_FWD_DEST;
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slow_attr->action = MLX5_FLOW_CONTEXT_ACTION_FWD_DEST;
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slow_attr->esw_attr->split_count = 0;
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slow_attr->esw_attr->split_count = 0;
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slow_attr->flags |= MLX5_ESW_ATTR_FLAG_SLOW_PATH;
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slow_attr->flags |= MLX5_ATTR_FLAG_SLOW_PATH;
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rule = mlx5e_tc_offload_fdb_rules(esw, flow, spec, slow_attr);
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rule = mlx5e_tc_offload_fdb_rules(esw, flow, spec, slow_attr);
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if (!IS_ERR(rule))
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if (!IS_ERR(rule))
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@ -1251,7 +1251,7 @@ void mlx5e_tc_unoffload_from_slow_path(struct mlx5_eswitch *esw,
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memcpy(slow_attr, flow->attr, ESW_FLOW_ATTR_SZ);
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memcpy(slow_attr, flow->attr, ESW_FLOW_ATTR_SZ);
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slow_attr->action = MLX5_FLOW_CONTEXT_ACTION_FWD_DEST;
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slow_attr->action = MLX5_FLOW_CONTEXT_ACTION_FWD_DEST;
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slow_attr->esw_attr->split_count = 0;
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slow_attr->esw_attr->split_count = 0;
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slow_attr->flags |= MLX5_ESW_ATTR_FLAG_SLOW_PATH;
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slow_attr->flags |= MLX5_ATTR_FLAG_SLOW_PATH;
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mlx5e_tc_unoffload_fdb_rules(esw, flow, slow_attr);
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mlx5e_tc_unoffload_fdb_rules(esw, flow, slow_attr);
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flow_flag_clear(flow, SLOW);
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flow_flag_clear(flow, SLOW);
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kfree(slow_attr);
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kfree(slow_attr);
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@ -89,6 +89,22 @@ struct mlx5_flow_attr {
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};
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};
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};
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};
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enum {
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MLX5_ATTR_FLAG_VLAN_HANDLED = BIT(0),
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MLX5_ATTR_FLAG_SLOW_PATH = BIT(1),
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MLX5_ATTR_FLAG_NO_IN_PORT = BIT(2),
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MLX5_ATTR_FLAG_SRC_REWRITE = BIT(3),
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MLX5_ATTR_FLAG_SAMPLE = BIT(4),
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MLX5_ATTR_FLAG_ACCEPT = BIT(5),
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};
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/* Returns true if any of the flags that require skipping further TC/NF processing are set. */
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static inline bool
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mlx5e_tc_attr_flags_skip(u32 attr_flags)
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{
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return attr_flags & (MLX5_ATTR_FLAG_SLOW_PATH | MLX5_ATTR_FLAG_ACCEPT);
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}
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struct mlx5_rx_tun_attr {
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struct mlx5_rx_tun_attr {
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u16 decap_vport;
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u16 decap_vport;
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union {
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union {
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@ -86,7 +86,7 @@ mlx5_esw_indir_table_needed(struct mlx5_eswitch *esw,
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mlx5_eswitch_is_vf_vport(esw, vport_num) &&
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mlx5_eswitch_is_vf_vport(esw, vport_num) &&
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esw->dev == dest_mdev &&
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esw->dev == dest_mdev &&
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attr->ip_version &&
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attr->ip_version &&
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attr->flags & MLX5_ESW_ATTR_FLAG_SRC_REWRITE;
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attr->flags & MLX5_ATTR_FLAG_SRC_REWRITE;
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}
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}
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u16
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u16
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@ -448,22 +448,6 @@ enum {
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MLX5_ESW_DEST_CHAIN_WITH_SRC_PORT_CHANGE = BIT(2),
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MLX5_ESW_DEST_CHAIN_WITH_SRC_PORT_CHANGE = BIT(2),
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};
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};
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enum {
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MLX5_ESW_ATTR_FLAG_VLAN_HANDLED = BIT(0),
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MLX5_ESW_ATTR_FLAG_SLOW_PATH = BIT(1),
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MLX5_ESW_ATTR_FLAG_NO_IN_PORT = BIT(2),
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MLX5_ESW_ATTR_FLAG_SRC_REWRITE = BIT(3),
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MLX5_ESW_ATTR_FLAG_SAMPLE = BIT(4),
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MLX5_ESW_ATTR_FLAG_ACCEPT = BIT(5),
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};
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/* Returns true if any of the flags that require skipping further TC/NF processing are set. */
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static inline bool
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mlx5_esw_attr_flags_skip(u32 attr_flags)
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{
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return attr_flags & (MLX5_ESW_ATTR_FLAG_SLOW_PATH | MLX5_ESW_ATTR_FLAG_ACCEPT);
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}
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struct mlx5_esw_flow_attr {
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struct mlx5_esw_flow_attr {
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struct mlx5_eswitch_rep *in_rep;
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struct mlx5_eswitch_rep *in_rep;
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struct mlx5_core_dev *in_mdev;
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struct mlx5_core_dev *in_mdev;
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@ -180,7 +180,7 @@ esw_setup_decap_indir(struct mlx5_eswitch *esw,
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{
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{
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struct mlx5_flow_table *ft;
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struct mlx5_flow_table *ft;
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if (!(attr->flags & MLX5_ESW_ATTR_FLAG_SRC_REWRITE))
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if (!(attr->flags & MLX5_ATTR_FLAG_SRC_REWRITE))
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return -EOPNOTSUPP;
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return -EOPNOTSUPP;
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ft = mlx5_esw_indir_table_get(esw, attr, spec,
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ft = mlx5_esw_indir_table_get(esw, attr, spec,
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@ -297,7 +297,7 @@ esw_setup_chain_src_port_rewrite(struct mlx5_flow_destination *dest,
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struct mlx5_esw_flow_attr *esw_attr = attr->esw_attr;
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struct mlx5_esw_flow_attr *esw_attr = attr->esw_attr;
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int err;
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int err;
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if (!(attr->flags & MLX5_ESW_ATTR_FLAG_SRC_REWRITE))
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if (!(attr->flags & MLX5_ATTR_FLAG_SRC_REWRITE))
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return -EOPNOTSUPP;
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return -EOPNOTSUPP;
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/* flow steering cannot handle more than one dest with the same ft
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/* flow steering cannot handle more than one dest with the same ft
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@ -364,7 +364,7 @@ esw_setup_indir_table(struct mlx5_flow_destination *dest,
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struct mlx5_esw_flow_attr *esw_attr = attr->esw_attr;
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struct mlx5_esw_flow_attr *esw_attr = attr->esw_attr;
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int j, err;
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int j, err;
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if (!(attr->flags & MLX5_ESW_ATTR_FLAG_SRC_REWRITE))
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if (!(attr->flags & MLX5_ATTR_FLAG_SRC_REWRITE))
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return -EOPNOTSUPP;
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return -EOPNOTSUPP;
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for (j = esw_attr->split_count; j < esw_attr->out_count; j++, (*i)++) {
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for (j = esw_attr->split_count; j < esw_attr->out_count; j++, (*i)++) {
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@ -463,15 +463,15 @@ esw_setup_dests(struct mlx5_flow_destination *dest,
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if (!mlx5_eswitch_termtbl_required(esw, attr, flow_act, spec) &&
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if (!mlx5_eswitch_termtbl_required(esw, attr, flow_act, spec) &&
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esw_src_port_rewrite_supported(esw))
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esw_src_port_rewrite_supported(esw))
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attr->flags |= MLX5_ESW_ATTR_FLAG_SRC_REWRITE;
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attr->flags |= MLX5_ATTR_FLAG_SRC_REWRITE;
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if (attr->flags & MLX5_ESW_ATTR_FLAG_SAMPLE) {
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if (attr->flags & MLX5_ATTR_FLAG_SAMPLE) {
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esw_setup_sampler_dest(dest, flow_act, attr->sample_attr.sampler_id, *i);
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esw_setup_sampler_dest(dest, flow_act, attr->sample_attr.sampler_id, *i);
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(*i)++;
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(*i)++;
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} else if (attr->dest_ft) {
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} else if (attr->dest_ft) {
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esw_setup_ft_dest(dest, flow_act, esw, attr, spec, *i);
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esw_setup_ft_dest(dest, flow_act, esw, attr, spec, *i);
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(*i)++;
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(*i)++;
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} else if (mlx5_esw_attr_flags_skip(attr->flags)) {
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} else if (mlx5e_tc_attr_flags_skip(attr->flags)) {
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esw_setup_slow_path_dest(dest, flow_act, chains, *i);
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esw_setup_slow_path_dest(dest, flow_act, chains, *i);
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(*i)++;
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(*i)++;
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} else if (attr->dest_chain) {
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} else if (attr->dest_chain) {
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@ -498,7 +498,7 @@ esw_cleanup_dests(struct mlx5_eswitch *esw,
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if (attr->dest_ft) {
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if (attr->dest_ft) {
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esw_cleanup_decap_indir(esw, attr);
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esw_cleanup_decap_indir(esw, attr);
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} else if (!mlx5_esw_attr_flags_skip(attr->flags)) {
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} else if (!mlx5e_tc_attr_flags_skip(attr->flags)) {
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if (attr->dest_chain)
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if (attr->dest_chain)
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esw_cleanup_chain_dest(chains, attr->dest_chain, 1, 0);
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esw_cleanup_chain_dest(chains, attr->dest_chain, 1, 0);
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else if (esw_is_indir_table(esw, attr))
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else if (esw_is_indir_table(esw, attr))
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@ -589,7 +589,7 @@ mlx5_eswitch_add_offloaded_rule(struct mlx5_eswitch *esw,
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else
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else
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fdb = attr->ft;
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fdb = attr->ft;
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if (!(attr->flags & MLX5_ESW_ATTR_FLAG_NO_IN_PORT))
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if (!(attr->flags & MLX5_ATTR_FLAG_NO_IN_PORT))
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mlx5_eswitch_set_rule_source_port(esw, spec, attr,
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mlx5_eswitch_set_rule_source_port(esw, spec, attr,
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esw_attr->in_mdev->priv.eswitch,
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esw_attr->in_mdev->priv.eswitch,
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esw_attr->in_rep->vport);
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esw_attr->in_rep->vport);
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@ -721,7 +721,7 @@ __mlx5_eswitch_del_rule(struct mlx5_eswitch *esw,
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mlx5_del_flow_rules(rule);
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mlx5_del_flow_rules(rule);
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if (!mlx5_esw_attr_flags_skip(attr->flags)) {
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if (!mlx5e_tc_attr_flags_skip(attr->flags)) {
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/* unref the term table */
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/* unref the term table */
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for (i = 0; i < MLX5_MAX_FLOW_FWD_VPORTS; i++) {
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for (i = 0; i < MLX5_MAX_FLOW_FWD_VPORTS; i++) {
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if (esw_attr->dests[i].termtbl)
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if (esw_attr->dests[i].termtbl)
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@ -863,7 +863,7 @@ int mlx5_eswitch_add_vlan_action(struct mlx5_eswitch *esw,
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if (err)
|
if (err)
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goto unlock;
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goto unlock;
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attr->flags &= ~MLX5_ESW_ATTR_FLAG_VLAN_HANDLED;
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attr->flags &= ~MLX5_ATTR_FLAG_VLAN_HANDLED;
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vport = esw_vlan_action_get_vport(esw_attr, push, pop);
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vport = esw_vlan_action_get_vport(esw_attr, push, pop);
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@ -871,7 +871,7 @@ int mlx5_eswitch_add_vlan_action(struct mlx5_eswitch *esw,
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/* tracks VF --> wire rules without vlan push action */
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/* tracks VF --> wire rules without vlan push action */
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if (esw_attr->dests[0].rep->vport == MLX5_VPORT_UPLINK) {
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if (esw_attr->dests[0].rep->vport == MLX5_VPORT_UPLINK) {
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vport->vlan_refcount++;
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vport->vlan_refcount++;
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attr->flags |= MLX5_ESW_ATTR_FLAG_VLAN_HANDLED;
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attr->flags |= MLX5_ATTR_FLAG_VLAN_HANDLED;
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}
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}
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goto unlock;
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goto unlock;
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@ -902,7 +902,7 @@ skip_set_push:
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}
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}
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out:
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out:
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if (!err)
|
if (!err)
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attr->flags |= MLX5_ESW_ATTR_FLAG_VLAN_HANDLED;
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attr->flags |= MLX5_ATTR_FLAG_VLAN_HANDLED;
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unlock:
|
unlock:
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mutex_unlock(&esw->state_lock);
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mutex_unlock(&esw->state_lock);
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return err;
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return err;
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@ -921,7 +921,7 @@ int mlx5_eswitch_del_vlan_action(struct mlx5_eswitch *esw,
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if (mlx5_eswitch_vlan_actions_supported(esw->dev, 1))
|
if (mlx5_eswitch_vlan_actions_supported(esw->dev, 1))
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return 0;
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return 0;
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if (!(attr->flags & MLX5_ESW_ATTR_FLAG_VLAN_HANDLED))
|
if (!(attr->flags & MLX5_ATTR_FLAG_VLAN_HANDLED))
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return 0;
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return 0;
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||||||
|
|
||||||
push = !!(attr->action & MLX5_FLOW_CONTEXT_ACTION_VLAN_PUSH);
|
push = !!(attr->action & MLX5_FLOW_CONTEXT_ACTION_VLAN_PUSH);
|
||||||
|
|
|
@ -219,7 +219,7 @@ mlx5_eswitch_termtbl_required(struct mlx5_eswitch *esw,
|
||||||
|
|
||||||
if (!MLX5_CAP_ESW_FLOWTABLE_FDB(esw->dev, termination_table) ||
|
if (!MLX5_CAP_ESW_FLOWTABLE_FDB(esw->dev, termination_table) ||
|
||||||
!MLX5_CAP_ESW_FLOWTABLE_FDB(esw->dev, ignore_flow_level) ||
|
!MLX5_CAP_ESW_FLOWTABLE_FDB(esw->dev, ignore_flow_level) ||
|
||||||
mlx5_esw_attr_flags_skip(attr->flags) ||
|
mlx5e_tc_attr_flags_skip(attr->flags) ||
|
||||||
(!mlx5_eswitch_offload_is_uplink_port(esw, spec) && !esw_attr->int_port))
|
(!mlx5_eswitch_offload_is_uplink_port(esw, spec) && !esw_attr->int_port))
|
||||||
return false;
|
return false;
|
||||||
|
|
||||||
|
|
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