powerpc/sstep: Introduce GETTYPE macro
Replace 'op->type & INSTR_TYPE_MASK' expression with GETTYPE(op->type) macro. Signed-off-by: Ravi Bangoria <ravi.bangoria@linux.ibm.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
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9c2d72d497
Коммит
e6684d07e4
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@ -97,6 +97,8 @@ enum instruction_type {
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#define SIZE(n) ((n) << 12)
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#define GETSIZE(w) ((w) >> 12)
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#define GETTYPE(t) ((t) & INSTR_TYPE_MASK)
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#define MKOP(t, f, s) ((t) | (f) | SIZE(s))
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struct instruction_op {
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@ -339,7 +339,7 @@ int fix_alignment(struct pt_regs *regs)
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if (r < 0)
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return -EINVAL;
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type = op.type & INSTR_TYPE_MASK;
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type = GETTYPE(op.type);
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if (!OP_IS_LOAD_STORE(type)) {
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if (op.type != CACHEOP + DCBZ)
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return -EINVAL;
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@ -2642,7 +2642,7 @@ void emulate_update_regs(struct pt_regs *regs, struct instruction_op *op)
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unsigned long next_pc;
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next_pc = truncate_if_32bit(regs->msr, regs->nip + 4);
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switch (op->type & INSTR_TYPE_MASK) {
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switch (GETTYPE(op->type)) {
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case COMPUTE:
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if (op->type & SETREG)
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regs->gpr[op->reg] = op->val;
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@ -2740,7 +2740,7 @@ int emulate_loadstore(struct pt_regs *regs, struct instruction_op *op)
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err = 0;
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size = GETSIZE(op->type);
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type = op->type & INSTR_TYPE_MASK;
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type = GETTYPE(op->type);
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cross_endian = (regs->msr & MSR_LE) != (MSR_KERNEL & MSR_LE);
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ea = truncate_if_32bit(regs->msr, op->ea);
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@ -3002,7 +3002,7 @@ int emulate_step(struct pt_regs *regs, unsigned int instr)
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}
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err = 0;
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type = op.type & INSTR_TYPE_MASK;
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type = GETTYPE(op.type);
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if (OP_IS_LOAD_STORE(type)) {
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err = emulate_loadstore(regs, &op);
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