xhci: move usb2 get port status link resume handling to its own function

Refactoring, no functional changes.

But worth mentioning that checking for port link resume state is now behind
a additional port power check.

This is fine as ports can't be in resume state if port power bit is not
set.

xhci spec section 4.19.1.1.6 figure 34 shows that port power bit must be
set for all 'Enable' substates, including U0,U1,U2,U3 (suspended), Resume,
and RExit states.

Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
Mathias Nyman 2018-12-07 16:19:36 +02:00 коммит произвёл Greg Kroah-Hartman
Родитель a231ec41e6
Коммит e67ebf1b38
1 изменённых файлов: 104 добавлений и 84 удалений

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@ -795,6 +795,100 @@ static void xhci_del_comp_mod_timer(struct xhci_hcd *xhci, u32 status,
} }
} }
static int xhci_handle_usb2_port_link_resume(struct xhci_port *port,
u32 *status, u32 portsc,
unsigned long flags)
{
struct xhci_bus_state *bus_state;
struct xhci_hcd *xhci;
struct usb_hcd *hcd;
int slot_id;
u32 wIndex;
hcd = port->rhub->hcd;
bus_state = &port->rhub->bus_state;
xhci = hcd_to_xhci(hcd);
wIndex = port->hcd_portnum;
if ((portsc & PORT_RESET) || !(portsc & PORT_PE)) {
*status = 0xffffffff;
return -EINVAL;
}
/* did port event handler already start resume timing? */
if (!bus_state->resume_done[wIndex]) {
/* If not, maybe we are in a host initated resume? */
if (test_bit(wIndex, &bus_state->resuming_ports)) {
/* Host initated resume doesn't time the resume
* signalling using resume_done[].
* It manually sets RESUME state, sleeps 20ms
* and sets U0 state. This should probably be
* changed, but not right now.
*/
} else {
/* port resume was discovered now and here,
* start resume timing
*/
unsigned long timeout = jiffies +
msecs_to_jiffies(USB_RESUME_TIMEOUT);
set_bit(wIndex, &bus_state->resuming_ports);
bus_state->resume_done[wIndex] = timeout;
mod_timer(&hcd->rh_timer, timeout);
usb_hcd_start_port_resume(&hcd->self, wIndex);
}
/* Has resume been signalled for USB_RESUME_TIME yet? */
} else if (time_after_eq(jiffies, bus_state->resume_done[wIndex])) {
int time_left;
xhci_dbg(xhci, "Resume USB2 port %d\n", wIndex + 1);
bus_state->resume_done[wIndex] = 0;
clear_bit(wIndex, &bus_state->resuming_ports);
set_bit(wIndex, &bus_state->rexit_ports);
xhci_test_and_clear_bit(xhci, port, PORT_PLC);
xhci_set_link_state(xhci, port, XDEV_U0);
spin_unlock_irqrestore(&xhci->lock, flags);
time_left = wait_for_completion_timeout(
&bus_state->rexit_done[wIndex],
msecs_to_jiffies(XHCI_MAX_REXIT_TIMEOUT_MS));
spin_lock_irqsave(&xhci->lock, flags);
if (time_left) {
slot_id = xhci_find_slot_id_by_port(hcd, xhci,
wIndex + 1);
if (!slot_id) {
xhci_dbg(xhci, "slot_id is zero\n");
*status = 0xffffffff;
return -ENODEV;
}
xhci_ring_device(xhci, slot_id);
} else {
int port_status = readl(port->addr);
xhci_warn(xhci, "Port resume %i msec timed out, portsc = 0x%x\n",
XHCI_MAX_REXIT_TIMEOUT_MS,
port_status);
*status |= USB_PORT_STAT_SUSPEND;
clear_bit(wIndex, &bus_state->rexit_ports);
}
usb_hcd_end_port_resume(&hcd->self, wIndex);
bus_state->port_c_suspend |= 1 << wIndex;
bus_state->suspended_ports &= ~(1 << wIndex);
} else {
/*
* The resume has been signaling for less than
* USB_RESUME_TIME. Report the port status as SUSPEND,
* let the usbcore check port status again and clear
* resume signaling later.
*/
*status |= USB_PORT_STAT_SUSPEND;
}
return 0;
}
static u32 xhci_get_ext_port_status(u32 raw_port_status, u32 port_li) static u32 xhci_get_ext_port_status(u32 raw_port_status, u32 port_li)
{ {
u32 ext_stat = 0; u32 ext_stat = 0;
@ -853,11 +947,12 @@ static void xhci_get_usb3_port_status(struct xhci_port *port, u32 *status,
} }
static void xhci_get_usb2_port_status(struct xhci_port *port, u32 *status, static void xhci_get_usb2_port_status(struct xhci_port *port, u32 *status,
u32 portsc) u32 portsc, unsigned long flags)
{ {
struct xhci_bus_state *bus_state; struct xhci_bus_state *bus_state;
u32 link_state; u32 link_state;
u32 portnum; u32 portnum;
int ret;
bus_state = &port->rhub->bus_state; bus_state = &port->rhub->bus_state;
link_state = portsc & PORT_PLS_MASK; link_state = portsc & PORT_PLS_MASK;
@ -880,6 +975,12 @@ static void xhci_get_usb2_port_status(struct xhci_port *port, u32 *status,
bus_state->port_c_suspend |= 1 << portnum; bus_state->port_c_suspend |= 1 << portnum;
} }
} }
if (link_state == XDEV_RESUME) {
ret = xhci_handle_usb2_port_link_resume(port, status,
portsc, flags);
if (ret)
return;
}
} }
} }
@ -900,9 +1001,7 @@ static u32 xhci_get_port_status(struct usb_hcd *hcd,
__releases(&xhci->lock) __releases(&xhci->lock)
__acquires(&xhci->lock) __acquires(&xhci->lock)
{ {
struct xhci_hcd *xhci = hcd_to_xhci(hcd);
u32 status = 0; u32 status = 0;
int slot_id;
struct xhci_hub *rhub; struct xhci_hub *rhub;
struct xhci_port *port; struct xhci_port *port;
@ -935,87 +1034,8 @@ static u32 xhci_get_port_status(struct usb_hcd *hcd,
if (hcd->speed >= HCD_USB3) if (hcd->speed >= HCD_USB3)
xhci_get_usb3_port_status(port, &status, raw_port_status); xhci_get_usb3_port_status(port, &status, raw_port_status);
else else
xhci_get_usb2_port_status(port, &status, raw_port_status); xhci_get_usb2_port_status(port, &status, raw_port_status,
flags);
if ((raw_port_status & PORT_PLS_MASK) == XDEV_RESUME &&
!DEV_SUPERSPEED_ANY(raw_port_status) && hcd->speed < HCD_USB3) {
if ((raw_port_status & PORT_RESET) ||
!(raw_port_status & PORT_PE))
return 0xffffffff;
/* did port event handler already start resume timing? */
if (!bus_state->resume_done[wIndex]) {
/* If not, maybe we are in a host initated resume? */
if (test_bit(wIndex, &bus_state->resuming_ports)) {
/* Host initated resume doesn't time the resume
* signalling using resume_done[].
* It manually sets RESUME state, sleeps 20ms
* and sets U0 state. This should probably be
* changed, but not right now.
*/
} else {
/* port resume was discovered now and here,
* start resume timing
*/
unsigned long timeout = jiffies +
msecs_to_jiffies(USB_RESUME_TIMEOUT);
set_bit(wIndex, &bus_state->resuming_ports);
bus_state->resume_done[wIndex] = timeout;
mod_timer(&hcd->rh_timer, timeout);
usb_hcd_start_port_resume(&hcd->self, wIndex);
}
/* Has resume been signalled for USB_RESUME_TIME yet? */
} else if (time_after_eq(jiffies,
bus_state->resume_done[wIndex])) {
int time_left;
xhci_dbg(xhci, "Resume USB2 port %d\n",
wIndex + 1);
bus_state->resume_done[wIndex] = 0;
clear_bit(wIndex, &bus_state->resuming_ports);
set_bit(wIndex, &bus_state->rexit_ports);
xhci_test_and_clear_bit(xhci, port, PORT_PLC);
xhci_set_link_state(xhci, port, XDEV_U0);
spin_unlock_irqrestore(&xhci->lock, flags);
time_left = wait_for_completion_timeout(
&bus_state->rexit_done[wIndex],
msecs_to_jiffies(
XHCI_MAX_REXIT_TIMEOUT_MS));
spin_lock_irqsave(&xhci->lock, flags);
if (time_left) {
slot_id = xhci_find_slot_id_by_port(hcd,
xhci, wIndex + 1);
if (!slot_id) {
xhci_dbg(xhci, "slot_id is zero\n");
return 0xffffffff;
}
xhci_ring_device(xhci, slot_id);
} else {
int port_status = readl(port->addr);
xhci_warn(xhci, "Port resume took longer than %i msec, port status = 0x%x\n",
XHCI_MAX_REXIT_TIMEOUT_MS,
port_status);
status |= USB_PORT_STAT_SUSPEND;
clear_bit(wIndex, &bus_state->rexit_ports);
}
usb_hcd_end_port_resume(&hcd->self, wIndex);
bus_state->port_c_suspend |= 1 << wIndex;
bus_state->suspended_ports &= ~(1 << wIndex);
} else {
/*
* The resume has been signaling for less than
* USB_RESUME_TIME. Report the port status as SUSPEND,
* let the usbcore check port status again and clear
* resume signaling later.
*/
status |= USB_PORT_STAT_SUSPEND;
}
}
/* /*
* Clear stale usb2 resume signalling variables in case port changed * Clear stale usb2 resume signalling variables in case port changed
* state during resume signalling. For example on error * state during resume signalling. For example on error