gpio: gpio-omap: configure edge detection for level IRQs for idle wakeup
The GPIO block can enter idle independently of the CPU power management calls via smart-idle. When the GPIO block enters idle, level detection stops working due to clocks being shut off, and an alternative form of edge detection is used. However, this needs the edge detection registers set to mark the appropriate edges. Arrange to configure the edge detection enables along with the level detection to ensure that any transition to active interrupt state that occurs while the block is idle is detected as a wake-up event. Since we enable the edge detection when configuring the IRQ, both omap2_gpio_enable_level_quirk() nor omap2_gpio_disable_level_quirk() become redundant, which also means OMAP_GPIO_QUIRK_IDLE_REMOVE_TRIGGER can be removed. This can be now done without regressions as patch "gpio: gpio-omap: fix level interrupt idling" allows level interrupts to idle on omap4 without a workaround. Cc: Aaro Koskinen <aaro.koskinen@iki.fi> Cc: Grygorii Strashko <grygorii.strashko@ti.com> Cc: Keerthy <j-keerthy@ti.com> Cc: Peter Ujfalusi <peter.ujfalusi@ti.com> Cc: Tero Kristo <t-kristo@ti.com> Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk> [tony@atomide.com: update description for the fix dependency] Signed-off-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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@ -31,8 +31,6 @@
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#define OMAP4_GPIO_DEBOUNCINGTIME_MASK 0xFF
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#define OMAP_GPIO_QUIRK_IDLE_REMOVE_TRIGGER BIT(2)
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struct gpio_regs {
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u32 irqenable1;
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u32 irqenable2;
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@ -48,13 +46,6 @@ struct gpio_regs {
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u32 debounce_en;
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};
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struct gpio_bank;
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struct gpio_omap_funcs {
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void (*idle_enable_level_quirk)(struct gpio_bank *bank);
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void (*idle_disable_level_quirk)(struct gpio_bank *bank);
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};
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struct gpio_bank {
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struct list_head node;
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void __iomem *base;
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@ -62,7 +53,6 @@ struct gpio_bank {
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u32 non_wakeup_gpios;
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u32 enabled_non_wakeup_gpios;
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struct gpio_regs context;
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struct gpio_omap_funcs funcs;
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u32 saved_datain;
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u32 level_mask;
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u32 toggle_mask;
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@ -83,7 +73,6 @@ struct gpio_bank {
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int stride;
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u32 width;
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int context_loss_count;
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u32 quirks;
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void (*set_dataout)(struct gpio_bank *bank, unsigned gpio, int enable);
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void (*set_dataout_multiple)(struct gpio_bank *bank,
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@ -378,10 +367,16 @@ static inline void omap_set_gpio_trigger(struct gpio_bank *bank, int gpio,
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trigger & IRQ_TYPE_LEVEL_LOW);
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omap_gpio_rmw(base, bank->regs->leveldetect1, gpio_bit,
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trigger & IRQ_TYPE_LEVEL_HIGH);
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/*
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* We need the edge detection enabled for to allow the GPIO block
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* to be woken from idle state. Set the appropriate edge detection
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* in addition to the level detection.
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*/
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omap_gpio_rmw(base, bank->regs->risingdetect, gpio_bit,
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trigger & IRQ_TYPE_EDGE_RISING);
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trigger & (IRQ_TYPE_EDGE_RISING | IRQ_TYPE_LEVEL_HIGH));
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omap_gpio_rmw(base, bank->regs->fallingdetect, gpio_bit,
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trigger & IRQ_TYPE_EDGE_FALLING);
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trigger & (IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_LEVEL_LOW));
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bank->context.leveldetect0 =
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readl_relaxed(bank->base + bank->regs->leveldetect0);
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@ -904,44 +899,6 @@ static void omap_gpio_unmask_irq(struct irq_data *d)
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raw_spin_unlock_irqrestore(&bank->lock, flags);
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}
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/*
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* Only edges can generate a wakeup event to the PRCM.
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*
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* Therefore, ensure any wake-up capable GPIOs have
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* edge-detection enabled before going idle to ensure a wakeup
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* to the PRCM is generated on a GPIO transition. (c.f. 34xx
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* NDA TRM 25.5.3.1)
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*
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* The normal values will be restored upon ->runtime_resume()
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* by writing back the values saved in bank->context.
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*/
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static void __maybe_unused
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omap2_gpio_enable_level_quirk(struct gpio_bank *bank)
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{
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u32 wake_low, wake_hi;
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/* Enable additional edge detection for level gpios for idle */
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wake_low = bank->context.leveldetect0 & bank->context.wake_en;
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if (wake_low)
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writel_relaxed(wake_low | bank->context.fallingdetect,
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bank->base + bank->regs->fallingdetect);
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wake_hi = bank->context.leveldetect1 & bank->context.wake_en;
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if (wake_hi)
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writel_relaxed(wake_hi | bank->context.risingdetect,
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bank->base + bank->regs->risingdetect);
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}
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static void __maybe_unused
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omap2_gpio_disable_level_quirk(struct gpio_bank *bank)
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{
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/* Disable edge detection for level gpios after idle */
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writel_relaxed(bank->context.fallingdetect,
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bank->base + bank->regs->fallingdetect);
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writel_relaxed(bank->context.risingdetect,
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bank->base + bank->regs->risingdetect);
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}
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/*---------------------------------------------------------------------*/
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static int omap_mpuio_suspend_noirq(struct device *dev)
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@ -1324,9 +1281,6 @@ static void omap_gpio_idle(struct gpio_bank *bank, bool may_lose_context)
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bank->saved_datain = readl_relaxed(base + bank->regs->datain);
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if (bank->funcs.idle_enable_level_quirk)
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bank->funcs.idle_enable_level_quirk(bank);
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if (!bank->enabled_non_wakeup_gpios)
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goto update_gpio_context_count;
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@ -1373,9 +1327,6 @@ static void omap_gpio_unidle(struct gpio_bank *bank)
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omap_gpio_dbck_enable(bank);
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if (bank->funcs.idle_disable_level_quirk)
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bank->funcs.idle_disable_level_quirk(bank);
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if (bank->loses_context) {
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if (!bank->get_context_loss_count) {
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omap_gpio_restore_context(bank);
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@ -1519,11 +1470,6 @@ static struct omap_gpio_reg_offs omap4_gpio_regs = {
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.fallingdetect = OMAP4_GPIO_FALLINGDETECT,
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};
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/*
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* Note that omap2 does not currently support idle modes with context loss so
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* no need to add OMAP_GPIO_QUIRK_IDLE_REMOVE_TRIGGER quirk flag to save
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* and restore context.
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*/
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static const struct omap_gpio_platform_data omap2_pdata = {
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.regs = &omap2_gpio_regs,
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.bank_width = 32,
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@ -1534,14 +1480,12 @@ static const struct omap_gpio_platform_data omap3_pdata = {
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.regs = &omap2_gpio_regs,
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.bank_width = 32,
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.dbck_flag = true,
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.quirks = OMAP_GPIO_QUIRK_IDLE_REMOVE_TRIGGER,
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};
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static const struct omap_gpio_platform_data omap4_pdata = {
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.regs = &omap4_gpio_regs,
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.bank_width = 32,
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.dbck_flag = true,
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.quirks = OMAP_GPIO_QUIRK_IDLE_REMOVE_TRIGGER,
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};
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static const struct of_device_id omap_gpio_match[] = {
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@ -1611,7 +1555,6 @@ static int omap_gpio_probe(struct platform_device *pdev)
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bank->chip.parent = dev;
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bank->chip.owner = THIS_MODULE;
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bank->dbck_flag = pdata->dbck_flag;
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bank->quirks = pdata->quirks;
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bank->stride = pdata->bank_stride;
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bank->width = pdata->bank_width;
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bank->is_mpuio = pdata->is_mpuio;
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@ -1641,13 +1584,6 @@ static int omap_gpio_probe(struct platform_device *pdev)
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omap_set_gpio_dataout_mask_multiple;
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}
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if (bank->quirks & OMAP_GPIO_QUIRK_IDLE_REMOVE_TRIGGER) {
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bank->funcs.idle_enable_level_quirk =
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omap2_gpio_enable_level_quirk;
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bank->funcs.idle_disable_level_quirk =
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omap2_gpio_disable_level_quirk;
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}
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raw_spin_lock_init(&bank->lock);
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raw_spin_lock_init(&bank->wa_lock);
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@ -1689,11 +1625,8 @@ static int omap_gpio_probe(struct platform_device *pdev)
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omap_gpio_show_rev(bank);
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if (bank->funcs.idle_enable_level_quirk &&
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bank->funcs.idle_disable_level_quirk) {
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bank->nb.notifier_call = gpio_omap_cpu_notifier;
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cpu_pm_register_notifier(&bank->nb);
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}
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bank->nb.notifier_call = gpio_omap_cpu_notifier;
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cpu_pm_register_notifier(&bank->nb);
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pm_runtime_put(dev);
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@ -1704,8 +1637,7 @@ static int omap_gpio_remove(struct platform_device *pdev)
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{
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struct gpio_bank *bank = platform_get_drvdata(pdev);
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if (bank->nb.notifier_call)
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cpu_pm_unregister_notifier(&bank->nb);
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cpu_pm_unregister_notifier(&bank->nb);
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list_del(&bank->node);
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gpiochip_remove(&bank->chip);
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pm_runtime_disable(&pdev->dev);
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@ -200,8 +200,6 @@ struct omap_gpio_platform_data {
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bool is_mpuio; /* whether the bank is of type MPUIO */
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u32 non_wakeup_gpios;
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u32 quirks; /* Version specific quirks mask */
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struct omap_gpio_reg_offs *regs;
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/* Return context loss count due to PM states changing */
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