SoCFPGA DTS updates for v5.5, part 2
- Add NAND support for both Agilex and Stratix10 boards - Agilex - Add FPGA manager and Service Layer support - Add EDAC support - Add System manager - Add System manager property to ethernet nodes -----BEGIN PGP SIGNATURE----- iQJIBAABCgAyFiEEoHhMeiyk5VmwVMwNGZQEC4GjKPQFAl3TFEoUHGRpbmd1eWVu QGtlcm5lbC5vcmcACgkQGZQEC4GjKPRjBQ//Yz6KeW9ssYD//NuDBsPi2paCQhVM PC8KZBZyHCGCX0srCsQ5J9M3RIvG/8OQfvImU0AbQJpDRiri3sXdebJ6qjRnz6XH adoLn5yMnZpgDUSPjs2n5XBx2fnOIbsTHDOs/eoFdtGjtK3S71sd1AJPQTBJKu5x nVtXwn7nwjjKXTFkk7dzCI8UyvRu7OiibYZVIUspagUAdpYLGHY68uhaH/XrIqNz uMDLE/rax58F4BNYIT3Yi5mjIpHKR+H3AC8cX3b/DrPF8RB8MkfM0NVc5vtLl98Y UYS0my27bOahdi9GpITUrC+vedYISd5Bo2CGPQc/EVJarySk9VLTSh954WknRpus W2qNq7jC3Suo+Dbv5/26fe3uDQCi9AwG9/4wXmUYiV3JGIe7egOEqGGUVbON6Wx1 h56Cze/B/i8i06c3uiN84ZG2znKvXPlXN/HdHG3F97XHsRpjUBkdvBHCNsp6VW/J yRVPd8pH3TI2dzN+nTrWJtBk9vOspotKnZ0qvrjg1yKFRywptvHLgtnjQqfNEkf+ 65pMjbe/lArQApfSxktL0+Mar/nsGL5EuFtyxrVkMoDp5B8m6ur0pa+663h9WSJA Ii9VPLG+zDDBO7ZdYNnJJ6ze0UUFl/hB6HIyNarbyuBoPdoIgRz7CPSolOfovrAS kuEaS2fBh6jCUdM= =TS6k -----END PGP SIGNATURE----- Merge tag 'socfpga_dts_updates_for_v5.5_part2' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux into arm/dt SoCFPGA DTS updates for v5.5, part 2 - Add NAND support for both Agilex and Stratix10 boards - Agilex - Add FPGA manager and Service Layer support - Add EDAC support - Add System manager - Add System manager property to ethernet nodes * tag 'socfpga_dts_updates_for_v5.5_part2' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux: arm64: dts: agilex: Add SysMgr to Ethernet nodes arm64: dts: agilex: Add SysMgr compatible arm64: dts: agilex: Add EDAC Device Tree arm64: dts: add NAND board files for Stratix10 and Agilex arm64: dts: agilex: add NAND IP to base dts Link: https://lore.kernel.org/r/20191118220559.16623-1-dinguyen@kernel.org Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
Olof Johansson
Коммит
e691c23ebe
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@ -1,2 +1,3 @@
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# SPDX-License-Identifier: GPL-2.0-only
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dtb-$(CONFIG_ARCH_STRATIX10) += socfpga_stratix10_socdk.dtb
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dtb-$(CONFIG_ARCH_STRATIX10) += socfpga_stratix10_socdk.dtb \
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socfpga_stratix10_socdk_nand.dtb
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@ -0,0 +1,223 @@
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// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Copyright Altera Corporation (C) 2015. All rights reserved.
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*/
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#include "socfpga_stratix10.dtsi"
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/ {
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model = "SoCFPGA Stratix 10 SoCDK";
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aliases {
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serial0 = &uart0;
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ethernet0 = &gmac0;
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ethernet1 = &gmac1;
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ethernet2 = &gmac2;
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};
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chosen {
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stdout-path = "serial0:115200n8";
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};
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leds {
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compatible = "gpio-leds";
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hps0 {
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label = "hps_led0";
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gpios = <&portb 20 GPIO_ACTIVE_HIGH>;
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};
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hps1 {
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label = "hps_led1";
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gpios = <&portb 19 GPIO_ACTIVE_HIGH>;
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};
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hps2 {
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label = "hps_led2";
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gpios = <&portb 21 GPIO_ACTIVE_HIGH>;
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};
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};
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memory {
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device_type = "memory";
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/* We expect the bootloader to fill in the reg */
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reg = <0 0 0 0>;
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};
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ref_033v: 033-v-ref {
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compatible = "regulator-fixed";
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regulator-name = "0.33V";
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regulator-min-microvolt = <330000>;
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regulator-max-microvolt = <330000>;
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};
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soc {
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clocks {
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osc1 {
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clock-frequency = <25000000>;
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};
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};
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eccmgr {
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sdmmca-ecc@ff8c8c00 {
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compatible = "altr,socfpga-s10-sdmmc-ecc",
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"altr,socfpga-sdmmc-ecc";
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reg = <0xff8c8c00 0x100>;
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altr,ecc-parent = <&mmc>;
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interrupts = <14 4>,
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<15 4>;
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};
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};
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};
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};
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&gpio1 {
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status = "okay";
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};
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&gmac2 {
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status = "okay";
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phy-mode = "rgmii";
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phy-handle = <&phy0>;
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max-frame-size = <9000>;
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mdio0 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "snps,dwmac-mdio";
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phy0: ethernet-phy@0 {
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reg = <4>;
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txd0-skew-ps = <0>; /* -420ps */
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txd1-skew-ps = <0>; /* -420ps */
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txd2-skew-ps = <0>; /* -420ps */
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txd3-skew-ps = <0>; /* -420ps */
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rxd0-skew-ps = <420>; /* 0ps */
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rxd1-skew-ps = <420>; /* 0ps */
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rxd2-skew-ps = <420>; /* 0ps */
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rxd3-skew-ps = <420>; /* 0ps */
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txen-skew-ps = <0>; /* -420ps */
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txc-skew-ps = <900>; /* 0ps */
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rxdv-skew-ps = <420>; /* 0ps */
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rxc-skew-ps = <1680>; /* 780ps */
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};
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};
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};
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&nand {
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status = "okay";
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flash@0 {
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#address-cells = <1>;
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#size-cells = <1>;
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reg = <0>;
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nand-bus-width = <16>;
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partition@0 {
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label = "u-boot";
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reg = <0 0x200000>;
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};
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partition@200000 {
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label = "env";
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reg = <0x200000 0x40000>;
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};
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partition@240000 {
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label = "dtb";
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reg = <0x240000 0x40000>;
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};
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partition@280000 {
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label = "kernel";
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reg = <0x280000 0x2000000>;
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};
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partition@2280000 {
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label = "misc";
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reg = <0x2280000 0x2000000>;
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};
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partition@4280000 {
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label = "rootfs";
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reg = <0x4280000 0x3bd80000>;
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};
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};
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};
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&uart0 {
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status = "okay";
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};
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&usb0 {
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status = "okay";
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disable-over-current;
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};
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&watchdog0 {
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status = "okay";
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};
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&i2c2 {
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status = "okay";
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clock-frequency = <100000>;
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i2c-sda-falling-time-ns = <890>; /* hcnt */
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i2c-sdl-falling-time-ns = <890>; /* lcnt */
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adc@14 {
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compatible = "lltc,ltc2497";
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reg = <0x14>;
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vref-supply = <&ref_033v>;
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};
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temp@4c {
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compatible = "maxim,max1619";
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reg = <0x4c>;
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};
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eeprom@51 {
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compatible = "atmel,24c32";
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reg = <0x51>;
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pagesize = <32>;
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};
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rtc@68 {
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compatible = "dallas,ds1339";
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reg = <0x68>;
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};
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};
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&qspi {
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flash@0 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "n25q00a";
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reg = <0>;
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spi-max-frequency = <100000000>;
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m25p,fast-read;
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cdns,page-size = <256>;
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cdns,block-size = <16>;
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cdns,read-delay = <1>;
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cdns,tshsl-ns = <50>;
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cdns,tsd2d-ns = <50>;
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cdns,tchsh-ns = <4>;
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cdns,tslch-ns = <4>;
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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qspi_boot: partition@0 {
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label = "Boot and fpga data";
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reg = <0x0 0x034B0000>;
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};
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qspi_rootfs: partition@4000000 {
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label = "Root Filesystem - JFFS2";
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reg = <0x034B0000 0x0EB50000>;
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};
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};
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};
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};
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@ -1,2 +1,3 @@
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# SPDX-License-Identifier: GPL-2.0-only
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dtb-$(CONFIG_ARCH_AGILEX) += socfpga_agilex_socdk.dtb
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dtb-$(CONFIG_ARCH_AGILEX) += socfpga_agilex_socdk.dtb \
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socfpga_agilex_socdk_nand.dtb
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@ -113,6 +113,7 @@
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rx-fifo-depth = <16384>;
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snps,multicast-filter-bins = <256>;
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iommus = <&smmu 1>;
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altr,sysmgr-syscon = <&sysmgr 0x44 0>;
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status = "disabled";
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};
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@ -128,6 +129,7 @@
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rx-fifo-depth = <16384>;
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snps,multicast-filter-bins = <256>;
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iommus = <&smmu 2>;
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altr,sysmgr-syscon = <&sysmgr 0x48 8>;
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status = "disabled";
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};
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@ -143,6 +145,7 @@
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rx-fifo-depth = <16384>;
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snps,multicast-filter-bins = <256>;
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iommus = <&smmu 3>;
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altr,sysmgr-syscon = <&sysmgr 0x4c 16>;
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status = "disabled";
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};
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@ -249,6 +252,18 @@
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status = "disabled";
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};
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nand: nand@ffb90000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "altr,socfpga-denali-nand";
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reg = <0xffb90000 0x10000>,
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<0xffb80000 0x1000>;
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reg-names = "nand_data", "denali_reg";
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interrupts = <0 97 4>;
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resets = <&rst NAND_RESET>, <&rst NAND_OCP_RESET>;
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status = "disabled";
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};
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ocram: sram@ffe00000 {
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compatible = "mmio-sram";
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reg = <0xffe00000 0x40000>;
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@ -325,7 +340,7 @@
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};
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sysmgr: sysmgr@ffd12000 {
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compatible = "altr,sys-mgr", "syscon";
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compatible = "altr,sys-mgr-s10","altr,sys-mgr";
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reg = <0xffd12000 0x500>;
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};
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@ -449,6 +464,65 @@
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reg = <0xf8011100 0xc0>;
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};
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eccmgr {
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compatible = "altr,socfpga-s10-ecc-manager",
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"altr,socfpga-a10-ecc-manager";
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altr,sysmgr-syscon = <&sysmgr>;
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#address-cells = <1>;
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#size-cells = <1>;
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interrupts = <0 15 4>;
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interrupt-controller;
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#interrupt-cells = <2>;
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ranges;
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sdramedac {
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compatible = "altr,sdram-edac-s10";
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altr,sdr-syscon = <&sdr>;
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interrupts = <16 4>;
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};
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ocram-ecc@ff8cc000 {
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compatible = "altr,socfpga-s10-ocram-ecc",
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"altr,socfpga-a10-ocram-ecc";
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reg = <0xff8cc000 0x100>;
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altr,ecc-parent = <&ocram>;
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interrupts = <1 4>;
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};
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usb0-ecc@ff8c4000 {
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compatible = "altr,socfpga-s10-usb-ecc",
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"altr,socfpga-usb-ecc";
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reg = <0xff8c4000 0x100>;
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altr,ecc-parent = <&usb0>;
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interrupts = <2 4>;
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};
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emac0-rx-ecc@ff8c0000 {
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compatible = "altr,socfpga-s10-eth-mac-ecc",
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"altr,socfpga-eth-mac-ecc";
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reg = <0xff8c0000 0x100>;
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altr,ecc-parent = <&gmac0>;
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interrupts = <4 4>;
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};
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emac0-tx-ecc@ff8c0400 {
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compatible = "altr,socfpga-s10-eth-mac-ecc",
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"altr,socfpga-eth-mac-ecc";
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reg = <0xff8c0400 0x100>;
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altr,ecc-parent = <&gmac0>;
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interrupts = <5 4>;
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};
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sdmmca-ecc@ff8c8c00 {
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compatible = "altr,socfpga-s10-sdmmc-ecc",
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"altr,socfpga-sdmmc-ecc";
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reg = <0xff8c8c00 0x100>;
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altr,ecc-parent = <&mmc>;
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interrupts = <14 4>,
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<15 4>;
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};
|
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};
|
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|
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qspi: spi@ff8d2000 {
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compatible = "cdns,qspi-nor";
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#address-cells = <1>;
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||||
|
|
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|
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@ -0,0 +1,135 @@
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|||
// SPDX-License-Identifier: GPL-2.0
|
||||
/*
|
||||
* Copyright (C) 2019, Intel Corporation
|
||||
*/
|
||||
#include "socfpga_agilex.dtsi"
|
||||
|
||||
/ {
|
||||
model = "SoCFPGA Agilex SoCDK";
|
||||
|
||||
aliases {
|
||||
serial0 = &uart0;
|
||||
ethernet0 = &gmac0;
|
||||
ethernet1 = &gmac1;
|
||||
ethernet2 = &gmac2;
|
||||
};
|
||||
|
||||
chosen {
|
||||
stdout-path = "serial0:115200n8";
|
||||
};
|
||||
|
||||
leds {
|
||||
compatible = "gpio-leds";
|
||||
hps0 {
|
||||
label = "hps_led0";
|
||||
gpios = <&portb 20 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
hps1 {
|
||||
label = "hps_led1";
|
||||
gpios = <&portb 19 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
hps2 {
|
||||
label = "hps_led2";
|
||||
gpios = <&portb 21 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
};
|
||||
|
||||
memory {
|
||||
device_type = "memory";
|
||||
/* We expect the bootloader to fill in the reg */
|
||||
reg = <0 0 0 0>;
|
||||
};
|
||||
|
||||
soc {
|
||||
clocks {
|
||||
osc1 {
|
||||
clock-frequency = <25000000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&gpio1 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&gmac2 {
|
||||
status = "okay";
|
||||
phy-mode = "rgmii";
|
||||
phy-handle = <&phy0>;
|
||||
|
||||
max-frame-size = <9000>;
|
||||
|
||||
mdio0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "snps,dwmac-mdio";
|
||||
phy0: ethernet-phy@0 {
|
||||
reg = <4>;
|
||||
|
||||
txd0-skew-ps = <0>; /* -420ps */
|
||||
txd1-skew-ps = <0>; /* -420ps */
|
||||
txd2-skew-ps = <0>; /* -420ps */
|
||||
txd3-skew-ps = <0>; /* -420ps */
|
||||
rxd0-skew-ps = <420>; /* 0ps */
|
||||
rxd1-skew-ps = <420>; /* 0ps */
|
||||
rxd2-skew-ps = <420>; /* 0ps */
|
||||
rxd3-skew-ps = <420>; /* 0ps */
|
||||
txen-skew-ps = <0>; /* -420ps */
|
||||
txc-skew-ps = <900>; /* 0ps */
|
||||
rxdv-skew-ps = <420>; /* 0ps */
|
||||
rxc-skew-ps = <1680>; /* 780ps */
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&nand {
|
||||
status = "okay";
|
||||
|
||||
flash@0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
reg = <0>;
|
||||
nand-bus-width = <16>;
|
||||
|
||||
partition@0 {
|
||||
label = "u-boot";
|
||||
reg = <0 0x200000>;
|
||||
};
|
||||
partition@200000 {
|
||||
label = "env";
|
||||
reg = <0x200000 0x40000>;
|
||||
};
|
||||
partition@240000 {
|
||||
label = "dtb";
|
||||
reg = <0x240000 0x40000>;
|
||||
};
|
||||
partition@280000 {
|
||||
label = "kernel";
|
||||
reg = <0x280000 0x2000000>;
|
||||
};
|
||||
partition@2280000 {
|
||||
label = "misc";
|
||||
reg = <0x2280000 0x2000000>;
|
||||
};
|
||||
partition@4280000 {
|
||||
label = "rootfs";
|
||||
reg = <0x4280000 0x3bd80000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&uart0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb0 {
|
||||
status = "okay";
|
||||
disable-over-current;
|
||||
};
|
||||
|
||||
&watchdog0 {
|
||||
status = "okay";
|
||||
};
|
||||
Загрузка…
Ссылка в новой задаче