crypto: qat - remove the unnecessary get_vintmsk_offset()
All QAT GEN2 devices share the same register offset for masking interrupts, so they don't need any complex device specific infrastructure. Remove this function in favor of a constant in order to simplify the code. Also, future generations may require a more complex device specific handling, making the current approach obsolete anyway. Signed-off-by: Marco Chiappero <marco.chiappero@intel.com> Co-developed-by: Giovanni Cabiddu <giovanni.cabiddu@intel.com> Signed-off-by: Giovanni Cabiddu <giovanni.cabiddu@intel.com> Reviewed-by: Fiona Trahe <fiona.trahe@intel.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
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e6dac5ea6f
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@ -111,11 +111,6 @@ static u32 get_pf2vf_offset(u32 i)
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return ADF_C3XXX_PF2VF_OFFSET(i);
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}
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static u32 get_vintmsk_offset(u32 i)
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{
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return ADF_C3XXX_VINTMSK_OFFSET(i);
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}
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static void adf_enable_error_correction(struct adf_accel_dev *accel_dev)
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{
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struct adf_hw_device_data *hw_device = accel_dev->hw_device;
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@ -195,7 +190,6 @@ void adf_init_hw_data_c3xxx(struct adf_hw_device_data *hw_data)
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hw_data->get_sram_bar_id = get_sram_bar_id;
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hw_data->get_etr_bar_id = get_etr_bar_id;
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hw_data->get_misc_bar_id = get_misc_bar_id;
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hw_data->get_vintmsk_offset = get_vintmsk_offset;
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hw_data->get_admin_info = adf_gen2_get_admin_info;
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hw_data->get_arb_info = adf_gen2_get_arb_info;
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hw_data->get_sku = get_sku;
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@ -29,7 +29,6 @@
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#define ADF_C3XXX_ERRSSMSH_EN BIT(3)
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#define ADF_C3XXX_PF2VF_OFFSET(i) (0x3A000 + 0x280 + ((i) * 0x04))
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#define ADF_C3XXX_VINTMSK_OFFSET(i) (0x3A000 + 0x200 + ((i) * 0x04))
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/* AE to function mapping */
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#define ADF_C3XXX_AE2FUNC_MAP_GRP_A_NUM_REGS 48
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@ -52,11 +52,6 @@ static u32 get_pf2vf_offset(u32 i)
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return ADF_C3XXXIOV_PF2VF_OFFSET;
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}
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static u32 get_vintmsk_offset(u32 i)
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{
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return ADF_C3XXXIOV_VINTMSK_OFFSET;
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}
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static int adf_vf_int_noop(struct adf_accel_dev *accel_dev)
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{
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return 0;
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@ -92,7 +87,6 @@ void adf_init_hw_data_c3xxxiov(struct adf_hw_device_data *hw_data)
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hw_data->get_etr_bar_id = get_etr_bar_id;
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hw_data->get_misc_bar_id = get_misc_bar_id;
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hw_data->get_pf2vf_offset = get_pf2vf_offset;
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hw_data->get_vintmsk_offset = get_vintmsk_offset;
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hw_data->get_sku = get_sku;
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hw_data->enable_ints = adf_vf_void_noop;
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hw_data->enable_pfvf_comms = adf_enable_vf2pf_comms;
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@ -13,7 +13,6 @@
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#define ADF_C3XXXIOV_ETR_BAR 0
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#define ADF_C3XXXIOV_ETR_MAX_BANKS 1
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#define ADF_C3XXXIOV_PF2VF_OFFSET 0x200
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#define ADF_C3XXXIOV_VINTMSK_OFFSET 0x208
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void adf_init_hw_data_c3xxxiov(struct adf_hw_device_data *hw_data);
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void adf_clean_hw_data_c3xxxiov(struct adf_hw_device_data *hw_data);
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@ -112,10 +112,6 @@ static u32 get_pf2vf_offset(u32 i)
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{
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return ADF_C62X_PF2VF_OFFSET(i);
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}
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static u32 get_vintmsk_offset(u32 i)
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{
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return ADF_C62X_VINTMSK_OFFSET(i);
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}
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static void adf_enable_error_correction(struct adf_accel_dev *accel_dev)
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{
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@ -196,7 +192,6 @@ void adf_init_hw_data_c62x(struct adf_hw_device_data *hw_data)
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hw_data->get_sram_bar_id = get_sram_bar_id;
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hw_data->get_etr_bar_id = get_etr_bar_id;
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hw_data->get_misc_bar_id = get_misc_bar_id;
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hw_data->get_vintmsk_offset = get_vintmsk_offset;
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hw_data->get_admin_info = adf_gen2_get_admin_info;
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hw_data->get_arb_info = adf_gen2_get_arb_info;
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hw_data->get_sku = get_sku;
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@ -30,7 +30,6 @@
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#define ADF_C62X_ERRSSMSH_EN BIT(3)
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#define ADF_C62X_PF2VF_OFFSET(i) (0x3A000 + 0x280 + ((i) * 0x04))
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#define ADF_C62X_VINTMSK_OFFSET(i) (0x3A000 + 0x200 + ((i) * 0x04))
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/* AE to function mapping */
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#define ADF_C62X_AE2FUNC_MAP_GRP_A_NUM_REGS 80
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@ -52,11 +52,6 @@ static u32 get_pf2vf_offset(u32 i)
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return ADF_C62XIOV_PF2VF_OFFSET;
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}
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static u32 get_vintmsk_offset(u32 i)
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{
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return ADF_C62XIOV_VINTMSK_OFFSET;
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}
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static int adf_vf_int_noop(struct adf_accel_dev *accel_dev)
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{
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return 0;
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@ -92,7 +87,6 @@ void adf_init_hw_data_c62xiov(struct adf_hw_device_data *hw_data)
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hw_data->get_etr_bar_id = get_etr_bar_id;
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hw_data->get_misc_bar_id = get_misc_bar_id;
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hw_data->get_pf2vf_offset = get_pf2vf_offset;
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hw_data->get_vintmsk_offset = get_vintmsk_offset;
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hw_data->get_sku = get_sku;
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hw_data->enable_ints = adf_vf_void_noop;
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hw_data->enable_pfvf_comms = adf_enable_vf2pf_comms;
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@ -13,7 +13,6 @@
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#define ADF_C62XIOV_ETR_BAR 0
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#define ADF_C62XIOV_ETR_MAX_BANKS 1
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#define ADF_C62XIOV_PF2VF_OFFSET 0x200
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#define ADF_C62XIOV_VINTMSK_OFFSET 0x208
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void adf_init_hw_data_c62xiov(struct adf_hw_device_data *hw_data);
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void adf_clean_hw_data_c62xiov(struct adf_hw_device_data *hw_data);
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@ -154,7 +154,6 @@ struct adf_hw_device_data {
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u32 (*get_num_aes)(struct adf_hw_device_data *self);
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u32 (*get_num_accels)(struct adf_hw_device_data *self);
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u32 (*get_pf2vf_offset)(u32 i);
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u32 (*get_vintmsk_offset)(u32 i);
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void (*get_arb_info)(struct arb_info *arb_csrs_info);
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void (*get_admin_info)(struct admin_info *admin_csrs_info);
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enum dev_sku_info (*get_sku)(struct adf_hw_device_data *self);
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@ -36,7 +36,7 @@ void adf_enable_pf2vf_interrupts(struct adf_accel_dev *accel_dev)
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void __iomem *pmisc_bar_addr =
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pci_info->pci_bars[hw_data->get_misc_bar_id(hw_data)].virt_addr;
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ADF_CSR_WR(pmisc_bar_addr, hw_data->get_vintmsk_offset(0), 0x0);
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ADF_CSR_WR(pmisc_bar_addr, ADF_VINTMSK_OFFSET, 0x0);
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}
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void adf_disable_pf2vf_interrupts(struct adf_accel_dev *accel_dev)
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@ -46,7 +46,7 @@ void adf_disable_pf2vf_interrupts(struct adf_accel_dev *accel_dev)
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void __iomem *pmisc_bar_addr =
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pci_info->pci_bars[hw_data->get_misc_bar_id(hw_data)].virt_addr;
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ADF_CSR_WR(pmisc_bar_addr, hw_data->get_vintmsk_offset(0), 0x2);
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ADF_CSR_WR(pmisc_bar_addr, ADF_VINTMSK_OFFSET, 0x2);
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}
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static int adf_enable_msi(struct adf_accel_dev *accel_dev)
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@ -131,11 +131,6 @@ static u32 get_pf2vf_offset(u32 i)
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return ADF_DH895XCC_PF2VF_OFFSET(i);
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}
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static u32 get_vintmsk_offset(u32 i)
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{
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return ADF_DH895XCC_VINTMSK_OFFSET(i);
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}
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static void adf_enable_error_correction(struct adf_accel_dev *accel_dev)
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{
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struct adf_hw_device_data *hw_device = accel_dev->hw_device;
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@ -215,7 +210,6 @@ void adf_init_hw_data_dh895xcc(struct adf_hw_device_data *hw_data)
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hw_data->get_num_aes = get_num_aes;
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hw_data->get_etr_bar_id = get_etr_bar_id;
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hw_data->get_misc_bar_id = get_misc_bar_id;
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hw_data->get_vintmsk_offset = get_vintmsk_offset;
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hw_data->get_admin_info = adf_gen2_get_admin_info;
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hw_data->get_arb_info = adf_gen2_get_arb_info;
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hw_data->get_sram_bar_id = get_sram_bar_id;
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@ -35,7 +35,6 @@
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#define ADF_DH895XCC_ERRSSMSH_EN BIT(3)
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#define ADF_DH895XCC_PF2VF_OFFSET(i) (0x3A000 + 0x280 + ((i) * 0x04))
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#define ADF_DH895XCC_VINTMSK_OFFSET(i) (0x3A000 + 0x200 + ((i) * 0x04))
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/* AE to function mapping */
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#define ADF_DH895XCC_AE2FUNC_MAP_GRP_A_NUM_REGS 96
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@ -52,11 +52,6 @@ static u32 get_pf2vf_offset(u32 i)
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return ADF_DH895XCCIOV_PF2VF_OFFSET;
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}
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static u32 get_vintmsk_offset(u32 i)
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{
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return ADF_DH895XCCIOV_VINTMSK_OFFSET;
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}
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static int adf_vf_int_noop(struct adf_accel_dev *accel_dev)
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{
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return 0;
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@ -92,7 +87,6 @@ void adf_init_hw_data_dh895xcciov(struct adf_hw_device_data *hw_data)
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hw_data->get_etr_bar_id = get_etr_bar_id;
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hw_data->get_misc_bar_id = get_misc_bar_id;
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hw_data->get_pf2vf_offset = get_pf2vf_offset;
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hw_data->get_vintmsk_offset = get_vintmsk_offset;
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hw_data->get_sku = get_sku;
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hw_data->enable_ints = adf_vf_void_noop;
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hw_data->enable_pfvf_comms = adf_enable_vf2pf_comms;
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@ -13,7 +13,6 @@
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#define ADF_DH895XCCIOV_ETR_BAR 0
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#define ADF_DH895XCCIOV_ETR_MAX_BANKS 1
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#define ADF_DH895XCCIOV_PF2VF_OFFSET 0x200
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#define ADF_DH895XCCIOV_VINTMSK_OFFSET 0x208
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void adf_init_hw_data_dh895xcciov(struct adf_hw_device_data *hw_data);
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void adf_clean_hw_data_dh895xcciov(struct adf_hw_device_data *hw_data);
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