ARM: dts: sun5i: Add A13 and A10s SRAM and SRAM controller
The A13 / A10s has a few SRAM that can be mapped either to a device or to the CPU, with the mapping being controlled by a SRAM controller. Since most of the time these SRAM won't be accessible by the CPU, we can't use the mmio-sram driver and compatible. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
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@ -292,12 +292,46 @@
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/*
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* Note we use the address where the mmio registers start, not where
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* the SRAM blocks start, this cannot be changed because that would be
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* a devicetree ABI change.
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*/
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soc@01c00000 {
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soc@01c00000 {
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compatible = "simple-bus";
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compatible = "simple-bus";
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#address-cells = <1>;
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#address-cells = <1>;
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#size-cells = <1>;
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#size-cells = <1>;
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ranges;
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ranges;
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sram@00000000 {
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compatible = "allwinner,sun4i-a10-sram";
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reg = <0x00000000 0x4000>;
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allwinner,sram-name = "A1";
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};
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sram@00004000 {
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compatible = "allwinner,sun4i-a10-sram";
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reg = <0x00004000 0x4000>;
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allwinner,sram-name = "A2";
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};
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sram@00008000 {
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compatible = "allwinner,sun4i-a10-sram";
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reg = <0x00008000 0x4000>;
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allwinner,sram-name = "A3-A4";
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};
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sram@00010000 {
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compatible = "allwinner,sun4i-a10-sram";
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reg = <0x00010000 0x1000>;
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allwinner,sram-name = "D";
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};
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sram-controller@01c00000 {
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compatible = "allwinner,sun4i-a10-sram-controller";
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reg = <0x01c00000 0x30>;
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};
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dma: dma-controller@01c02000 {
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dma: dma-controller@01c02000 {
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compatible = "allwinner,sun4i-a10-dma";
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compatible = "allwinner,sun4i-a10-dma";
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reg = <0x01c02000 0x1000>;
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reg = <0x01c02000 0x1000>;
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