drm/radeon/cik: fix CP jump table size
Align to the jump table offset. May fix hangs on some asics with GFX PG enabled. Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com> Acked-by: Tom St Denis <tom.stdenis@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Родитель
b58bc5598a
Коммит
e70a15f556
|
@ -8366,7 +8366,7 @@ static int cik_startup(struct radeon_device *rdev)
|
|||
}
|
||||
}
|
||||
rdev->rlc.cs_data = ci_cs_data;
|
||||
rdev->rlc.cp_table_size = CP_ME_TABLE_SIZE * 5 * 4; /* CP JT */
|
||||
rdev->rlc.cp_table_size = ALIGN(CP_ME_TABLE_SIZE * 5 * 4, 2048); /* CP JT */
|
||||
rdev->rlc.cp_table_size += 64 * 1024; /* GDS */
|
||||
r = sumo_rlc_init(rdev);
|
||||
if (r) {
|
||||
|
|
Загрузка…
Ссылка в новой задаче