KVM/ARM fixes for v4.4-rc7
- A series of fixes to the MTRR emulation, tested in the BZ by several users so they should be safe this late - A fix for a division by zero - Two very simple ARM and PPC fixes -----BEGIN PGP SIGNATURE----- Version: GnuPG v2.0.22 (GNU/Linux) iQEcBAABAgAGBQJWeV/6AAoJEL/70l94x66DqzsH/05YnLi2GsX5WeZHMfIUgzgT S/GoIkA7A4E2eXVoGg824MWppSViUzZkWgYFQTG4+KY9WPXzm9z2ij7DIlUHCD6n QfevgQx1kIu1obyhm6bYM2xUdM3f7NCsQgw9bXZObB0ay+b/+GjR9/RbCbx60EO5 K1P+kveK6PFlS9/hc0PLztu6WkPV9BCO1RJUbeAEdnrMbpuQfHC+coR7MHRCiv2V iy8f1CqrGaO5YPm9/3GbdH1xMKew4OZShOxTXwtvUThdrLkks2c8sk6FoLzqkznH LMHVIpkm4mrIgThZG7VqZMXOrWvBtsCt04Vr9MzCM6QetB02b/Uz0xKvMYx2kZQ= =pmYz -----END PGP SIGNATURE----- Merge tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm Pull kvm fixes from Paolo Bonzini: - A series of fixes to the MTRR emulation, tested in the BZ by several users so they should be safe this late - A fix for a division by zero - Two very simple ARM and PPC fixes * tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm: KVM: x86: Reload pit counters for all channels when restoring state KVM: MTRR: treat memory as writeback if MTRR is disabled in guest CPUID KVM: MTRR: observe maxphyaddr from guest CPUID, not host KVM: MTRR: fix fixed MTRR segment look up KVM: VMX: Fix host initiated access to guest MSR_TSC_AUX KVM: arm/arm64: vgic: Fix kvm_vgic_map_is_active's dist check kvm: x86: move tracepoints outside extended quiescent state KVM: PPC: Book3S HV: Prohibit setting illegal transaction state in MSR
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e73a31778a
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@ -224,6 +224,12 @@ static void kvmppc_core_vcpu_put_hv(struct kvm_vcpu *vcpu)
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static void kvmppc_set_msr_hv(struct kvm_vcpu *vcpu, u64 msr)
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{
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/*
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* Check for illegal transactional state bit combination
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* and if we find it, force the TS field to a safe state.
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*/
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if ((msr & MSR_TS_MASK) == MSR_TS_MASK)
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msr &= ~MSR_TS_MASK;
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vcpu->arch.shregs.msr = msr;
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kvmppc_end_cede(vcpu);
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}
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@ -38,6 +38,14 @@ static inline bool guest_cpuid_has_xsave(struct kvm_vcpu *vcpu)
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return best && (best->ecx & bit(X86_FEATURE_XSAVE));
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}
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static inline bool guest_cpuid_has_mtrr(struct kvm_vcpu *vcpu)
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{
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struct kvm_cpuid_entry2 *best;
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best = kvm_find_cpuid_entry(vcpu, 1, 0);
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return best && (best->edx & bit(X86_FEATURE_MTRR));
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}
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static inline bool guest_cpuid_has_tsc_adjust(struct kvm_vcpu *vcpu)
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{
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struct kvm_cpuid_entry2 *best;
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@ -120,14 +120,22 @@ static u8 mtrr_default_type(struct kvm_mtrr *mtrr_state)
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return mtrr_state->deftype & IA32_MTRR_DEF_TYPE_TYPE_MASK;
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}
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static u8 mtrr_disabled_type(void)
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static u8 mtrr_disabled_type(struct kvm_vcpu *vcpu)
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{
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/*
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* Intel SDM 11.11.2.2: all MTRRs are disabled when
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* IA32_MTRR_DEF_TYPE.E bit is cleared, and the UC
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* memory type is applied to all of physical memory.
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*
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* However, virtual machines can be run with CPUID such that
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* there are no MTRRs. In that case, the firmware will never
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* enable MTRRs and it is obviously undesirable to run the
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* guest entirely with UC memory and we use WB.
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*/
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return MTRR_TYPE_UNCACHABLE;
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if (guest_cpuid_has_mtrr(vcpu))
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return MTRR_TYPE_UNCACHABLE;
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else
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return MTRR_TYPE_WRBACK;
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}
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/*
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@ -267,7 +275,7 @@ static int fixed_mtrr_addr_to_seg(u64 addr)
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for (seg = 0; seg < seg_num; seg++) {
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mtrr_seg = &fixed_seg_table[seg];
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if (mtrr_seg->start >= addr && addr < mtrr_seg->end)
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if (mtrr_seg->start <= addr && addr < mtrr_seg->end)
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return seg;
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}
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@ -300,7 +308,6 @@ static void var_mtrr_range(struct kvm_mtrr_range *range, u64 *start, u64 *end)
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*start = range->base & PAGE_MASK;
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mask = range->mask & PAGE_MASK;
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mask |= ~0ULL << boot_cpu_data.x86_phys_bits;
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/* This cannot overflow because writing to the reserved bits of
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* variable MTRRs causes a #GP.
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@ -356,10 +363,14 @@ static void set_var_mtrr_msr(struct kvm_vcpu *vcpu, u32 msr, u64 data)
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if (var_mtrr_range_is_valid(cur))
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list_del(&mtrr_state->var_ranges[index].node);
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/* Extend the mask with all 1 bits to the left, since those
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* bits must implicitly be 0. The bits are then cleared
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* when reading them.
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*/
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if (!is_mtrr_mask)
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cur->base = data;
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else
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cur->mask = data;
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cur->mask = data | (-1LL << cpuid_maxphyaddr(vcpu));
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/* add it to the list if it's enabled. */
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if (var_mtrr_range_is_valid(cur)) {
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@ -426,6 +437,8 @@ int kvm_mtrr_get_msr(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
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*pdata = vcpu->arch.mtrr_state.var_ranges[index].base;
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else
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*pdata = vcpu->arch.mtrr_state.var_ranges[index].mask;
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*pdata &= (1ULL << cpuid_maxphyaddr(vcpu)) - 1;
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}
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return 0;
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@ -670,7 +683,7 @@ u8 kvm_mtrr_get_guest_memory_type(struct kvm_vcpu *vcpu, gfn_t gfn)
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}
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if (iter.mtrr_disabled)
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return mtrr_disabled_type();
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return mtrr_disabled_type(vcpu);
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/* not contained in any MTRRs. */
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if (type == -1)
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@ -3422,6 +3422,8 @@ static int handle_exit(struct kvm_vcpu *vcpu)
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struct kvm_run *kvm_run = vcpu->run;
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u32 exit_code = svm->vmcb->control.exit_code;
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trace_kvm_exit(exit_code, vcpu, KVM_ISA_SVM);
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if (!is_cr_intercept(svm, INTERCEPT_CR0_WRITE))
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vcpu->arch.cr0 = svm->vmcb->save.cr0;
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if (npt_enabled)
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@ -3892,8 +3894,6 @@ static void svm_vcpu_run(struct kvm_vcpu *vcpu)
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vcpu->arch.regs[VCPU_REGS_RSP] = svm->vmcb->save.rsp;
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vcpu->arch.regs[VCPU_REGS_RIP] = svm->vmcb->save.rip;
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trace_kvm_exit(svm->vmcb->control.exit_code, vcpu, KVM_ISA_SVM);
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if (unlikely(svm->vmcb->control.exit_code == SVM_EXIT_NMI))
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kvm_before_handle_nmi(&svm->vcpu);
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@ -2803,7 +2803,7 @@ static int vmx_get_msr(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
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msr_info->data = vcpu->arch.ia32_xss;
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break;
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case MSR_TSC_AUX:
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if (!guest_cpuid_has_rdtscp(vcpu))
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if (!guest_cpuid_has_rdtscp(vcpu) && !msr_info->host_initiated)
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return 1;
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/* Otherwise falls through */
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default:
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@ -2909,7 +2909,7 @@ static int vmx_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
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clear_atomic_switch_msr(vmx, MSR_IA32_XSS);
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break;
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case MSR_TSC_AUX:
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if (!guest_cpuid_has_rdtscp(vcpu))
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if (!guest_cpuid_has_rdtscp(vcpu) && !msr_info->host_initiated)
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return 1;
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/* Check reserved bit, higher 32 bits should be zero */
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if ((data >> 32) != 0)
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@ -8042,6 +8042,8 @@ static int vmx_handle_exit(struct kvm_vcpu *vcpu)
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u32 exit_reason = vmx->exit_reason;
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u32 vectoring_info = vmx->idt_vectoring_info;
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trace_kvm_exit(exit_reason, vcpu, KVM_ISA_VMX);
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/*
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* Flush logged GPAs PML buffer, this will make dirty_bitmap more
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* updated. Another good is, in kvm_vm_ioctl_get_dirty_log, before
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@ -8668,7 +8670,6 @@ static void __noclone vmx_vcpu_run(struct kvm_vcpu *vcpu)
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vmx->loaded_vmcs->launched = 1;
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vmx->exit_reason = vmcs_read32(VM_EXIT_REASON);
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trace_kvm_exit(vmx->exit_reason, vcpu, KVM_ISA_VMX);
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/*
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* the KVM_REQ_EVENT optimization bit is only on for one entry, and if
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@ -3572,9 +3572,11 @@ static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
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static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
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{
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int i;
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mutex_lock(&kvm->arch.vpit->pit_state.lock);
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memcpy(&kvm->arch.vpit->pit_state, ps, sizeof(struct kvm_pit_state));
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kvm_pit_load_count(kvm, 0, ps->channels[0].count, 0);
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for (i = 0; i < 3; i++)
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kvm_pit_load_count(kvm, i, ps->channels[i].count, 0);
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mutex_unlock(&kvm->arch.vpit->pit_state.lock);
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return 0;
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}
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@ -3593,6 +3595,7 @@ static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
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static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
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{
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int start = 0;
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int i;
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u32 prev_legacy, cur_legacy;
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mutex_lock(&kvm->arch.vpit->pit_state.lock);
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prev_legacy = kvm->arch.vpit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
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@ -3602,7 +3605,8 @@ static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
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memcpy(&kvm->arch.vpit->pit_state.channels, &ps->channels,
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sizeof(kvm->arch.vpit->pit_state.channels));
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kvm->arch.vpit->pit_state.flags = ps->flags;
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kvm_pit_load_count(kvm, 0, kvm->arch.vpit->pit_state.channels[0].count, start);
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for (i = 0; i < 3; i++)
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kvm_pit_load_count(kvm, i, kvm->arch.vpit->pit_state.channels[i].count, start);
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mutex_unlock(&kvm->arch.vpit->pit_state.lock);
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return 0;
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}
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@ -6515,6 +6519,8 @@ static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
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if (req_immediate_exit)
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smp_send_reschedule(vcpu->cpu);
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trace_kvm_entry(vcpu->vcpu_id);
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wait_lapic_expire(vcpu);
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__kvm_guest_enter();
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if (unlikely(vcpu->arch.switch_db_regs)) {
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vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_RELOAD;
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}
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trace_kvm_entry(vcpu->vcpu_id);
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wait_lapic_expire(vcpu);
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kvm_x86_ops->run(vcpu);
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/*
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@ -1114,7 +1114,7 @@ bool kvm_vgic_map_is_active(struct kvm_vcpu *vcpu, struct irq_phys_map *map)
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return true;
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}
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return dist_active_irq(vcpu);
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return vgic_irq_is_active(vcpu, map->virt_irq);
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}
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/*
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