perf: Convert perf_event to local_t
Since now all modification to event->count (and ->prev_count and ->period_left) are local to a cpu, change then to local64_t so we avoid the LOCK'ed ops. Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl> LKML-Reference: <new-submission> Signed-off-by: Ingo Molnar <mingo@elte.hu>
This commit is contained in:
Peter Zijlstra
Ingo Molnar
Родитель
a6e6dea68c
Коммит
e78505958c
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@ -164,20 +164,20 @@ armpmu_event_set_period(struct perf_event *event,
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struct hw_perf_event *hwc,
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int idx)
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{
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s64 left = atomic64_read(&hwc->period_left);
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s64 left = local64_read(&hwc->period_left);
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s64 period = hwc->sample_period;
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int ret = 0;
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if (unlikely(left <= -period)) {
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left = period;
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atomic64_set(&hwc->period_left, left);
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local64_set(&hwc->period_left, left);
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hwc->last_period = period;
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ret = 1;
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}
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if (unlikely(left <= 0)) {
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left += period;
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atomic64_set(&hwc->period_left, left);
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local64_set(&hwc->period_left, left);
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hwc->last_period = period;
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ret = 1;
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}
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@ -185,7 +185,7 @@ armpmu_event_set_period(struct perf_event *event,
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if (left > (s64)armpmu->max_period)
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left = armpmu->max_period;
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atomic64_set(&hwc->prev_count, (u64)-left);
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local64_set(&hwc->prev_count, (u64)-left);
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armpmu->write_counter(idx, (u64)(-left) & 0xffffffff);
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@ -204,18 +204,18 @@ armpmu_event_update(struct perf_event *event,
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s64 delta;
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again:
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prev_raw_count = atomic64_read(&hwc->prev_count);
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prev_raw_count = local64_read(&hwc->prev_count);
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new_raw_count = armpmu->read_counter(idx);
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if (atomic64_cmpxchg(&hwc->prev_count, prev_raw_count,
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if (local64_cmpxchg(&hwc->prev_count, prev_raw_count,
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new_raw_count) != prev_raw_count)
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goto again;
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delta = (new_raw_count << shift) - (prev_raw_count << shift);
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delta >>= shift;
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atomic64_add(delta, &event->count);
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atomic64_sub(delta, &hwc->period_left);
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local64_add(delta, &event->count);
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local64_sub(delta, &hwc->period_left);
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return new_raw_count;
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}
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@ -478,7 +478,7 @@ __hw_perf_event_init(struct perf_event *event)
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if (!hwc->sample_period) {
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hwc->sample_period = armpmu->max_period;
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hwc->last_period = hwc->sample_period;
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atomic64_set(&hwc->period_left, hwc->sample_period);
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local64_set(&hwc->period_left, hwc->sample_period);
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}
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err = 0;
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@ -410,15 +410,15 @@ static void power_pmu_read(struct perf_event *event)
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* Therefore we treat them like NMIs.
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*/
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do {
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prev = atomic64_read(&event->hw.prev_count);
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prev = local64_read(&event->hw.prev_count);
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barrier();
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val = read_pmc(event->hw.idx);
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} while (atomic64_cmpxchg(&event->hw.prev_count, prev, val) != prev);
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} while (local64_cmpxchg(&event->hw.prev_count, prev, val) != prev);
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/* The counters are only 32 bits wide */
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delta = (val - prev) & 0xfffffffful;
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atomic64_add(delta, &event->count);
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atomic64_sub(delta, &event->hw.period_left);
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local64_add(delta, &event->count);
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local64_sub(delta, &event->hw.period_left);
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}
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/*
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@ -444,10 +444,10 @@ static void freeze_limited_counters(struct cpu_hw_events *cpuhw,
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if (!event->hw.idx)
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continue;
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val = (event->hw.idx == 5) ? pmc5 : pmc6;
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prev = atomic64_read(&event->hw.prev_count);
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prev = local64_read(&event->hw.prev_count);
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event->hw.idx = 0;
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delta = (val - prev) & 0xfffffffful;
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atomic64_add(delta, &event->count);
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local64_add(delta, &event->count);
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}
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}
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@ -462,7 +462,7 @@ static void thaw_limited_counters(struct cpu_hw_events *cpuhw,
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event = cpuhw->limited_counter[i];
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event->hw.idx = cpuhw->limited_hwidx[i];
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val = (event->hw.idx == 5) ? pmc5 : pmc6;
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atomic64_set(&event->hw.prev_count, val);
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local64_set(&event->hw.prev_count, val);
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perf_event_update_userpage(event);
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}
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}
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@ -666,11 +666,11 @@ void hw_perf_enable(void)
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}
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val = 0;
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if (event->hw.sample_period) {
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left = atomic64_read(&event->hw.period_left);
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left = local64_read(&event->hw.period_left);
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if (left < 0x80000000L)
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val = 0x80000000L - left;
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}
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atomic64_set(&event->hw.prev_count, val);
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local64_set(&event->hw.prev_count, val);
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event->hw.idx = idx;
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write_pmc(idx, val);
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perf_event_update_userpage(event);
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@ -842,8 +842,8 @@ static void power_pmu_unthrottle(struct perf_event *event)
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if (left < 0x80000000L)
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val = 0x80000000L - left;
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write_pmc(event->hw.idx, val);
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atomic64_set(&event->hw.prev_count, val);
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atomic64_set(&event->hw.period_left, left);
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local64_set(&event->hw.prev_count, val);
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local64_set(&event->hw.period_left, left);
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perf_event_update_userpage(event);
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perf_enable();
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local_irq_restore(flags);
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@ -1109,7 +1109,7 @@ const struct pmu *hw_perf_event_init(struct perf_event *event)
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event->hw.config = events[n];
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event->hw.event_base = cflags[n];
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event->hw.last_period = event->hw.sample_period;
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atomic64_set(&event->hw.period_left, event->hw.last_period);
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local64_set(&event->hw.period_left, event->hw.last_period);
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/*
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* See if we need to reserve the PMU.
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@ -1147,16 +1147,16 @@ static void record_and_restart(struct perf_event *event, unsigned long val,
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int record = 0;
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/* we don't have to worry about interrupts here */
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prev = atomic64_read(&event->hw.prev_count);
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prev = local64_read(&event->hw.prev_count);
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delta = (val - prev) & 0xfffffffful;
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atomic64_add(delta, &event->count);
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local64_add(delta, &event->count);
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/*
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* See if the total period for this event has expired,
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* and update for the next period.
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*/
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val = 0;
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left = atomic64_read(&event->hw.period_left) - delta;
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left = local64_read(&event->hw.period_left) - delta;
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if (period) {
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if (left <= 0) {
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left += period;
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@ -1194,8 +1194,8 @@ static void record_and_restart(struct perf_event *event, unsigned long val,
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}
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write_pmc(event->hw.idx, val);
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atomic64_set(&event->hw.prev_count, val);
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atomic64_set(&event->hw.period_left, left);
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local64_set(&event->hw.prev_count, val);
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local64_set(&event->hw.period_left, left);
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perf_event_update_userpage(event);
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}
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@ -185,10 +185,10 @@ static void sh_perf_event_update(struct perf_event *event,
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* this is the simplest approach for maintaining consistency.
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*/
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again:
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prev_raw_count = atomic64_read(&hwc->prev_count);
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prev_raw_count = local64_read(&hwc->prev_count);
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new_raw_count = sh_pmu->read(idx);
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if (atomic64_cmpxchg(&hwc->prev_count, prev_raw_count,
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if (local64_cmpxchg(&hwc->prev_count, prev_raw_count,
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new_raw_count) != prev_raw_count)
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goto again;
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@ -203,7 +203,7 @@ again:
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delta = (new_raw_count << shift) - (prev_raw_count << shift);
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delta >>= shift;
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atomic64_add(delta, &event->count);
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local64_add(delta, &event->count);
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}
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static void sh_pmu_disable(struct perf_event *event)
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@ -572,18 +572,18 @@ static u64 sparc_perf_event_update(struct perf_event *event,
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s64 delta;
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again:
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prev_raw_count = atomic64_read(&hwc->prev_count);
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prev_raw_count = local64_read(&hwc->prev_count);
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new_raw_count = read_pmc(idx);
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if (atomic64_cmpxchg(&hwc->prev_count, prev_raw_count,
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if (local64_cmpxchg(&hwc->prev_count, prev_raw_count,
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new_raw_count) != prev_raw_count)
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goto again;
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delta = (new_raw_count << shift) - (prev_raw_count << shift);
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delta >>= shift;
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atomic64_add(delta, &event->count);
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atomic64_sub(delta, &hwc->period_left);
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local64_add(delta, &event->count);
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local64_sub(delta, &hwc->period_left);
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return new_raw_count;
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}
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@ -591,27 +591,27 @@ again:
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static int sparc_perf_event_set_period(struct perf_event *event,
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struct hw_perf_event *hwc, int idx)
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{
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s64 left = atomic64_read(&hwc->period_left);
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s64 left = local64_read(&hwc->period_left);
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s64 period = hwc->sample_period;
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int ret = 0;
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if (unlikely(left <= -period)) {
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left = period;
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atomic64_set(&hwc->period_left, left);
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local64_set(&hwc->period_left, left);
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hwc->last_period = period;
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ret = 1;
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}
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if (unlikely(left <= 0)) {
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left += period;
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atomic64_set(&hwc->period_left, left);
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local64_set(&hwc->period_left, left);
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hwc->last_period = period;
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ret = 1;
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}
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if (left > MAX_PERIOD)
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left = MAX_PERIOD;
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atomic64_set(&hwc->prev_count, (u64)-left);
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local64_set(&hwc->prev_count, (u64)-left);
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write_pmc(idx, (u64)(-left) & 0xffffffff);
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@ -1087,7 +1087,7 @@ static int __hw_perf_event_init(struct perf_event *event)
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if (!hwc->sample_period) {
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hwc->sample_period = MAX_PERIOD;
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hwc->last_period = hwc->sample_period;
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atomic64_set(&hwc->period_left, hwc->sample_period);
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local64_set(&hwc->period_left, hwc->sample_period);
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}
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return 0;
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@ -296,10 +296,10 @@ x86_perf_event_update(struct perf_event *event)
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* count to the generic event atomically:
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*/
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again:
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prev_raw_count = atomic64_read(&hwc->prev_count);
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prev_raw_count = local64_read(&hwc->prev_count);
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rdmsrl(hwc->event_base + idx, new_raw_count);
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if (atomic64_cmpxchg(&hwc->prev_count, prev_raw_count,
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if (local64_cmpxchg(&hwc->prev_count, prev_raw_count,
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new_raw_count) != prev_raw_count)
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goto again;
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@ -314,8 +314,8 @@ again:
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delta = (new_raw_count << shift) - (prev_raw_count << shift);
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delta >>= shift;
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atomic64_add(delta, &event->count);
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atomic64_sub(delta, &hwc->period_left);
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local64_add(delta, &event->count);
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local64_sub(delta, &hwc->period_left);
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return new_raw_count;
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}
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@ -439,7 +439,7 @@ static int x86_setup_perfctr(struct perf_event *event)
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if (!hwc->sample_period) {
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hwc->sample_period = x86_pmu.max_period;
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hwc->last_period = hwc->sample_period;
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atomic64_set(&hwc->period_left, hwc->sample_period);
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local64_set(&hwc->period_left, hwc->sample_period);
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} else {
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/*
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* If we have a PMU initialized but no APIC
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@ -886,7 +886,7 @@ static int
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x86_perf_event_set_period(struct perf_event *event)
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{
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struct hw_perf_event *hwc = &event->hw;
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s64 left = atomic64_read(&hwc->period_left);
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s64 left = local64_read(&hwc->period_left);
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s64 period = hwc->sample_period;
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int ret = 0, idx = hwc->idx;
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@ -898,14 +898,14 @@ x86_perf_event_set_period(struct perf_event *event)
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*/
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if (unlikely(left <= -period)) {
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left = period;
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atomic64_set(&hwc->period_left, left);
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local64_set(&hwc->period_left, left);
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hwc->last_period = period;
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ret = 1;
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}
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if (unlikely(left <= 0)) {
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left += period;
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atomic64_set(&hwc->period_left, left);
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local64_set(&hwc->period_left, left);
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hwc->last_period = period;
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ret = 1;
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}
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@ -924,7 +924,7 @@ x86_perf_event_set_period(struct perf_event *event)
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* The hw event starts counting from this event offset,
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* mark it to be able to extra future deltas:
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*/
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atomic64_set(&hwc->prev_count, (u64)-left);
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local64_set(&hwc->prev_count, (u64)-left);
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wrmsrl(hwc->event_base + idx, (u64)(-left) & x86_pmu.cntval_mask);
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@ -487,6 +487,7 @@ struct perf_guest_info_callbacks {
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#include <linux/cpu.h>
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#include <asm/atomic.h>
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#include <asm/local.h>
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#include <asm/local64.h>
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#define PERF_MAX_STACK_DEPTH 255
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@ -536,10 +537,10 @@ struct hw_perf_event {
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struct arch_hw_breakpoint info;
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#endif
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};
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atomic64_t prev_count;
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local64_t prev_count;
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u64 sample_period;
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u64 last_period;
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atomic64_t period_left;
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local64_t period_left;
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u64 interrupts;
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u64 freq_time_stamp;
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@ -670,7 +671,7 @@ struct perf_event {
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enum perf_event_active_state state;
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unsigned int attach_state;
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atomic64_t count;
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local64_t count;
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atomic64_t child_count;
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/*
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@ -1148,9 +1148,9 @@ static void __perf_event_sync_stat(struct perf_event *event,
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* In order to keep per-task stats reliable we need to flip the event
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* values when we flip the contexts.
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*/
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value = atomic64_read(&next_event->count);
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value = atomic64_xchg(&event->count, value);
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atomic64_set(&next_event->count, value);
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value = local64_read(&next_event->count);
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value = local64_xchg(&event->count, value);
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local64_set(&next_event->count, value);
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swap(event->total_time_enabled, next_event->total_time_enabled);
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swap(event->total_time_running, next_event->total_time_running);
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@ -1540,10 +1540,10 @@ static void perf_adjust_period(struct perf_event *event, u64 nsec, u64 count)
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hwc->sample_period = sample_period;
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if (atomic64_read(&hwc->period_left) > 8*sample_period) {
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if (local64_read(&hwc->period_left) > 8*sample_period) {
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perf_disable();
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perf_event_stop(event);
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atomic64_set(&hwc->period_left, 0);
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local64_set(&hwc->period_left, 0);
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perf_event_start(event);
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perf_enable();
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}
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@ -1584,7 +1584,7 @@ static void perf_ctx_adjust_freq(struct perf_event_context *ctx)
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perf_disable();
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event->pmu->read(event);
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now = atomic64_read(&event->count);
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now = local64_read(&event->count);
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delta = now - hwc->freq_count_stamp;
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hwc->freq_count_stamp = now;
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@ -1738,7 +1738,7 @@ static void __perf_event_read(void *info)
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static inline u64 perf_event_count(struct perf_event *event)
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{
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return atomic64_read(&event->count) + atomic64_read(&event->child_count);
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return local64_read(&event->count) + atomic64_read(&event->child_count);
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}
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static u64 perf_event_read(struct perf_event *event)
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@ -2141,7 +2141,7 @@ static unsigned int perf_poll(struct file *file, poll_table *wait)
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static void perf_event_reset(struct perf_event *event)
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{
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(void)perf_event_read(event);
|
||||
atomic64_set(&event->count, 0);
|
||||
local64_set(&event->count, 0);
|
||||
perf_event_update_userpage(event);
|
||||
}
|
||||
|
||||
|
|
@ -2359,7 +2359,7 @@ void perf_event_update_userpage(struct perf_event *event)
|
|||
userpg->index = perf_event_index(event);
|
||||
userpg->offset = perf_event_count(event);
|
||||
if (event->state == PERF_EVENT_STATE_ACTIVE)
|
||||
userpg->offset -= atomic64_read(&event->hw.prev_count);
|
||||
userpg->offset -= local64_read(&event->hw.prev_count);
|
||||
|
||||
userpg->time_enabled = event->total_time_enabled +
|
||||
atomic64_read(&event->child_total_time_enabled);
|
||||
|
|
@ -4035,14 +4035,14 @@ static u64 perf_swevent_set_period(struct perf_event *event)
|
|||
hwc->last_period = hwc->sample_period;
|
||||
|
||||
again:
|
||||
old = val = atomic64_read(&hwc->period_left);
|
||||
old = val = local64_read(&hwc->period_left);
|
||||
if (val < 0)
|
||||
return 0;
|
||||
|
||||
nr = div64_u64(period + val, period);
|
||||
offset = nr * period;
|
||||
val -= offset;
|
||||
if (atomic64_cmpxchg(&hwc->period_left, old, val) != old)
|
||||
if (local64_cmpxchg(&hwc->period_left, old, val) != old)
|
||||
goto again;
|
||||
|
||||
return nr;
|
||||
|
|
@ -4081,7 +4081,7 @@ static void perf_swevent_add(struct perf_event *event, u64 nr,
|
|||
{
|
||||
struct hw_perf_event *hwc = &event->hw;
|
||||
|
||||
atomic64_add(nr, &event->count);
|
||||
local64_add(nr, &event->count);
|
||||
|
||||
if (!regs)
|
||||
return;
|
||||
|
|
@ -4092,7 +4092,7 @@ static void perf_swevent_add(struct perf_event *event, u64 nr,
|
|||
if (nr == 1 && hwc->sample_period == 1 && !event->attr.freq)
|
||||
return perf_swevent_overflow(event, 1, nmi, data, regs);
|
||||
|
||||
if (atomic64_add_negative(nr, &hwc->period_left))
|
||||
if (local64_add_negative(nr, &hwc->period_left))
|
||||
return;
|
||||
|
||||
perf_swevent_overflow(event, 0, nmi, data, regs);
|
||||
|
|
@ -4383,8 +4383,8 @@ static void cpu_clock_perf_event_update(struct perf_event *event)
|
|||
u64 now;
|
||||
|
||||
now = cpu_clock(cpu);
|
||||
prev = atomic64_xchg(&event->hw.prev_count, now);
|
||||
atomic64_add(now - prev, &event->count);
|
||||
prev = local64_xchg(&event->hw.prev_count, now);
|
||||
local64_add(now - prev, &event->count);
|
||||
}
|
||||
|
||||
static int cpu_clock_perf_event_enable(struct perf_event *event)
|
||||
|
|
@ -4392,7 +4392,7 @@ static int cpu_clock_perf_event_enable(struct perf_event *event)
|
|||
struct hw_perf_event *hwc = &event->hw;
|
||||
int cpu = raw_smp_processor_id();
|
||||
|
||||
atomic64_set(&hwc->prev_count, cpu_clock(cpu));
|
||||
local64_set(&hwc->prev_count, cpu_clock(cpu));
|
||||
perf_swevent_start_hrtimer(event);
|
||||
|
||||
return 0;
|
||||
|
|
@ -4424,9 +4424,9 @@ static void task_clock_perf_event_update(struct perf_event *event, u64 now)
|
|||
u64 prev;
|
||||
s64 delta;
|
||||
|
||||
prev = atomic64_xchg(&event->hw.prev_count, now);
|
||||
prev = local64_xchg(&event->hw.prev_count, now);
|
||||
delta = now - prev;
|
||||
atomic64_add(delta, &event->count);
|
||||
local64_add(delta, &event->count);
|
||||
}
|
||||
|
||||
static int task_clock_perf_event_enable(struct perf_event *event)
|
||||
|
|
@ -4436,7 +4436,7 @@ static int task_clock_perf_event_enable(struct perf_event *event)
|
|||
|
||||
now = event->ctx->time;
|
||||
|
||||
atomic64_set(&hwc->prev_count, now);
|
||||
local64_set(&hwc->prev_count, now);
|
||||
|
||||
perf_swevent_start_hrtimer(event);
|
||||
|
||||
|
|
@ -4879,7 +4879,7 @@ perf_event_alloc(struct perf_event_attr *attr,
|
|||
hwc->sample_period = 1;
|
||||
hwc->last_period = hwc->sample_period;
|
||||
|
||||
atomic64_set(&hwc->period_left, hwc->sample_period);
|
||||
local64_set(&hwc->period_left, hwc->sample_period);
|
||||
|
||||
/*
|
||||
* we currently do not support PERF_FORMAT_GROUP on inherited events
|
||||
|
|
@ -5313,7 +5313,7 @@ inherit_event(struct perf_event *parent_event,
|
|||
hwc->sample_period = sample_period;
|
||||
hwc->last_period = sample_period;
|
||||
|
||||
atomic64_set(&hwc->period_left, sample_period);
|
||||
local64_set(&hwc->period_left, sample_period);
|
||||
}
|
||||
|
||||
child_event->overflow_handler = parent_event->overflow_handler;
|
||||
|
|
|
|||
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