PM / devfreq: tegra30: Drop write-barrier
There is no need in a write-barrier now, given that interrupt masking is handled by CPU's GIC now. Hence we know exactly that interrupt won't fire after stopping the devfreq's governor. In other cases we don't care about potential buffering of the writes to hardware and thus there is no need to stall CPU. Reviewed-by: Chanwoo Choi <cw00.choi@samsung.com> Tested-by: Peter Geis <pgwipeout@gmail.com> Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
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@ -230,12 +230,6 @@ static void tegra_devfreq_update_wmark(struct tegra_devfreq *tegra,
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ACTMON_DEV_LOWER_WMARK);
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}
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static void actmon_write_barrier(struct tegra_devfreq *tegra)
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{
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/* ensure the update has reached the ACTMON */
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readl(tegra->regs + ACTMON_GLB_STATUS);
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}
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static void actmon_isr_device(struct tegra_devfreq *tegra,
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struct tegra_devfreq_device *dev)
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{
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@ -287,8 +281,6 @@ static void actmon_isr_device(struct tegra_devfreq *tegra,
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device_writel(dev, dev_ctrl, ACTMON_DEV_CTRL);
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device_writel(dev, ACTMON_INTR_STATUS_CLEAR, ACTMON_DEV_INTR_STATUS);
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actmon_write_barrier(tegra);
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}
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static unsigned long actmon_cpu_to_emc_rate(struct tegra_devfreq *tegra,
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@ -376,8 +368,6 @@ static int tegra_actmon_rate_notify_cb(struct notifier_block *nb,
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tegra_devfreq_update_wmark(tegra, dev);
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}
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actmon_write_barrier(tegra);
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return NOTIFY_OK;
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}
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@ -423,8 +413,6 @@ static void tegra_actmon_start(struct tegra_devfreq *tegra)
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for (i = 0; i < ARRAY_SIZE(tegra->devices); i++)
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tegra_actmon_configure_device(tegra, &tegra->devices[i]);
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actmon_write_barrier(tegra);
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enable_irq(tegra->irq);
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}
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@ -439,8 +427,6 @@ static void tegra_actmon_stop(struct tegra_devfreq *tegra)
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device_writel(&tegra->devices[i], ACTMON_INTR_STATUS_CLEAR,
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ACTMON_DEV_INTR_STATUS);
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}
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actmon_write_barrier(tegra);
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}
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static int tegra_devfreq_target(struct device *dev, unsigned long *freq,
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