iwlwifi: cleanup PCI register handling
This patch cleans up pci registers handling. Signed-off-by: Tomas Winkler <tomas.winkler@intel.com> Signed-off-by: Zhu Yi <yi.zhu@intel.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
This commit is contained in:
Tomas Winkler
John W. Linville
Родитель
926f0b2ef2
Коммит
e7b635814b
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@ -98,16 +98,17 @@
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#define IWL_RSSI_OFFSET 44
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#include "iwl-commands.h"
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/* PCI registers */
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#define PCI_LINK_CTRL 0x0F0 /* 1 byte */
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#define PCI_POWER_SOURCE 0x0C8
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#define PCI_REG_WUM8 0x0E8
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#define PCI_CFG_RETRY_TIMEOUT 0x041
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#define PCI_CFG_POWER_SOURCE 0x0C8
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#define PCI_REG_WUM8 0x0E8
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#define PCI_CFG_LINK_CTRL 0x0F0
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/* PCI register values */
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#define PCI_LINK_VAL_L0S_EN 0x01
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#define PCI_LINK_VAL_L1_EN 0x02
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#define PCI_CFG_LINK_CTRL_VAL_L0S_EN 0x01
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#define PCI_CFG_LINK_CTRL_VAL_L1_EN 0x02
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#define PCI_CFG_CMD_REG_INT_DIS_MSK 0x04
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#define PCI_CFG_PMC_PME_FROM_D3COLD_SUPPORT (0x80000000)
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#define TFD_QUEUE_SIZE_MAX (256)
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@ -399,7 +399,7 @@ static void iwl4965_nic_config(struct iwl_priv *priv)
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unsigned long flags;
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u32 val;
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u16 radio_cfg;
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u8 val_link;
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u16 link;
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spin_lock_irqsave(&priv->lock, flags);
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@ -410,10 +410,10 @@ static void iwl4965_nic_config(struct iwl_priv *priv)
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val & ~(1 << 11));
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}
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pci_read_config_byte(priv->pci_dev, PCI_LINK_CTRL, &val_link);
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pci_read_config_word(priv->pci_dev, PCI_CFG_LINK_CTRL, &link);
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/* L1 is enabled by BIOS */
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if ((val_link & PCI_LINK_VAL_L1_EN) == PCI_LINK_VAL_L1_EN)
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if ((link & PCI_CFG_LINK_CTRL_VAL_L1_EN) == PCI_CFG_LINK_CTRL_VAL_L1_EN)
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/* diable L0S disabled L1A enabled */
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iwl_set_bit(priv, CSR_GIO_REG, CSR_GIO_REG_VAL_L0S_ENABLED);
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else
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@ -208,14 +208,14 @@ static void iwl5000_nic_config(struct iwl_priv *priv)
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{
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unsigned long flags;
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u16 radio_cfg;
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u8 val_link;
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u16 link;
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spin_lock_irqsave(&priv->lock, flags);
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pci_read_config_byte(priv->pci_dev, PCI_LINK_CTRL, &val_link);
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pci_read_config_word(priv->pci_dev, PCI_CFG_LINK_CTRL, &link);
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/* L1 is enabled by BIOS */
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if ((val_link & PCI_LINK_VAL_L1_EN) == PCI_LINK_VAL_L1_EN)
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if ((link & PCI_CFG_LINK_CTRL_VAL_L1_EN) == PCI_CFG_LINK_CTRL_VAL_L1_EN)
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/* diable L0S disabled L1A enabled */
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iwl_set_bit(priv, CSR_GIO_REG, CSR_GIO_REG_VAL_L0S_ENABLED);
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else
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@ -1273,7 +1273,7 @@ int iwl4965_set_pwr_src(struct iwl_priv *priv, enum iwl_pwr_src src)
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if (src == IWL_PWR_SRC_VAUX) {
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u32 val;
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ret = pci_read_config_dword(priv->pci_dev, PCI_POWER_SOURCE,
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ret = pci_read_config_dword(priv->pci_dev, PCI_CFG_POWER_SOURCE,
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&val);
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if (val & PCI_CFG_PMC_PME_FROM_D3COLD_SUPPORT)
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@ -4229,9 +4229,6 @@ static int iwl4965_pci_probe(struct pci_dev *pdev, const struct pci_device_id *e
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pci_set_drvdata(pdev, priv);
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/* We disable the RETRY_TIMEOUT register (0x41) to keep
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* PCI Tx retries from interfering with C3 CPU state */
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pci_write_config_byte(pdev, 0x41, 0x00);
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/***********************
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* 3. Read REV register
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@ -4251,6 +4248,10 @@ static int iwl4965_pci_probe(struct pci_dev *pdev, const struct pci_device_id *e
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": Detected Intel Wireless WiFi Link %s REV=0x%X\n",
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priv->cfg->name, priv->hw_rev);
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/* We disable the RETRY_TIMEOUT register (0x41) to keep
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* PCI Tx retries from interfering with C3 CPU state */
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pci_write_config_byte(pdev, PCI_CFG_RETRY_TIMEOUT, 0x00);
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/* amp init */
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err = priv->cfg->ops->lib->apm_ops.init(priv);
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if (err < 0) {
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@ -2026,8 +2026,8 @@ struct iwl4965_spectrum_notification {
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* bit 2 - '0' PM have to walk up every DTIM
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* '1' PM could sleep over DTIM till listen Interval.
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* PCI power managed
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* bit 3 - '0' (PCI_LINK_CTRL & 0x1)
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* '1' !(PCI_LINK_CTRL & 0x1)
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* bit 3 - '0' (PCI_CFG_LINK_CTRL & 0x1)
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* '1' !(PCI_CFG_LINK_CTRL & 0x1)
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* Force sleep Modes
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* bit 31/30- '00' use both mac/xtal sleeps
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* '01' force Mac sleep
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@ -152,9 +152,10 @@ static u16 iwl_get_auto_power_mode(struct iwl_priv *priv)
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/* initialize to default */
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static int iwl_power_init_handle(struct iwl_priv *priv)
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{
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int ret = 0, i;
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struct iwl_power_mgr *pow_data;
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int size = sizeof(struct iwl_power_vec_entry) * IWL_POWER_MAX;
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struct iwl_powertable_cmd *cmd;
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int i;
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u16 pci_pm;
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IWL_DEBUG_POWER("Initialize power \n");
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@ -167,25 +168,19 @@ static int iwl_power_init_handle(struct iwl_priv *priv)
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memcpy(&pow_data->pwr_range_1[0], &range_1[0], size);
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memcpy(&pow_data->pwr_range_2[0], &range_2[0], size);
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ret = pci_read_config_word(priv->pci_dev,
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PCI_LINK_CTRL, &pci_pm);
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if (ret != 0)
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return 0;
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else {
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struct iwl_powertable_cmd *cmd;
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pci_read_config_word(priv->pci_dev, PCI_CFG_LINK_CTRL, &pci_pm);
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IWL_DEBUG_POWER("adjust power command flags\n");
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IWL_DEBUG_POWER("adjust power command flags\n");
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for (i = 0; i < IWL_POWER_MAX; i++) {
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cmd = &pow_data->pwr_range_0[i].cmd;
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for (i = 0; i < IWL_POWER_MAX; i++) {
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cmd = &pow_data->pwr_range_0[i].cmd;
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if (pci_pm & 0x1)
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cmd->flags &= ~IWL_POWER_PCI_PM_MSK;
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else
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cmd->flags |= IWL_POWER_PCI_PM_MSK;
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}
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if (pci_pm & PCI_CFG_LINK_CTRL_VAL_L0S_EN)
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cmd->flags &= ~IWL_POWER_PCI_PM_MSK;
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else
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cmd->flags |= IWL_POWER_PCI_PM_MSK;
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}
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return ret;
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return 0;
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}
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/* adjust power command according to dtim period and power level*/
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