sh: NO_CONTEXT ASID optimizations for SH-4 cache flush.
This optimizes for the cases when a CPU does not yet have a valid ASID context associated with it, as in this case there is no work for any of flush_cache_mm()/flush_cache_page()/flush_cache_range() to do. Based on the the MIPS implementation. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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@ -330,6 +330,9 @@ loop_exit:
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*/
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void flush_cache_mm(struct mm_struct *mm)
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{
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if (cpu_context(smp_processor_id(), mm) == NO_CONTEXT)
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return;
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/*
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* If cache is only 4k-per-way, there are never any 'aliases'. Since
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* the cache is physically tagged, the data can just be left in there.
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@ -371,6 +374,9 @@ void flush_cache_page(struct vm_area_struct *vma, unsigned long address,
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unsigned long phys = pfn << PAGE_SHIFT;
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unsigned int alias_mask;
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if (cpu_context(smp_processor_id(), vma->vm_mm) == NO_CONTEXT)
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return;
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alias_mask = boot_cpu_data.dcache.alias_mask;
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/* We only need to flush D-cache when we have alias */
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@ -413,6 +419,9 @@ void flush_cache_page(struct vm_area_struct *vma, unsigned long address,
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void flush_cache_range(struct vm_area_struct *vma, unsigned long start,
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unsigned long end)
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{
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if (cpu_context(smp_processor_id(), vma->vm_mm) == NO_CONTEXT)
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return;
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/*
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* If cache is only 4k-per-way, there are never any 'aliases'. Since
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* the cache is physically tagged, the data can just be left in there.
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