MIPS: cpu-probe: Fix VTLB/FTLB configuration for R6

R6 has dropped the MMUExtDef field from the config4 register and it
now returns 0. However, the return value means nothing in that case
and the only supported configuration for R6 is the VTLB+FTLB
(MMUextDef == 3). As a result, rework the code so that the correct
value is set for R6 cores.

Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/10651/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This commit is contained in:
Markos Chandras 2015-07-09 10:40:52 +01:00 коммит произвёл Ralf Baechle
Родитель 912708c26d
Коммит e87569cd6c
1 изменённых файлов: 10 добавлений и 1 удалений

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@ -546,7 +546,16 @@ static inline unsigned int decode_config4(struct cpuinfo_mips *c)
if (cpu_has_tlb) {
if (((config4 & MIPS_CONF4_IE) >> 29) == 2)
c->options |= MIPS_CPU_TLBINV;
mmuextdef = config4 & MIPS_CONF4_MMUEXTDEF;
/*
* This is a bit ugly. R6 has dropped that field from
* config4 and the only valid configuration is VTLB+FTLB so
* set a good value for mmuextdef for that case.
*/
if (cpu_has_mips_r6)
mmuextdef = MIPS_CONF4_MMUEXTDEF_VTLBSIZEEXT;
else
mmuextdef = config4 & MIPS_CONF4_MMUEXTDEF;
switch (mmuextdef) {
case MIPS_CONF4_MMUEXTDEF_MMUSIZEEXT:
c->tlbsize += (config4 & MIPS_CONF4_MMUSIZEEXT) * 0x40;