mtd: revert "spi-nor: intel: provide a range for poll_timout"
This change reverts aba3a882a178: "mtd: spi-nor: intel: provide a range for poll_timout". That change introduces a performance regression when reading sequentially from flash. Logging calls to intel_spi_read without this change we get: Start MTD read [ 20.045527] intel_spi_read(from=1800000, len=400000) [ 20.045527] intel_spi_read(from=1800000, len=400000) [ 282.199274] intel_spi_read(from=1c00000, len=400000) [ 282.199274] intel_spi_read(from=1c00000, len=400000) [ 544.351528] intel_spi_read(from=2000000, len=400000) [ 544.351528] intel_spi_read(from=2000000, len=400000) End MTD read With this change: Start MTD read [ 21.942922] intel_spi_read(from=1c00000, len=400000) [ 21.942922] intel_spi_read(from=1c00000, len=400000) [ 23.784058] intel_spi_read(from=2000000, len=400000) [ 23.784058] intel_spi_read(from=2000000, len=400000) [ 25.625006] intel_spi_read(from=2400000, len=400000) [ 25.625006] intel_spi_read(from=2400000, len=400000) End MTD read Signed-off-by: Luis Alberto Herrera <luisalberto@google.com> Tested-by: Alexander Sverdlin <alexander.sverdlin@gmail.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Link: https://lore.kernel.org/r/20200610224652.64336-1-luisalberto@google.com Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
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@ -292,7 +292,7 @@ static int intel_spi_wait_hw_busy(struct intel_spi *ispi)
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u32 val;
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return readl_poll_timeout(ispi->base + HSFSTS_CTL, val,
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!(val & HSFSTS_CTL_SCIP), 40,
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!(val & HSFSTS_CTL_SCIP), 0,
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INTEL_SPI_TIMEOUT * 1000);
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}
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@ -301,7 +301,7 @@ static int intel_spi_wait_sw_busy(struct intel_spi *ispi)
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u32 val;
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return readl_poll_timeout(ispi->sregs + SSFSTS_CTL, val,
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!(val & SSFSTS_CTL_SCIP), 40,
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!(val & SSFSTS_CTL_SCIP), 0,
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INTEL_SPI_TIMEOUT * 1000);
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}
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