[PATCH] hostap: Remove experimental PCI bus master/DMA code
PCI version of Prism2.5/3 has undocumented DMA support for TX/RX data, but this seems to have some hardware bugs that prevent it from being used properly for TX. RX side could possibly be made to work reliably. Even though DMA support would be very useful for saving host CPU (from about 40% to 5-10% when operating at maximum throughput), it seems to be best to just remove this code finally. The implementation has always been commented out by default and has received very limited testing. The code may have already been broken number of times and I don't have much interested in trying to verify whether it works or not. Getting this out makes it easier to maintain the driver and allows some cleanups that have been partly postponed because of this experimental bus master/DMA code. Signed-off-by: Jouni Malinen <jkmaline@cc.hut.fi> Signed-off-by: Jeff Garzik <jgarzik@pobox.com>
This commit is contained in:
Jouni Malinen
Jeff Garzik
Родитель
5bee720fd7
Коммит
ea3f1865f3
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@ -343,8 +343,8 @@ enum {
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PRISM2_PARAM_MONITOR_ALLOW_FCSERR = 16,
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PRISM2_PARAM_HOST_ENCRYPT = 17,
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PRISM2_PARAM_HOST_DECRYPT = 18,
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PRISM2_PARAM_BUS_MASTER_THRESHOLD_RX = 19,
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PRISM2_PARAM_BUS_MASTER_THRESHOLD_TX = 20,
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/* PRISM2_PARAM_BUS_MASTER_THRESHOLD_RX = 19, REMOVED 2005-08-14 */
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/* PRISM2_PARAM_BUS_MASTER_THRESHOLD_TX = 20, REMOVED 2005-08-14 */
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PRISM2_PARAM_HOST_ROAMING = 21,
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PRISM2_PARAM_BCRX_STA_KEY = 22,
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PRISM2_PARAM_IEEE_802_1X = 23,
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@ -13,37 +13,6 @@
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/* Maximum number of events handler per one interrupt */
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#define PRISM2_MAX_INTERRUPT_EVENTS 20
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/* Use PCI bus master to copy data to/from BAP (only available for
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* hostap_pci.o).
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*
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* Note! This is extremely experimental. PCI bus master is not supported by
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* Intersil and it seems to have some problems at least on TX path (see below).
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* The driver code for implementing bus master support is based on guessing
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* and experimenting suitable control bits and these might not be correct.
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* This code is included because using bus master makes a huge difference in
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* host CPU load (something like 40% host CPU usage to 5-10% when sending or
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* receiving at maximum throughput).
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*
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* Note2! Station firmware version 1.3.5 and primary firmware version 1.0.7
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* have some fixes for PCI corruption and these (or newer) versions are
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* recommended especially when using bus mastering.
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*
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* NOTE: PCI bus mastering code has not been updated for long time and it is
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* not likely to compile and it will _not_ work as is. Only enable this if you
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* are prepared to first fix the implementation..
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*/
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/* #define PRISM2_BUS_MASTER */
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#ifdef PRISM2_BUS_MASTER
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/* PCI bus master implementation seems to be broken in current
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* hardware/firmware versions. Enable this to use enable command to fix
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* something before starting bus master operation on TX path. This will add
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* some latency and an extra interrupt to each TX packet. */
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#define PRISM2_ENABLE_BEFORE_TX_BUS_MASTER
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#endif /* PRISM2_BUS_MASTER */
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/* Include code for downloading firmware images into volatile RAM. */
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#define PRISM2_DOWNLOAD_SUPPORT
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@ -83,18 +83,6 @@ static int dtim_period[MAX_PARM_DEVICES] = { 1, DEF_INTS };
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module_param_array(dtim_period, int, NULL, 0444);
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MODULE_PARM_DESC(dtim_period, "DTIM period");
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#if defined(PRISM2_PCI) && defined(PRISM2_BUS_MASTER)
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static int bus_master_threshold_rx[MAX_PARM_DEVICES] = { 100, DEF_INTS };
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module_param_array(bus_master_threshold_rx, int, NULL, 0444);
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MODULE_PARM_DESC(bus_master_threshold_rx, "Packet length threshold for using "
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"PCI bus master on RX");
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static int bus_master_threshold_tx[MAX_PARM_DEVICES] = { 100, DEF_INTS };
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module_param_array(bus_master_threshold_tx, int, NULL, 0444);
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MODULE_PARM_DESC(bus_master_threshold_tx, "Packet length threshold for using "
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"PCI bus master on TX");
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#endif /* PRISM2_PCI and PRISM2_BUS_MASTER */
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static char dev_template[16] = "wlan%d";
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module_param_string(dev_template, dev_template, sizeof(dev_template), 0444);
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MODULE_PARM_DESC(dev_template, "Prefix for network device name (default: "
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@ -107,12 +95,6 @@ MODULE_PARM_DESC(dev_template, "Prefix for network device name (default: "
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#define EXTRA_EVENTS_WTERR HFA384X_EV_WTERR
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#endif
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#if defined(PRISM2_PCI) && defined(PRISM2_BUS_MASTER)
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#define EXTRA_EVENTS_BUS_MASTER (HFA384X_EV_PCI_M0 | HFA384X_EV_PCI_M1)
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#else
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#define EXTRA_EVENTS_BUS_MASTER 0
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#endif
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/* Events that will be using BAP0 */
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#define HFA384X_BAP0_EVENTS \
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(HFA384X_EV_TXEXC | HFA384X_EV_RX | HFA384X_EV_INFO | HFA384X_EV_TX)
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@ -121,7 +103,7 @@ MODULE_PARM_DESC(dev_template, "Prefix for network device name (default: "
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#define HFA384X_EVENT_MASK \
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(HFA384X_BAP0_EVENTS | HFA384X_EV_ALLOC | HFA384X_EV_INFDROP | \
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HFA384X_EV_CMD | HFA384X_EV_TICK | \
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EXTRA_EVENTS_WTERR | EXTRA_EVENTS_BUS_MASTER)
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EXTRA_EVENTS_WTERR)
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/* Default TX control flags: use 802.11 headers and request interrupt for
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* failed transmits. Frames that request ACK callback, will add
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@ -1827,34 +1809,6 @@ static int prism2_transmit(struct net_device *dev, int idx)
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}
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#if defined(PRISM2_PCI) && defined(PRISM2_BUS_MASTER)
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/* Called only from hardware IRQ */
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static void prism2_tx_cb(struct net_device *dev, void *context,
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u16 resp0, u16 res)
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{
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struct hostap_interface *iface;
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local_info_t *local;
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unsigned long addr;
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int buf_len = (int) context;
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iface = netdev_priv(dev);
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local = iface->local;
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if (res) {
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printk(KERN_DEBUG "%s: prism2_tx_cb - res=0x%02x\n",
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dev->name, res);
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return;
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}
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addr = virt_to_phys(local->bus_m0_buf);
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HFA384X_OUTW((addr & 0xffff0000) >> 16, HFA384X_PCI_M0_ADDRH_OFF);
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HFA384X_OUTW(addr & 0x0000ffff, HFA384X_PCI_M0_ADDRL_OFF);
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HFA384X_OUTW(buf_len / 2, HFA384X_PCI_M0_LEN_OFF);
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HFA384X_OUTW(HFA384X_PCI_CTL_TO_BAP, HFA384X_PCI_M0_CTL_OFF);
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}
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#endif /* PRISM2_PCI and PRISM2_BUS_MASTER */
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/* Send IEEE 802.11 frame (convert the header into Prism2 TX descriptor and
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* send the payload with this descriptor) */
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/* Called only from software IRQ */
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@ -1920,53 +1874,6 @@ static int prism2_tx_80211(struct sk_buff *skb, struct net_device *dev)
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spin_lock(&local->baplock);
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res = hfa384x_setup_bap(dev, BAP0, local->txfid[idx], 0);
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#if defined(PRISM2_PCI) && defined(PRISM2_BUS_MASTER)
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if (!res && skb->len >= local->bus_master_threshold_tx) {
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u8 *pos;
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int buf_len;
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local->bus_m0_tx_idx = idx;
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/* FIX: BAP0 should be locked during bus master transfer, but
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* baplock with BH's disabled is not OK for this; netif queue
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* stopping is not enough since BAP0 is used also for RID
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* read/write */
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/* stop the queue for the time that bus mastering on BAP0 is
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* in use */
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netif_stop_queue(dev);
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spin_unlock(&local->baplock);
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/* Copy frame data to bus_m0_buf */
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pos = local->bus_m0_buf;
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memcpy(pos, &txdesc, sizeof(txdesc));
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pos += sizeof(txdesc);
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memcpy(pos, skb->data + hdr_len, skb->len - hdr_len);
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pos += skb->len - hdr_len;
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buf_len = pos - local->bus_m0_buf;
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if (buf_len & 1)
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buf_len++;
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#ifdef PRISM2_ENABLE_BEFORE_TX_BUS_MASTER
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/* Any RX packet seems to break something with TX bus
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* mastering; enable command is enough to fix this.. */
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if (hfa384x_cmd_callback(dev, HFA384X_CMDCODE_ENABLE, 0,
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prism2_tx_cb, (long) buf_len)) {
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printk(KERN_DEBUG "%s: TX: enable port0 failed\n",
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dev->name);
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}
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#else /* PRISM2_ENABLE_BEFORE_TX_BUS_MASTER */
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prism2_tx_cb(dev, (void *) buf_len, 0, 0);
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#endif /* PRISM2_ENABLE_BEFORE_TX_BUS_MASTER */
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/* Bus master transfer will be started from command completion
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* event handler and TX handling will be finished by calling
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* prism2_transmit() from bus master event handler */
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goto tx_stats;
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}
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#endif /* PRISM2_PCI and PRISM2_BUS_MASTER */
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if (!res)
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res = hfa384x_to_bap(dev, BAP0, &txdesc, sizeof(txdesc));
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if (!res)
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@ -2107,50 +2014,18 @@ static void prism2_rx(local_info_t *local)
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skb->dev = dev;
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memcpy(skb_put(skb, hdr_len), &rxdesc, hdr_len);
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#if defined(PRISM2_PCI) && defined(PRISM2_BUS_MASTER)
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if (len >= local->bus_master_threshold_rx) {
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unsigned long addr;
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hfa384x_events_no_bap1(dev);
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local->rx_skb = skb;
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/* Internal BAP0 offset points to the byte following rxdesc;
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* copy rest of the data using bus master */
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addr = virt_to_phys(skb_put(skb, len));
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HFA384X_OUTW((addr & 0xffff0000) >> 16,
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HFA384X_PCI_M0_ADDRH_OFF);
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HFA384X_OUTW(addr & 0x0000ffff, HFA384X_PCI_M0_ADDRL_OFF);
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if (len & 1)
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len++;
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HFA384X_OUTW(len / 2, HFA384X_PCI_M0_LEN_OFF);
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HFA384X_OUTW(HFA384X_PCI_CTL_FROM_BAP, HFA384X_PCI_M0_CTL_OFF);
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/* pci_bus_m1 event will be generated when data transfer is
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* complete and the frame will then be added to rx_list and
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* rx_tasklet is scheduled */
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rx_pending = 1;
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/* Have to release baplock before returning, although BAP0
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* should really not be used before DMA transfer has been
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* completed. */
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spin_unlock(&local->baplock);
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} else
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#endif /* PRISM2_PCI and PRISM2_BUS_MASTER */
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{
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if (len > 0)
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res = hfa384x_from_bap(dev, BAP0, skb_put(skb, len),
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len);
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spin_unlock(&local->baplock);
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if (res) {
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printk(KERN_DEBUG "%s: RX failed to read "
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"frame data\n", dev->name);
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goto rx_dropped;
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}
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skb_queue_tail(&local->rx_list, skb);
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tasklet_schedule(&local->rx_tasklet);
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if (len > 0)
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res = hfa384x_from_bap(dev, BAP0, skb_put(skb, len), len);
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spin_unlock(&local->baplock);
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if (res) {
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printk(KERN_DEBUG "%s: RX failed to read "
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"frame data\n", dev->name);
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goto rx_dropped;
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}
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skb_queue_tail(&local->rx_list, skb);
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tasklet_schedule(&local->rx_tasklet);
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rx_exit:
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prism2_callback(local, PRISM2_CALLBACK_RX_END);
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if (!rx_pending) {
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@ -2654,36 +2529,6 @@ static void hostap_bap_tasklet(unsigned long data)
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}
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#if defined(PRISM2_PCI) && defined(PRISM2_BUS_MASTER)
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/* Called only from hardware IRQ */
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static void prism2_bus_master_ev(struct net_device *dev, int bap)
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{
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struct hostap_interface *iface;
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local_info_t *local;
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iface = netdev_priv(dev);
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local = iface->local;
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if (bap == BAP1) {
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/* FIX: frame payload was DMA'd to skb->data; might need to
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* invalidate data cache for that memory area */
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skb_queue_tail(&local->rx_list, local->rx_skb);
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tasklet_schedule(&local->rx_tasklet);
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HFA384X_OUTW(HFA384X_EV_RX, HFA384X_EVACK_OFF);
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} else {
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if (prism2_transmit(dev, local->bus_m0_tx_idx)) {
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printk(KERN_DEBUG "%s: prism2_transmit() failed "
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"when called from bus master event\n",
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dev->name);
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local->intransmitfid[local->bus_m0_tx_idx] =
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PRISM2_TXFID_EMPTY;
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schedule_work(&local->reset_queue);
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}
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}
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}
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#endif /* PRISM2_PCI and PRISM2_BUS_MASTER */
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/* Called only from hardware IRQ */
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static void prism2_infdrop(struct net_device *dev)
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{
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@ -2852,21 +2697,6 @@ static irqreturn_t prism2_interrupt(int irq, void *dev_id, struct pt_regs *regs)
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HFA384X_OUTW(HFA384X_EV_TICK, HFA384X_EVACK_OFF);
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}
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#if defined(PRISM2_PCI) && defined(PRISM2_BUS_MASTER)
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if (ev & HFA384X_EV_PCI_M0) {
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prism2_bus_master_ev(dev, BAP0);
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HFA384X_OUTW(HFA384X_EV_PCI_M0, HFA384X_EVACK_OFF);
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}
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if (ev & HFA384X_EV_PCI_M1) {
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/* previous RX has been copied can be ACKed now */
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HFA384X_OUTW(HFA384X_EV_RX, HFA384X_EVACK_OFF);
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prism2_bus_master_ev(dev, BAP1);
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HFA384X_OUTW(HFA384X_EV_PCI_M1, HFA384X_EVACK_OFF);
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}
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#endif /* PRISM2_PCI and PRISM2_BUS_MASTER */
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|
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if (ev & HFA384X_EV_ALLOC) {
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prism2_alloc_ev(dev);
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HFA384X_OUTW(HFA384X_EV_ALLOC, HFA384X_EVACK_OFF);
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@ -3309,13 +3139,6 @@ prism2_init_local_data(struct prism2_helper_functions *funcs, int card_idx,
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local->io_debug_enabled = 1;
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#endif /* PRISM2_IO_DEBUG */
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#if defined(PRISM2_PCI) && defined(PRISM2_BUS_MASTER)
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local->bus_m0_buf = (u8 *) kmalloc(sizeof(struct hfa384x_tx_frame) +
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PRISM2_DATA_MAXLEN, GFP_DMA);
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if (local->bus_m0_buf == NULL)
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goto fail;
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#endif /* PRISM2_PCI and PRISM2_BUS_MASTER */
|
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local->func = funcs;
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local->func->cmd = hfa384x_cmd;
|
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local->func->read_regs = hfa384x_read_regs;
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|
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@ -3376,12 +3199,6 @@ prism2_init_local_data(struct prism2_helper_functions *funcs, int card_idx,
|
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local->auth_algs = PRISM2_AUTH_OPEN | PRISM2_AUTH_SHARED_KEY;
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local->sram_type = -1;
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local->scan_channel_mask = 0xffff;
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#if defined(PRISM2_PCI) && defined(PRISM2_BUS_MASTER)
|
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local->bus_master_threshold_rx = GET_INT_PARM(bus_master_threshold_rx,
|
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card_idx);
|
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local->bus_master_threshold_tx = GET_INT_PARM(bus_master_threshold_tx,
|
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card_idx);
|
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#endif /* PRISM2_PCI and PRISM2_BUS_MASTER */
|
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|
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/* Initialize task queue structures */
|
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INIT_WORK(&local->reset_queue, handle_reset_queue, local);
|
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|
|
@ -3462,9 +3279,6 @@ while (0)
|
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return dev;
|
||||
|
||||
fail:
|
||||
#if defined(PRISM2_PCI) && defined(PRISM2_BUS_MASTER)
|
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kfree(local->bus_m0_buf);
|
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#endif /* PRISM2_PCI and PRISM2_BUS_MASTER */
|
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free_netdev(dev);
|
||||
return NULL;
|
||||
}
|
||||
|
|
@ -3586,9 +3400,6 @@ static void prism2_free_local_data(struct net_device *dev)
|
|||
kfree(bss);
|
||||
}
|
||||
|
||||
#if defined(PRISM2_PCI) && defined(PRISM2_BUS_MASTER)
|
||||
kfree(local->bus_m0_buf);
|
||||
#endif /* PRISM2_PCI and PRISM2_BUS_MASTER */
|
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kfree(local->pda);
|
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kfree(local->last_scan_results);
|
||||
kfree(local->generic_elem);
|
||||
|
|
|
|||
|
|
@ -2239,14 +2239,6 @@ static const struct iw_priv_args prism2_priv[] = {
|
|||
IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, 0, "host_decrypt" },
|
||||
{ PRISM2_PARAM_HOST_DECRYPT,
|
||||
0, IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, "gethost_decrypt" },
|
||||
{ PRISM2_PARAM_BUS_MASTER_THRESHOLD_RX,
|
||||
IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, 0, "busmaster_rx" },
|
||||
{ PRISM2_PARAM_BUS_MASTER_THRESHOLD_RX,
|
||||
0, IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, "getbusmaster_rx" },
|
||||
{ PRISM2_PARAM_BUS_MASTER_THRESHOLD_TX,
|
||||
IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, 0, "busmaster_tx" },
|
||||
{ PRISM2_PARAM_BUS_MASTER_THRESHOLD_TX,
|
||||
0, IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, "getbusmaster_tx" },
|
||||
#ifndef PRISM2_NO_STATION_MODES
|
||||
{ PRISM2_PARAM_HOST_ROAMING,
|
||||
IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, 0, "host_roaming" },
|
||||
|
|
@ -2495,14 +2487,6 @@ static int prism2_ioctl_priv_prism2_param(struct net_device *dev,
|
|||
ret = -EINVAL;
|
||||
break;
|
||||
|
||||
case PRISM2_PARAM_BUS_MASTER_THRESHOLD_RX:
|
||||
local->bus_master_threshold_rx = value;
|
||||
break;
|
||||
|
||||
case PRISM2_PARAM_BUS_MASTER_THRESHOLD_TX:
|
||||
local->bus_master_threshold_tx = value;
|
||||
break;
|
||||
|
||||
#ifndef PRISM2_NO_STATION_MODES
|
||||
case PRISM2_PARAM_HOST_ROAMING:
|
||||
if (value < 0 || value > 2) {
|
||||
|
|
@ -2799,14 +2783,6 @@ static int prism2_ioctl_priv_get_prism2_param(struct net_device *dev,
|
|||
*param = local->host_decrypt;
|
||||
break;
|
||||
|
||||
case PRISM2_PARAM_BUS_MASTER_THRESHOLD_RX:
|
||||
*param = local->bus_master_threshold_rx;
|
||||
break;
|
||||
|
||||
case PRISM2_PARAM_BUS_MASTER_THRESHOLD_TX:
|
||||
*param = local->bus_master_threshold_tx;
|
||||
break;
|
||||
|
||||
case PRISM2_PARAM_HOST_ROAMING:
|
||||
*param = local->host_roaming;
|
||||
break;
|
||||
|
|
|
|||
|
|
@ -305,10 +305,6 @@ static int prism2_pci_probe(struct pci_dev *pdev,
|
|||
goto fail;
|
||||
}
|
||||
|
||||
#ifdef PRISM2_BUS_MASTER
|
||||
pci_set_master(pdev);
|
||||
#endif /* PRISM2_BUS_MASTER */
|
||||
|
||||
dev = prism2_init_local_data(&prism2_pci_funcs, cards_found,
|
||||
&pdev->dev);
|
||||
if (dev == NULL)
|
||||
|
|
|
|||
|
|
@ -787,10 +787,6 @@ struct local_info {
|
|||
|
||||
struct prism2_helper_functions *func;
|
||||
|
||||
int bus_master_threshold_tx;
|
||||
int bus_master_threshold_rx;
|
||||
u8 *bus_m1_buf;
|
||||
|
||||
u8 *pda;
|
||||
int fw_ap;
|
||||
#define PRISM2_FW_VER(major, minor, variant) \
|
||||
|
|
@ -897,14 +893,6 @@ struct local_info {
|
|||
|
||||
#ifdef PRISM2_PCI
|
||||
void __iomem *mem_start;
|
||||
#ifdef PRISM2_BUS_MASTER
|
||||
/* bus master for BAP0 (TX) */
|
||||
int bus_m0_tx_idx;
|
||||
u8 *bus_m0_buf;
|
||||
|
||||
/* bus master for BAP1 (RX) */
|
||||
struct sk_buff *rx_skb;
|
||||
#endif /* PRISM2_BUS_MASTER */
|
||||
#endif /* PRISM2_PCI */
|
||||
|
||||
/* NOTE! Do not add common entries here after hardware version
|
||||
|
|
|
|||
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