nvmet: add metadata/T10-PI support
Expose the namespace metadata format when PI is enabled. The user needs to enable the capability per subsystem and per port. The other metadata properties are taken from the namespace/bdev. Usage example: echo 1 > /config/nvmet/subsystems/${NAME}/attr_pi_enable echo 1 > /config/nvmet/ports/${PORT_NUM}/param_pi_enable Signed-off-by: Israel Rukshin <israelr@mellanox.com> Signed-off-by: Max Gurtovoy <maxg@mellanox.com> Reviewed-by: James Smart <james.smart@broadcom.com> Signed-off-by: Christoph Hellwig <hch@lst.de>
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Родитель
39481fbd14
Коммит
ea52ac1c66
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@ -341,6 +341,7 @@ static void nvmet_execute_identify_ctrl(struct nvmet_req *req)
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{
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struct nvmet_ctrl *ctrl = req->sq->ctrl;
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struct nvme_id_ctrl *id;
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u32 cmd_capsule_size;
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u16 status = 0;
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id = kzalloc(sizeof(*id), GFP_KERNEL);
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@ -433,9 +434,15 @@ static void nvmet_execute_identify_ctrl(struct nvmet_req *req)
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strlcpy(id->subnqn, ctrl->subsys->subsysnqn, sizeof(id->subnqn));
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/* Max command capsule size is sqe + single page of in-capsule data */
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id->ioccsz = cpu_to_le32((sizeof(struct nvme_command) +
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req->port->inline_data_size) / 16);
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/*
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* Max command capsule size is sqe + in-capsule data size.
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* Disable in-capsule data for Metadata capable controllers.
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*/
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cmd_capsule_size = sizeof(struct nvme_command);
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if (!ctrl->pi_support)
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cmd_capsule_size += req->port->inline_data_size;
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id->ioccsz = cpu_to_le32(cmd_capsule_size / 16);
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/* Max response capsule size is cqe */
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id->iorcsz = cpu_to_le32(sizeof(struct nvme_completion) / 16);
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@ -465,6 +472,7 @@ out:
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static void nvmet_execute_identify_ns(struct nvmet_req *req)
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{
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struct nvmet_ctrl *ctrl = req->sq->ctrl;
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struct nvmet_ns *ns;
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struct nvme_id_ns *id;
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u16 status = 0;
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@ -482,7 +490,7 @@ static void nvmet_execute_identify_ns(struct nvmet_req *req)
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}
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/* return an all zeroed buffer if we can't find an active namespace */
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ns = nvmet_find_namespace(req->sq->ctrl, req->cmd->identify.nsid);
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ns = nvmet_find_namespace(ctrl, req->cmd->identify.nsid);
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if (!ns)
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goto done;
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@ -523,6 +531,16 @@ static void nvmet_execute_identify_ns(struct nvmet_req *req)
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id->lbaf[0].ds = ns->blksize_shift;
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if (ctrl->pi_support && nvmet_ns_has_pi(ns)) {
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id->dpc = NVME_NS_DPC_PI_FIRST | NVME_NS_DPC_PI_LAST |
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NVME_NS_DPC_PI_TYPE1 | NVME_NS_DPC_PI_TYPE2 |
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NVME_NS_DPC_PI_TYPE3;
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id->mc = NVME_MC_EXTENDED_LBA;
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id->dps = ns->pi_type;
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id->flbas = NVME_NS_FLBAS_META_EXT;
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id->lbaf[0].ms = cpu_to_le16(ns->metadata_size);
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}
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if (ns->readonly)
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id->nsattr |= (1 << 0);
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nvmet_put_namespace(ns);
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@ -248,6 +248,36 @@ static ssize_t nvmet_param_inline_data_size_store(struct config_item *item,
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CONFIGFS_ATTR(nvmet_, param_inline_data_size);
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#ifdef CONFIG_BLK_DEV_INTEGRITY
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static ssize_t nvmet_param_pi_enable_show(struct config_item *item,
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char *page)
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{
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struct nvmet_port *port = to_nvmet_port(item);
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return snprintf(page, PAGE_SIZE, "%d\n", port->pi_enable);
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}
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static ssize_t nvmet_param_pi_enable_store(struct config_item *item,
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const char *page, size_t count)
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{
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struct nvmet_port *port = to_nvmet_port(item);
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bool val;
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if (strtobool(page, &val))
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return -EINVAL;
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if (port->enabled) {
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pr_err("Disable port before setting pi_enable value.\n");
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return -EACCES;
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}
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port->pi_enable = val;
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return count;
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}
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CONFIGFS_ATTR(nvmet_, param_pi_enable);
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#endif
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static ssize_t nvmet_addr_trtype_show(struct config_item *item,
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char *page)
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{
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@ -1010,6 +1040,28 @@ static ssize_t nvmet_subsys_attr_model_store(struct config_item *item,
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}
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CONFIGFS_ATTR(nvmet_subsys_, attr_model);
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#ifdef CONFIG_BLK_DEV_INTEGRITY
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static ssize_t nvmet_subsys_attr_pi_enable_show(struct config_item *item,
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char *page)
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{
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return snprintf(page, PAGE_SIZE, "%d\n", to_subsys(item)->pi_support);
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}
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static ssize_t nvmet_subsys_attr_pi_enable_store(struct config_item *item,
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const char *page, size_t count)
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{
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struct nvmet_subsys *subsys = to_subsys(item);
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bool pi_enable;
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if (strtobool(page, &pi_enable))
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return -EINVAL;
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subsys->pi_support = pi_enable;
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return count;
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}
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CONFIGFS_ATTR(nvmet_subsys_, attr_pi_enable);
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#endif
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static struct configfs_attribute *nvmet_subsys_attrs[] = {
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&nvmet_subsys_attr_attr_allow_any_host,
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&nvmet_subsys_attr_attr_version,
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@ -1017,6 +1069,9 @@ static struct configfs_attribute *nvmet_subsys_attrs[] = {
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&nvmet_subsys_attr_attr_cntlid_min,
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&nvmet_subsys_attr_attr_cntlid_max,
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&nvmet_subsys_attr_attr_model,
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#ifdef CONFIG_BLK_DEV_INTEGRITY
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&nvmet_subsys_attr_attr_pi_enable,
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#endif
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NULL,
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};
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@ -1316,6 +1371,9 @@ static struct configfs_attribute *nvmet_port_attrs[] = {
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&nvmet_attr_addr_trsvcid,
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&nvmet_attr_addr_trtype,
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&nvmet_attr_param_inline_data_size,
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#ifdef CONFIG_BLK_DEV_INTEGRITY
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&nvmet_attr_param_pi_enable,
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#endif
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NULL,
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};
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@ -323,12 +323,21 @@ int nvmet_enable_port(struct nvmet_port *port)
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if (!try_module_get(ops->owner))
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return -EINVAL;
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ret = ops->add_port(port);
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if (ret) {
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module_put(ops->owner);
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return ret;
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/*
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* If the user requested PI support and the transport isn't pi capable,
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* don't enable the port.
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*/
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if (port->pi_enable && !ops->metadata_support) {
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pr_err("T10-PI is not supported by transport type %d\n",
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port->disc_addr.trtype);
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ret = -EINVAL;
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goto out_put;
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}
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ret = ops->add_port(port);
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if (ret)
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goto out_put;
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/* If the transport didn't set inline_data_size, then disable it. */
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if (port->inline_data_size < 0)
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port->inline_data_size = 0;
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@ -336,6 +345,10 @@ int nvmet_enable_port(struct nvmet_port *port)
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port->enabled = true;
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port->tr_ops = ops;
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return 0;
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out_put:
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module_put(ops->owner);
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return ret;
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}
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void nvmet_disable_port(struct nvmet_port *port)
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@ -197,6 +197,8 @@ static void nvmet_execute_admin_connect(struct nvmet_req *req)
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goto out;
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}
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ctrl->pi_support = ctrl->port->pi_enable && ctrl->subsys->pi_support;
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uuid_copy(&ctrl->hostid, &d->hostid);
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status = nvmet_install_queue(ctrl, req);
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@ -205,8 +207,9 @@ static void nvmet_execute_admin_connect(struct nvmet_req *req)
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goto out;
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}
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pr_info("creating controller %d for subsystem %s for NQN %s.\n",
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ctrl->cntlid, ctrl->subsys->subsysnqn, ctrl->hostnqn);
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pr_info("creating controller %d for subsystem %s for NQN %s%s.\n",
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ctrl->cntlid, ctrl->subsys->subsysnqn, ctrl->hostnqn,
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ctrl->pi_support ? " T10-PI is enabled" : "");
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req->cqe->result.u16 = cpu_to_le16(ctrl->cntlid);
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out:
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@ -145,6 +145,7 @@ struct nvmet_port {
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bool enabled;
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int inline_data_size;
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const struct nvmet_fabrics_ops *tr_ops;
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bool pi_enable;
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};
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static inline struct nvmet_port *to_nvmet_port(struct config_item *item)
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@ -204,6 +205,7 @@ struct nvmet_ctrl {
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spinlock_t error_lock;
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u64 err_counter;
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struct nvme_error_slot slots[NVMET_ERROR_LOG_SLOTS];
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bool pi_support;
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};
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struct nvmet_subsys_model {
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@ -233,6 +235,7 @@ struct nvmet_subsys {
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u64 ver;
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u64 serial;
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char *subsysnqn;
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bool pi_support;
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struct config_group group;
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@ -284,6 +287,7 @@ struct nvmet_fabrics_ops {
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unsigned int type;
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unsigned int msdbd;
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bool has_keyed_sgls : 1;
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bool metadata_support : 1;
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void (*queue_response)(struct nvmet_req *req);
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int (*add_port)(struct nvmet_port *port);
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void (*remove_port)(struct nvmet_port *port);
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@ -511,6 +515,14 @@ static inline u32 nvmet_rw_data_len(struct nvmet_req *req)
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req->ns->blksize_shift;
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}
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static inline u32 nvmet_rw_metadata_len(struct nvmet_req *req)
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{
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if (!IS_ENABLED(CONFIG_BLK_DEV_INTEGRITY))
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return 0;
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return ((u32)le16_to_cpu(req->cmd->rw.length) + 1) *
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req->ns->metadata_size;
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}
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static inline u32 nvmet_dsm_len(struct nvmet_req *req)
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{
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return (le32_to_cpu(req->cmd->dsm.nr) + 1) *
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@ -525,4 +537,11 @@ static inline __le16 to0based(u32 a)
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return cpu_to_le16(max(1U, min(1U << 16, a)) - 1);
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}
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static inline bool nvmet_ns_has_pi(struct nvmet_ns *ns)
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{
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if (!IS_ENABLED(CONFIG_BLK_DEV_INTEGRITY))
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return false;
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return ns->pi_type && ns->metadata_size == sizeof(struct t10_pi_tuple);
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}
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#endif /* _NVMET_H */
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