net: stmmac: mmc: Add Frame Preemption counters on GMAC5+ cores
This can be useful for debug. Add these counters on GMAC5+ cores just like we did for XGMAC. Signed-off-by: Jose Abreu <Jose.Abreu@synopsys.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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@ -119,6 +119,13 @@
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#define MMC_RX_ICMP_GD_OCTETS 0x180
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#define MMC_RX_ICMP_ERR_OCTETS 0x184
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#define MMC_TX_FPE_FRAG 0x1a8
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#define MMC_TX_HOLD_REQ 0x1ac
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#define MMC_RX_PKT_ASSEMBLY_ERR 0x1c8
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#define MMC_RX_PKT_SMD_ERR 0x1cc
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#define MMC_RX_PKT_ASSEMBLY_OK 0x1d0
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#define MMC_RX_FPE_FRAG 0x1d4
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/* XGMAC MMC Registers */
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#define MMC_XGMAC_TX_OCTET_GB 0x14
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#define MMC_XGMAC_TX_PKT_GB 0x1c
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@ -315,6 +322,15 @@ static void dwmac_mmc_read(void __iomem *mmcaddr, struct stmmac_counters *mmc)
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mmc->mmc_rx_tcp_err_octets += readl(mmcaddr + MMC_RX_TCP_ERR_OCTETS);
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mmc->mmc_rx_icmp_gd_octets += readl(mmcaddr + MMC_RX_ICMP_GD_OCTETS);
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mmc->mmc_rx_icmp_err_octets += readl(mmcaddr + MMC_RX_ICMP_ERR_OCTETS);
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mmc->mmc_tx_fpe_fragment_cntr += readl(mmcaddr + MMC_TX_FPE_FRAG);
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mmc->mmc_tx_hold_req_cntr += readl(mmcaddr + MMC_TX_HOLD_REQ);
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mmc->mmc_rx_packet_assembly_err_cntr +=
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readl(mmcaddr + MMC_RX_PKT_ASSEMBLY_ERR);
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mmc->mmc_rx_packet_smd_err_cntr += readl(mmcaddr + MMC_RX_PKT_SMD_ERR);
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mmc->mmc_rx_packet_assembly_ok_cntr +=
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readl(mmcaddr + MMC_RX_PKT_ASSEMBLY_OK);
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mmc->mmc_rx_fpe_fragment_cntr += readl(mmcaddr + MMC_RX_FPE_FRAG);
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}
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const struct stmmac_mmc_ops dwmac_mmc_ops = {
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