MMC host:
- alcor: Stabilize data write requests - sdhci-omap: Fix command error path during tuning -----BEGIN PGP SIGNATURE----- iQJLBAABCgA1FiEEugLDXPmKSktSkQsV/iaEJXNYjCkFAlywfaUXHHVsZi5oYW5z c29uQGxpbmFyby5vcmcACgkQ/iaEJXNYjCmB0hAApomaOKmKsFHyFn5nQ2QM+UIr SFDG+m/zHZoJo4bbH3pIQ2/eXUMwQMWfsyvrfVci4dO/CGMRlNSdXr+to5+l8qZT CrfKbqGSoWA7nirqc4d4We1p1MSTycevc/fuNx4Gk777QI2t0CwMJF+fCkm30J6i JIAKrtn+0cCpPGQhhyPu1BHOKHXOtumcuFq+R6VmN30q6Ab6nN3MdNLusEwEu9CK 5766SEFttY3OQsydv/bsFNbR+W3MCrsfeU7epP4+CkSN+279IVElP9u8AQ/Tzu/5 bv7Q/v3J7a6jRYSscLtO3nEwxBKJfJd4+RoPM5BsjEb3niZiWs1hRFyGfJhX7r3A RuZCO9mvvSj9/O1s6UtXefAKlDYpLpTrxVzHttEsoXVXCaxehhEP49JVYc8JA7CC vwGjxbbMmdDcrAhOyJcfk31gQTzPmLesyEs+8IWsiehfxBTFqqrcKxgw3LAMjhjI 1+hgpURSD6bKzMO8dCZ8uXHFRGdJ7r0WkufayuiphP/MV91Ok+GVyL9EJOH8FeCM uuZy5mVHK8QnYfo8u0+4ABLCIRaHDOvDGMxrcrdvHN2yPan+m+lqwVLfca4BRXwq W8c4QRH4zSZu4uYswwTTQKhyyuG44P/vaxnxUpzg5n1ugv+9FTMTsFHXbLz7UH/l yr1PJJCz0wwTmp6Dkjo= =N8+A -----END PGP SIGNATURE----- Merge tag 'mmc-v5.1-rc2' of git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/mmc Pull MMC host fixes from Ulf Hansson: - alcor: Stabilize data write requests - sdhci-omap: Fix command error path during tuning * tag 'mmc-v5.1-rc2' of git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/mmc: mmc: sdhci-omap: Don't finish_mrq() on a command error during tuning mmc: alcor: don't write data before command has completed
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Коммит
ea951a943f
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@ -48,7 +48,6 @@ struct alcor_sdmmc_host {
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struct mmc_command *cmd;
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struct mmc_data *data;
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unsigned int dma_on:1;
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unsigned int early_data:1;
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struct mutex cmd_mutex;
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@ -144,8 +143,7 @@ static void alcor_data_set_dma(struct alcor_sdmmc_host *host)
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host->sg_count--;
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}
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static void alcor_trigger_data_transfer(struct alcor_sdmmc_host *host,
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bool early)
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static void alcor_trigger_data_transfer(struct alcor_sdmmc_host *host)
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{
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struct alcor_pci_priv *priv = host->alcor_pci;
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struct mmc_data *data = host->data;
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@ -155,13 +153,6 @@ static void alcor_trigger_data_transfer(struct alcor_sdmmc_host *host,
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ctrl |= AU6601_DATA_WRITE;
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if (data->host_cookie == COOKIE_MAPPED) {
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if (host->early_data) {
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host->early_data = false;
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return;
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}
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host->early_data = early;
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alcor_data_set_dma(host);
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ctrl |= AU6601_DATA_DMA_MODE;
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host->dma_on = 1;
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@ -231,6 +222,7 @@ static void alcor_prepare_sg_miter(struct alcor_sdmmc_host *host)
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static void alcor_prepare_data(struct alcor_sdmmc_host *host,
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struct mmc_command *cmd)
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{
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struct alcor_pci_priv *priv = host->alcor_pci;
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struct mmc_data *data = cmd->data;
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if (!data)
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@ -248,7 +240,7 @@ static void alcor_prepare_data(struct alcor_sdmmc_host *host,
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if (data->host_cookie != COOKIE_MAPPED)
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alcor_prepare_sg_miter(host);
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alcor_trigger_data_transfer(host, true);
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alcor_write8(priv, 0, AU6601_DATA_XFER_CTRL);
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}
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static void alcor_send_cmd(struct alcor_sdmmc_host *host,
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@ -435,7 +427,7 @@ static int alcor_cmd_irq_done(struct alcor_sdmmc_host *host, u32 intmask)
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if (!host->data)
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return false;
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alcor_trigger_data_transfer(host, false);
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alcor_trigger_data_transfer(host);
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host->cmd = NULL;
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return true;
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}
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@ -456,7 +448,7 @@ static void alcor_cmd_irq_thread(struct alcor_sdmmc_host *host, u32 intmask)
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if (!host->data)
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alcor_request_complete(host, 1);
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else
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alcor_trigger_data_transfer(host, false);
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alcor_trigger_data_transfer(host);
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host->cmd = NULL;
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}
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@ -487,15 +479,9 @@ static int alcor_data_irq_done(struct alcor_sdmmc_host *host, u32 intmask)
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break;
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case AU6601_INT_READ_BUF_RDY:
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alcor_trf_block_pio(host, true);
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if (!host->blocks)
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break;
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alcor_trigger_data_transfer(host, false);
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return 1;
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case AU6601_INT_WRITE_BUF_RDY:
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alcor_trf_block_pio(host, false);
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if (!host->blocks)
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break;
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alcor_trigger_data_transfer(host, false);
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return 1;
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case AU6601_INT_DMA_END:
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if (!host->sg_count)
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@ -508,8 +494,14 @@ static int alcor_data_irq_done(struct alcor_sdmmc_host *host, u32 intmask)
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break;
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}
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if (intmask & AU6601_INT_DATA_END)
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return 0;
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if (intmask & AU6601_INT_DATA_END) {
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if (!host->dma_on && host->blocks) {
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alcor_trigger_data_transfer(host);
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return 1;
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} else {
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return 0;
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}
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}
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return 1;
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}
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@ -797,6 +797,43 @@ void sdhci_omap_reset(struct sdhci_host *host, u8 mask)
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sdhci_reset(host, mask);
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}
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#define CMD_ERR_MASK (SDHCI_INT_CRC | SDHCI_INT_END_BIT | SDHCI_INT_INDEX |\
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SDHCI_INT_TIMEOUT)
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#define CMD_MASK (CMD_ERR_MASK | SDHCI_INT_RESPONSE)
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static u32 sdhci_omap_irq(struct sdhci_host *host, u32 intmask)
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{
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struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
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struct sdhci_omap_host *omap_host = sdhci_pltfm_priv(pltfm_host);
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if (omap_host->is_tuning && host->cmd && !host->data_early &&
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(intmask & CMD_ERR_MASK)) {
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/*
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* Since we are not resetting data lines during tuning
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* operation, data error or data complete interrupts
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* might still arrive. Mark this request as a failure
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* but still wait for the data interrupt
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*/
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if (intmask & SDHCI_INT_TIMEOUT)
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host->cmd->error = -ETIMEDOUT;
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else
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host->cmd->error = -EILSEQ;
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host->cmd = NULL;
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/*
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* Sometimes command error interrupts and command complete
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* interrupt will arrive together. Clear all command related
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* interrupts here.
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*/
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sdhci_writel(host, intmask & CMD_MASK, SDHCI_INT_STATUS);
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intmask &= ~CMD_MASK;
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}
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return intmask;
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}
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static struct sdhci_ops sdhci_omap_ops = {
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.set_clock = sdhci_omap_set_clock,
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.set_power = sdhci_omap_set_power,
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@ -807,6 +844,7 @@ static struct sdhci_ops sdhci_omap_ops = {
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.platform_send_init_74_clocks = sdhci_omap_init_74_clocks,
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.reset = sdhci_omap_reset,
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.set_uhs_signaling = sdhci_omap_set_uhs_signaling,
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.irq = sdhci_omap_irq,
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};
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static int sdhci_omap_set_capabilities(struct sdhci_omap_host *omap_host)
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