net: mvpp2: fix MVPP21_ISR_RXQ_GROUP_REG definition
The MVPP21_ISR_RXQ_GROUP_REG register is not indexed by rxq, but by port, so we fix the parameter name accordingly. There are no functional changes. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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@ -185,7 +185,7 @@
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/* Interrupt Cause and Mask registers */
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#define MVPP2_ISR_RX_THRESHOLD_REG(rxq) (0x5200 + 4 * (rxq))
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#define MVPP2_MAX_ISR_RX_THRESHOLD 0xfffff0
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#define MVPP21_ISR_RXQ_GROUP_REG(rxq) (0x5400 + 4 * (rxq))
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#define MVPP21_ISR_RXQ_GROUP_REG(port) (0x5400 + 4 * (port))
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#define MVPP22_ISR_RXQ_GROUP_INDEX_REG 0x5400
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#define MVPP22_ISR_RXQ_GROUP_INDEX_SUBGROUP_MASK 0xf
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