8250: add support for ASIX devices with a FIFO bug
Information and a different patch provided by <donald@asix.com.tw>. We do it a little differently to keep the modularity and to avoid playing with RLSI. We add a new uart bug for the parity flaw and set it in the pci matches. If parity check is enabled then we drop the FIFO trigger to 1 as per the Asix reference code. Signed-off-by: Alan Cox <alan@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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@ -2202,6 +2202,7 @@ serial8250_do_set_termios(struct uart_port *port, struct ktermios *termios,
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unsigned char cval, fcr = 0;
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unsigned long flags;
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unsigned int baud, quot;
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int fifo_bug = 0;
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switch (termios->c_cflag & CSIZE) {
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case CS5:
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@ -2221,8 +2222,11 @@ serial8250_do_set_termios(struct uart_port *port, struct ktermios *termios,
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if (termios->c_cflag & CSTOPB)
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cval |= UART_LCR_STOP;
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if (termios->c_cflag & PARENB)
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if (termios->c_cflag & PARENB) {
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cval |= UART_LCR_PARITY;
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if (up->bugs & UART_BUG_PARITY)
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fifo_bug = 1;
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}
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if (!(termios->c_cflag & PARODD))
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cval |= UART_LCR_EPAR;
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#ifdef CMSPAR
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@ -2246,7 +2250,7 @@ serial8250_do_set_termios(struct uart_port *port, struct ktermios *termios,
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if (up->capabilities & UART_CAP_FIFO && port->fifosize > 1) {
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fcr = uart_config[port->type].fcr;
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if (baud < 2400) {
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if (baud < 2400 || fifo_bug) {
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fcr &= ~UART_FCR_TRIGGER_MASK;
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fcr |= UART_FCR_TRIGGER_1;
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}
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@ -78,6 +78,7 @@ struct serial8250_config {
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#define UART_BUG_TXEN (1 << 1) /* UART has buggy TX IIR status */
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#define UART_BUG_NOMSR (1 << 2) /* UART has buggy MSR status bits (Au1x00) */
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#define UART_BUG_THRE (1 << 3) /* UART has buggy THRE reassertion */
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#define UART_BUG_PARITY (1 << 4) /* UART mishandles parity if FIFO enabled */
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#define PROBE_RSA (1 << 0)
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#define PROBE_ANY (~0)
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@ -1032,8 +1032,15 @@ static int pci_oxsemi_tornado_init(struct pci_dev *dev)
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return number_uarts;
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}
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static int
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pci_default_setup(struct serial_private *priv,
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static int pci_asix_setup(struct serial_private *priv,
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const struct pciserial_board *board,
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struct uart_8250_port *port, int idx)
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{
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port->bugs |= UART_BUG_PARITY;
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return pci_default_setup(priv, board, port, idx);
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}
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static int pci_default_setup(struct serial_private *priv,
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const struct pciserial_board *board,
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struct uart_8250_port *port, int idx)
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{
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@ -1187,6 +1194,7 @@ pci_xr17c154_setup(struct serial_private *priv,
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#define PCIE_DEVICE_ID_NEO_2_OX_IBM 0x00F6
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#define PCI_DEVICE_ID_PLX_CRONYX_OMEGA 0xc001
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#define PCI_DEVICE_ID_INTEL_PATSBURG_KT 0x1d3d
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#define PCI_VENDOR_ID_ASIX 0x9710
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/* Unknown vendors/cards - this should not be in linux/pci_ids.h */
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#define PCI_SUBDEVICE_ID_UNKNOWN_0x1584 0x1584
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@ -1727,6 +1735,16 @@ static struct pci_serial_quirk pci_serial_quirks[] __refdata = {
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.subdevice = PCI_ANY_ID,
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.setup = pci_omegapci_setup,
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},
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/*
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* ASIX devices with FIFO bug
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*/
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{
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.vendor = PCI_VENDOR_ID_ASIX,
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.device = PCI_ANY_ID,
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.subvendor = PCI_ANY_ID,
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.subdevice = PCI_ANY_ID,
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.setup = pci_asix_setup,
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},
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/*
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* Default "match everything" terminator entry
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*/
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