Third Round of Renesas ARM Based SoC DT Updates for v4.1
* Add DMA sound support to r8a7791 and r8a7790 SoCs -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABAgAGBQJVCjAmAAoJENfPZGlqN0++MUQP/1UpGEQL24g+K7DIQGm0Bd3v 0g7498uoOjmUTGvtvamGftTIxSzXaymhqIUwqPtJB1vm4MGVdYq9By9iCNSU2vDJ CroJdeNel6H9wuacD7alMuRO+HI8iu4fhyq8QEEUOqHuQWyxyOQ9HlK/eA8DnE/4 7NMGiLGZ/aBp7ktXgiHzqfRRb5PAuE45BBdd4XjucM9GxDiKaqPIJ1kpSHfd8dbt 1SSNLor0Xuu9znss+GWo7XDV3PqbIJ4k54WS/HmgiW22xuamvD5vmEIdXEx7H/wu sGqVApkOGIJLqtELb6Mf72p6X/9DxpDwyq7zy8WzZQ4q3e5h66RV6eTdOutqRbko 5FYPNmg37gNOvClOYuAjaj5lP0e7ucce3LdBRIbbWTS+44dnngFjIlVD5XE669go PwMLScDGEoOkLfNUkHMexfv9Y2Chb2xadwk9Da+Jec03jU/vwRD0KHMEb+//w3GZ CM/gVXPJSxb0v7x64vbKug1Wqv165UFQKCzeumYaKLfHLl0NyXP3Z4wqZlSu1+7Y 06DWm16l4EnM9g5HpQ0B+SFmlKLxf+45t2R/HX1vNLLdzLtQtePHlmTQhg/OHa+q PvdH0JpJk6+uJCTJ6ctdZpF2/pggXg0wPdxvI/daumPXQKaO+PeKBouKQEbgT0BE /oVxjbkME1Ah9ygJFxks =j+iC -----END PGP SIGNATURE----- Merge tag 'renesas-dt3-for-v4.1' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt Merge "Third Round of Renesas ARM Based SoC DT Updates for v4.1" from Simon Horman: * Add DMA sound support to r8a7791 and r8a7790 SoCs * tag 'renesas-dt3-for-v4.1' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: ARM: shmobile: r8a7791: sound enables Audio DMAC entry on DTSI ARM: shmobile: r8a7790: sound enables Audio DMAC entry on DTSI ARM: shmobile: r8a7791: enable Audio DMAC peri peri via sound driver ARM: shmobile: r8a7790: enable Audio DMAC peri peri via sound driver ARM: shmobile: r8a7791: add reg-names for sound ARM: shmobile: r8a7790: add reg-names for sound Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
Коммит
ebdf8cc000
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@ -370,13 +370,6 @@
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dma-channels = <13>;
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};
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audmapp: dma-controller@ec740000 {
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compatible = "renesas,rcar-audmapp";
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#dma-cells = <1>;
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reg = <0 0xec740000 0 0x200>;
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};
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i2c0: i2c@e6508000 {
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#address-cells = <1>;
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#size-cells = <0>;
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@ -1460,7 +1453,10 @@
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reg = <0 0xec500000 0 0x1000>, /* SCU */
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<0 0xec5a0000 0 0x100>, /* ADG */
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<0 0xec540000 0 0x1000>, /* SSIU */
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<0 0xec541000 0 0x1280>; /* SSI */
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<0 0xec541000 0 0x1280>, /* SSI */
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<0 0xec740000 0 0x200>; /* Audio DMAC peri peri*/
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reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
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clocks = <&mstp10_clks R8A7790_CLK_SSI_ALL>,
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<&mstp10_clks R8A7790_CLK_SSI9>, <&mstp10_clks R8A7790_CLK_SSI8>,
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<&mstp10_clks R8A7790_CLK_SSI7>, <&mstp10_clks R8A7790_CLK_SSI6>,
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@ -1485,34 +1481,120 @@
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status = "disabled";
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rcar_sound,dvc {
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dvc0: dvc@0 { };
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dvc1: dvc@1 { };
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dvc0: dvc@0 {
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dmas = <&audma0 0xbc>;
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dma-names = "tx";
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};
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dvc1: dvc@1 {
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dmas = <&audma0 0xbe>;
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dma-names = "tx";
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};
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};
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rcar_sound,src {
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src0: src@0 { interrupts = <0 352 IRQ_TYPE_LEVEL_HIGH>; };
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src1: src@1 { interrupts = <0 353 IRQ_TYPE_LEVEL_HIGH>; };
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src2: src@2 { interrupts = <0 354 IRQ_TYPE_LEVEL_HIGH>; };
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src3: src@3 { interrupts = <0 355 IRQ_TYPE_LEVEL_HIGH>; };
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src4: src@4 { interrupts = <0 356 IRQ_TYPE_LEVEL_HIGH>; };
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src5: src@5 { interrupts = <0 357 IRQ_TYPE_LEVEL_HIGH>; };
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src6: src@6 { interrupts = <0 358 IRQ_TYPE_LEVEL_HIGH>; };
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src7: src@7 { interrupts = <0 359 IRQ_TYPE_LEVEL_HIGH>; };
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src8: src@8 { interrupts = <0 360 IRQ_TYPE_LEVEL_HIGH>; };
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src9: src@9 { interrupts = <0 361 IRQ_TYPE_LEVEL_HIGH>; };
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src0: src@0 {
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interrupts = <0 352 IRQ_TYPE_LEVEL_HIGH>;
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dmas = <&audma0 0x85>, <&audma1 0x9a>;
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dma-names = "rx", "tx";
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};
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src1: src@1 {
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interrupts = <0 353 IRQ_TYPE_LEVEL_HIGH>;
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dmas = <&audma0 0x87>, <&audma1 0x9c>;
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dma-names = "rx", "tx";
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};
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src2: src@2 {
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interrupts = <0 354 IRQ_TYPE_LEVEL_HIGH>;
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dmas = <&audma0 0x89>, <&audma1 0x9e>;
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dma-names = "rx", "tx";
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};
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src3: src@3 {
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interrupts = <0 355 IRQ_TYPE_LEVEL_HIGH>;
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dmas = <&audma0 0x8b>, <&audma1 0xa0>;
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dma-names = "rx", "tx";
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};
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src4: src@4 {
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interrupts = <0 356 IRQ_TYPE_LEVEL_HIGH>;
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dmas = <&audma0 0x8d>, <&audma1 0xb0>;
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dma-names = "rx", "tx";
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};
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src5: src@5 {
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interrupts = <0 357 IRQ_TYPE_LEVEL_HIGH>;
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dmas = <&audma0 0x8f>, <&audma1 0xb2>;
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dma-names = "rx", "tx";
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};
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src6: src@6 {
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interrupts = <0 358 IRQ_TYPE_LEVEL_HIGH>;
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dmas = <&audma0 0x91>, <&audma1 0xb4>;
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dma-names = "rx", "tx";
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};
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src7: src@7 {
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interrupts = <0 359 IRQ_TYPE_LEVEL_HIGH>;
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dmas = <&audma0 0x93>, <&audma1 0xb6>;
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dma-names = "rx", "tx";
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};
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src8: src@8 {
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interrupts = <0 360 IRQ_TYPE_LEVEL_HIGH>;
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dmas = <&audma0 0x95>, <&audma1 0xb8>;
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dma-names = "rx", "tx";
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};
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src9: src@9 {
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interrupts = <0 361 IRQ_TYPE_LEVEL_HIGH>;
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dmas = <&audma0 0x97>, <&audma1 0xba>;
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dma-names = "rx", "tx";
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};
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};
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rcar_sound,ssi {
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ssi0: ssi@0 { interrupts = <0 370 IRQ_TYPE_LEVEL_HIGH>; };
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ssi1: ssi@1 { interrupts = <0 371 IRQ_TYPE_LEVEL_HIGH>; };
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ssi2: ssi@2 { interrupts = <0 372 IRQ_TYPE_LEVEL_HIGH>; };
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ssi3: ssi@3 { interrupts = <0 373 IRQ_TYPE_LEVEL_HIGH>; };
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ssi4: ssi@4 { interrupts = <0 374 IRQ_TYPE_LEVEL_HIGH>; };
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ssi5: ssi@5 { interrupts = <0 375 IRQ_TYPE_LEVEL_HIGH>; };
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ssi6: ssi@6 { interrupts = <0 376 IRQ_TYPE_LEVEL_HIGH>; };
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ssi7: ssi@7 { interrupts = <0 377 IRQ_TYPE_LEVEL_HIGH>; };
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ssi8: ssi@8 { interrupts = <0 378 IRQ_TYPE_LEVEL_HIGH>; };
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ssi9: ssi@9 { interrupts = <0 379 IRQ_TYPE_LEVEL_HIGH>; };
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ssi0: ssi@0 {
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interrupts = <0 370 IRQ_TYPE_LEVEL_HIGH>;
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dmas = <&audma0 0x01>, <&audma1 0x02>, <&audma0 0x15>, <&audma1 0x16>;
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dma-names = "rx", "tx", "rxu", "txu";
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};
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ssi1: ssi@1 {
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interrupts = <0 371 IRQ_TYPE_LEVEL_HIGH>;
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dmas = <&audma0 0x03>, <&audma1 0x04>, <&audma0 0x49>, <&audma1 0x4a>;
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dma-names = "rx", "tx", "rxu", "txu";
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};
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ssi2: ssi@2 {
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interrupts = <0 372 IRQ_TYPE_LEVEL_HIGH>;
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dmas = <&audma0 0x05>, <&audma1 0x06>, <&audma0 0x63>, <&audma1 0x64>;
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dma-names = "rx", "tx", "rxu", "txu";
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};
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ssi3: ssi@3 {
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interrupts = <0 373 IRQ_TYPE_LEVEL_HIGH>;
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dmas = <&audma0 0x07>, <&audma1 0x08>, <&audma0 0x6f>, <&audma1 0x70>;
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dma-names = "rx", "tx", "rxu", "txu";
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};
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ssi4: ssi@4 {
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interrupts = <0 374 IRQ_TYPE_LEVEL_HIGH>;
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dmas = <&audma0 0x09>, <&audma1 0x0a>, <&audma0 0x71>, <&audma1 0x72>;
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dma-names = "rx", "tx", "rxu", "txu";
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};
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ssi5: ssi@5 {
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interrupts = <0 375 IRQ_TYPE_LEVEL_HIGH>;
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dmas = <&audma0 0x0b>, <&audma1 0x0c>, <&audma0 0x73>, <&audma1 0x74>;
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dma-names = "rx", "tx", "rxu", "txu";
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};
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ssi6: ssi@6 {
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interrupts = <0 376 IRQ_TYPE_LEVEL_HIGH>;
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dmas = <&audma0 0x0d>, <&audma1 0x0e>, <&audma0 0x75>, <&audma1 0x76>;
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dma-names = "rx", "tx", "rxu", "txu";
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};
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ssi7: ssi@7 {
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interrupts = <0 377 IRQ_TYPE_LEVEL_HIGH>;
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dmas = <&audma0 0x0f>, <&audma1 0x10>, <&audma0 0x79>, <&audma1 0x7a>;
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dma-names = "rx", "tx", "rxu", "txu";
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};
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ssi8: ssi@8 {
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interrupts = <0 378 IRQ_TYPE_LEVEL_HIGH>;
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dmas = <&audma0 0x11>, <&audma1 0x12>, <&audma0 0x7b>, <&audma1 0x7c>;
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dma-names = "rx", "tx", "rxu", "txu";
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};
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ssi9: ssi@9 {
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interrupts = <0 379 IRQ_TYPE_LEVEL_HIGH>;
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dmas = <&audma0 0x13>, <&audma1 0x14>, <&audma0 0x7d>, <&audma1 0x7e>;
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dma-names = "rx", "tx", "rxu", "txu";
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};
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};
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};
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@ -357,13 +357,6 @@
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dma-channels = <13>;
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};
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audmapp: dma-controller@ec740000 {
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compatible = "renesas,rcar-audmapp";
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#dma-cells = <1>;
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reg = <0 0xec740000 0 0x200>;
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};
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/* The memory map in the User's Manual maps the cores to bus numbers */
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i2c0: i2c@e6508000 {
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#address-cells = <1>;
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@ -1503,7 +1496,10 @@
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reg = <0 0xec500000 0 0x1000>, /* SCU */
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<0 0xec5a0000 0 0x100>, /* ADG */
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<0 0xec540000 0 0x1000>, /* SSIU */
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<0 0xec541000 0 0x1280>; /* SSI */
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<0 0xec541000 0 0x1280>, /* SSI */
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<0 0xec740000 0 0x200>; /* Audio DMAC peri peri*/
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reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
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clocks = <&mstp10_clks R8A7791_CLK_SSI_ALL>,
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<&mstp10_clks R8A7791_CLK_SSI9>, <&mstp10_clks R8A7791_CLK_SSI8>,
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<&mstp10_clks R8A7791_CLK_SSI7>, <&mstp10_clks R8A7791_CLK_SSI6>,
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@ -1528,34 +1524,120 @@
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status = "disabled";
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rcar_sound,dvc {
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dvc0: dvc@0 { };
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dvc1: dvc@1 { };
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dvc0: dvc@0 {
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dmas = <&audma0 0xbc>;
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dma-names = "tx";
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};
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dvc1: dvc@1 {
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dmas = <&audma0 0xbe>;
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dma-names = "tx";
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};
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};
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rcar_sound,src {
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src0: src@0 { interrupts = <0 352 IRQ_TYPE_LEVEL_HIGH>; };
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src1: src@1 { interrupts = <0 353 IRQ_TYPE_LEVEL_HIGH>; };
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src2: src@2 { interrupts = <0 354 IRQ_TYPE_LEVEL_HIGH>; };
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src3: src@3 { interrupts = <0 355 IRQ_TYPE_LEVEL_HIGH>; };
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src4: src@4 { interrupts = <0 356 IRQ_TYPE_LEVEL_HIGH>; };
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src5: src@5 { interrupts = <0 357 IRQ_TYPE_LEVEL_HIGH>; };
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src6: src@6 { interrupts = <0 358 IRQ_TYPE_LEVEL_HIGH>; };
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src7: src@7 { interrupts = <0 359 IRQ_TYPE_LEVEL_HIGH>; };
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src8: src@8 { interrupts = <0 360 IRQ_TYPE_LEVEL_HIGH>; };
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src9: src@9 { interrupts = <0 361 IRQ_TYPE_LEVEL_HIGH>; };
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src0: src@0 {
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interrupts = <0 352 IRQ_TYPE_LEVEL_HIGH>;
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dmas = <&audma0 0x85>, <&audma1 0x9a>;
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dma-names = "rx", "tx";
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};
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src1: src@1 {
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interrupts = <0 353 IRQ_TYPE_LEVEL_HIGH>;
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dmas = <&audma0 0x87>, <&audma1 0x9c>;
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dma-names = "rx", "tx";
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};
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src2: src@2 {
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interrupts = <0 354 IRQ_TYPE_LEVEL_HIGH>;
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dmas = <&audma0 0x89>, <&audma1 0x9e>;
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dma-names = "rx", "tx";
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};
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src3: src@3 {
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interrupts = <0 355 IRQ_TYPE_LEVEL_HIGH>;
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dmas = <&audma0 0x8b>, <&audma1 0xa0>;
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dma-names = "rx", "tx";
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};
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src4: src@4 {
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interrupts = <0 356 IRQ_TYPE_LEVEL_HIGH>;
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dmas = <&audma0 0x8d>, <&audma1 0xb0>;
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dma-names = "rx", "tx";
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};
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src5: src@5 {
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interrupts = <0 357 IRQ_TYPE_LEVEL_HIGH>;
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dmas = <&audma0 0x8f>, <&audma1 0xb2>;
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dma-names = "rx", "tx";
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};
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src6: src@6 {
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interrupts = <0 358 IRQ_TYPE_LEVEL_HIGH>;
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dmas = <&audma0 0x91>, <&audma1 0xb4>;
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dma-names = "rx", "tx";
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};
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src7: src@7 {
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interrupts = <0 359 IRQ_TYPE_LEVEL_HIGH>;
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dmas = <&audma0 0x93>, <&audma1 0xb6>;
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dma-names = "rx", "tx";
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};
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src8: src@8 {
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interrupts = <0 360 IRQ_TYPE_LEVEL_HIGH>;
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dmas = <&audma0 0x95>, <&audma1 0xb8>;
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dma-names = "rx", "tx";
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};
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src9: src@9 {
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interrupts = <0 361 IRQ_TYPE_LEVEL_HIGH>;
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dmas = <&audma0 0x97>, <&audma1 0xba>;
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dma-names = "rx", "tx";
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};
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};
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rcar_sound,ssi {
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ssi0: ssi@0 { interrupts = <0 370 IRQ_TYPE_LEVEL_HIGH>; };
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ssi1: ssi@1 { interrupts = <0 371 IRQ_TYPE_LEVEL_HIGH>; };
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ssi2: ssi@2 { interrupts = <0 372 IRQ_TYPE_LEVEL_HIGH>; };
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ssi3: ssi@3 { interrupts = <0 373 IRQ_TYPE_LEVEL_HIGH>; };
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ssi4: ssi@4 { interrupts = <0 374 IRQ_TYPE_LEVEL_HIGH>; };
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ssi5: ssi@5 { interrupts = <0 375 IRQ_TYPE_LEVEL_HIGH>; };
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ssi6: ssi@6 { interrupts = <0 376 IRQ_TYPE_LEVEL_HIGH>; };
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ssi7: ssi@7 { interrupts = <0 377 IRQ_TYPE_LEVEL_HIGH>; };
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ssi8: ssi@8 { interrupts = <0 378 IRQ_TYPE_LEVEL_HIGH>; };
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ssi9: ssi@9 { interrupts = <0 379 IRQ_TYPE_LEVEL_HIGH>; };
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ssi0: ssi@0 {
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interrupts = <0 370 IRQ_TYPE_LEVEL_HIGH>;
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dmas = <&audma0 0x01>, <&audma1 0x02>, <&audma0 0x15>, <&audma1 0x16>;
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dma-names = "rx", "tx", "rxu", "txu";
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};
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ssi1: ssi@1 {
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interrupts = <0 371 IRQ_TYPE_LEVEL_HIGH>;
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dmas = <&audma0 0x03>, <&audma1 0x04>, <&audma0 0x49>, <&audma1 0x4a>;
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dma-names = "rx", "tx", "rxu", "txu";
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};
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ssi2: ssi@2 {
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interrupts = <0 372 IRQ_TYPE_LEVEL_HIGH>;
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dmas = <&audma0 0x05>, <&audma1 0x06>, <&audma0 0x63>, <&audma1 0x64>;
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dma-names = "rx", "tx", "rxu", "txu";
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};
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ssi3: ssi@3 {
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interrupts = <0 373 IRQ_TYPE_LEVEL_HIGH>;
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dmas = <&audma0 0x07>, <&audma1 0x08>, <&audma0 0x6f>, <&audma1 0x70>;
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dma-names = "rx", "tx", "rxu", "txu";
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};
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ssi4: ssi@4 {
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interrupts = <0 374 IRQ_TYPE_LEVEL_HIGH>;
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dmas = <&audma0 0x09>, <&audma1 0x0a>, <&audma0 0x71>, <&audma1 0x72>;
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||||
dma-names = "rx", "tx", "rxu", "txu";
|
||||
};
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ssi5: ssi@5 {
|
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interrupts = <0 375 IRQ_TYPE_LEVEL_HIGH>;
|
||||
dmas = <&audma0 0x0b>, <&audma1 0x0c>, <&audma0 0x73>, <&audma1 0x74>;
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dma-names = "rx", "tx", "rxu", "txu";
|
||||
};
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ssi6: ssi@6 {
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interrupts = <0 376 IRQ_TYPE_LEVEL_HIGH>;
|
||||
dmas = <&audma0 0x0d>, <&audma1 0x0e>, <&audma0 0x75>, <&audma1 0x76>;
|
||||
dma-names = "rx", "tx", "rxu", "txu";
|
||||
};
|
||||
ssi7: ssi@7 {
|
||||
interrupts = <0 377 IRQ_TYPE_LEVEL_HIGH>;
|
||||
dmas = <&audma0 0x0f>, <&audma1 0x10>, <&audma0 0x79>, <&audma1 0x7a>;
|
||||
dma-names = "rx", "tx", "rxu", "txu";
|
||||
};
|
||||
ssi8: ssi@8 {
|
||||
interrupts = <0 378 IRQ_TYPE_LEVEL_HIGH>;
|
||||
dmas = <&audma0 0x11>, <&audma1 0x12>, <&audma0 0x7b>, <&audma1 0x7c>;
|
||||
dma-names = "rx", "tx", "rxu", "txu";
|
||||
};
|
||||
ssi9: ssi@9 {
|
||||
interrupts = <0 379 IRQ_TYPE_LEVEL_HIGH>;
|
||||
dmas = <&audma0 0x13>, <&audma1 0x14>, <&audma0 0x7d>, <&audma1 0x7e>;
|
||||
dma-names = "rx", "tx", "rxu", "txu";
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
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