drm/i915: Expose energy counter on SNB+ through debugfs
On SNB and IVB, there's an MSR (also exposed through MCHBAR) we can use to read out the amount of energy used over time. Expose this in sysfs to make it easy to do power comparisons with different configurations. If the platform supports it, the file will show up under the drm/card0/power subdirectory of the PCI device in sysfs as gt_energy_uJ. The value in the file is a running total of energy (in microjoules) consumed by the graphics device. v2: move to sysfs (Ben, Daniel) expose a simple value (Chris) drop unrelated hunk (Ben) Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> v3: by Ben Tied it into existing rc6 sysfs entries and named that a more generic "power attrs." Fixed rebase conflicts. Signed-off-by: Ben Widawsky <ben@bwidawsk.net> v4: Since RAPL is a real driver that already exists to serve power monitoring, place our entry in debugfs. This gives me a fallback location for systems that do not expose it otherwise. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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@ -31,6 +31,7 @@
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#include <linux/slab.h>
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#include <linux/export.h>
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#include <linux/list_sort.h>
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#include <asm/msr-index.h>
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#include <drm/drmP.h>
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#include "intel_drv.h"
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#include "intel_ringbuffer.h"
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@ -1769,6 +1770,27 @@ static int i915_edp_psr_status(struct seq_file *m, void *data)
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return 0;
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}
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static int i915_energy_uJ(struct seq_file *m, void *data)
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{
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struct drm_info_node *node = m->private;
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struct drm_device *dev = node->minor->dev;
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struct drm_i915_private *dev_priv = dev->dev_private;
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u64 power;
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u32 units;
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if (INTEL_INFO(dev)->gen < 6)
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return -ENODEV;
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rdmsrl(MSR_RAPL_POWER_UNIT, power);
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power = (power & 0x1f00) >> 8;
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units = 1000000 / (1 << power); /* convert to uJ */
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power = I915_READ(MCH_SECP_NRG_STTS);
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power *= units;
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seq_printf(m, "%llu", (long long unsigned)power);
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return 0;
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}
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static int
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i915_wedged_get(void *data, u64 *val)
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{
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@ -2208,6 +2230,7 @@ static struct drm_info_list i915_debugfs_list[] = {
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{"i915_dpio", i915_dpio_info, 0},
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{"i915_llc", i915_llc, 0},
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{"i915_edp_psr_status", i915_edp_psr_status, 0},
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{"i915_energy_uJ", i915_energy_uJ, 0},
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};
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#define I915_DEBUGFS_ENTRIES ARRAY_SIZE(i915_debugfs_list)
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@ -1447,6 +1447,8 @@
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#define MCH_SSKPD_WM0_MASK 0x3f
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#define MCH_SSKPD_WM0_VAL 0xc
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#define MCH_SECP_NRG_STTS (MCHBAR_MIRROR_BASE_SNB + 0x592c)
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/* Clocking configuration register */
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#define CLKCFG 0x10c00
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#define CLKCFG_FSB_400 (5 << 0) /* hrawclk 100 */
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