Renesas ARM DT updates for v5.6
- Touch screen support for the iwg20d board, - ARM global timer support on Cortex-A9 MPCore SoCs, - Miscellaneous fixes for issues detected by "make dtbs_check". -----BEGIN PGP SIGNATURE----- iHUEABYIAB0WIQQ9qaHoIs/1I4cXmEiKwlD9ZEnxcAUCXhMEjgAKCRCKwlD9ZEnx cBi2AP9TSGAgkm94K9MGLInjz1jX7gJuaXBThOSsZK6cbLTanAEAoLG/Fbe/vkya DiOgp89ukA7libFJEPIvPK0Nn8PJFgQ= =clXj -----END PGP SIGNATURE----- Merge tag 'renesas-arm-dt-for-v5.6-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/dt Renesas ARM DT updates for v5.6 - Touch screen support for the iwg20d board, - ARM global timer support on Cortex-A9 MPCore SoCs, - Miscellaneous fixes for issues detected by "make dtbs_check". * tag 'renesas-arm-dt-for-v5.6-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel: ARM: dts: sh73a0: Add missing clock-frequency for fixed clocks ARM: dts: r8a7778: Add missing clock-frequency for fixed clocks ARM: dts: rcar-gen2: Add missing mmio-sram bus properties ARM: dts: rcar-gen2: Fix PCI high address in interrupt-map-mask ARM: dts: renesas: Group tuples in pci ranges and dma-ranges properties ARM: dts: renesas: Group tuples in interrupt properties ARM: dts: renesas: Group tuples in regulator-gpio states properties ARM: dts: r8a7779: Add device node for ARM global timer ARM: dts: sh73a0: Add device node for ARM global timer ARM: dts: sh73a0: Rename twd clock to periph clock ARM: dts: iwg20d-q7-common: Add LCD support Link: https://lore.kernel.org/r/20200106104857.8361-3-geert+renesas@glider.be Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
Olof Johansson
Коммит
ec67108520
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@ -46,6 +46,49 @@
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clock-frequency = <26000000>;
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};
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lcd_backlight: backlight {
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compatible = "pwm-backlight";
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pwms = <&pwm3 0 5000000 0>;
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brightness-levels = <0 4 8 16 32 64 128 255>;
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default-brightness-level = <7>;
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enable-gpios = <&gpio5 14 GPIO_ACTIVE_HIGH>;
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};
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lvds-receiver {
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compatible = "ti,ds90cf384a", "lvds-decoder";
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powerdown-gpios = <&gpio7 25 GPIO_ACTIVE_LOW>;
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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lvds_receiver_in: endpoint {
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remote-endpoint = <&lvds0_out>;
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};
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};
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port@1 {
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reg = <1>;
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lvds_receiver_out: endpoint {
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remote-endpoint = <&panel_in>;
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};
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};
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};
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};
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panel {
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compatible = "edt,etm0700g0dh6";
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backlight = <&lcd_backlight>;
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port {
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panel_in: endpoint {
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remote-endpoint = <&lvds_receiver_out>;
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};
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};
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};
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reg_1p5v: 1p5v {
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compatible = "regulator-fixed";
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regulator-name = "1P5V";
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@ -89,8 +132,7 @@
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gpios = <&gpio2 30 GPIO_ACTIVE_HIGH>;
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gpios-states = <1>;
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states = <3300000 1
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1800000 0>;
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states = <3300000 1>, <1800000 0>;
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};
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};
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@ -120,6 +162,18 @@
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status = "okay";
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};
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&du {
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status = "okay";
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};
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&gpio2 {
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touch-interrupt {
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gpio-hog;
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gpios = <12 GPIO_ACTIVE_LOW>;
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input;
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};
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};
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&hsusb {
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status = "okay";
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pinctrl-0 = <&usb0_pins>;
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@ -147,6 +201,25 @@
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VDDIO-supply = <®_3p3v>;
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VDDD-supply = <®_1p5v>;
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};
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touch: touchpanel@38 {
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compatible = "edt,edt-ft5406";
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reg = <0x38>;
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interrupt-parent = <&gpio2>;
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interrupts = <12 IRQ_TYPE_EDGE_FALLING>;
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};
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};
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&lvds0 {
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status = "okay";
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ports {
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port@1 {
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lvds0_out: endpoint {
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remote-endpoint = <&lvds_receiver_in>;
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};
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};
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};
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};
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&pci0 {
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@ -180,6 +253,11 @@
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function = "i2c2";
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};
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pwm3_pins: pwm3 {
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groups = "pwm3";
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function = "pwm3";
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};
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scif0_pins: scif0 {
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groups = "scif0_data_d";
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function = "scif0";
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@ -218,6 +296,12 @@
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};
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};
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&pwm3 {
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pinctrl-0 = <&pwm3_pins>;
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pinctrl-names = "default";
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status = "okay";
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};
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&rcar_sound {
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pinctrl-0 = <&sound_pins>;
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pinctrl-names = "default";
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|
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@ -39,7 +39,6 @@
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&du {
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pinctrl-0 = <&du_pins>;
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pinctrl-names = "default";
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status = "okay";
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ports {
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port@0 {
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@ -313,9 +313,9 @@
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mmcif: mmc@e804c800 {
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compatible = "renesas,mmcif-r7s72100", "renesas,sh-mmcif";
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reg = <0xe804c800 0x80>;
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interrupts = <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>;
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interrupts = <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&mstp8_clks R7S72100_CLK_MMCIF>;
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power-domains = <&cpg_clocks>;
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reg-io-width = <4>;
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@ -326,9 +326,9 @@
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sdhi0: sd@e804e000 {
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compatible = "renesas,sdhi-r7s72100";
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reg = <0xe804e000 0x100>;
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interrupts = <GIC_SPI 270 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 271 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>;
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interrupts = <GIC_SPI 270 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 271 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&mstp12_clks R7S72100_CLK_SDHI00>,
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<&mstp12_clks R7S72100_CLK_SDHI01>;
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@ -342,9 +342,9 @@
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sdhi1: sd@e804e800 {
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compatible = "renesas,sdhi-r7s72100";
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reg = <0xe804e800 0x100>;
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interrupts = <GIC_SPI 273 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 274 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 275 IRQ_TYPE_LEVEL_HIGH>;
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interrupts = <GIC_SPI 273 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 274 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 275 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&mstp12_clks R7S72100_CLK_SDHI10>,
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<&mstp12_clks R7S72100_CLK_SDHI11>;
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|
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@ -84,27 +84,27 @@
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dma0: dma-controller@e6700020 {
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compatible = "renesas,shdma-r8a73a4";
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reg = <0 0xe6700020 0 0x89e0>;
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interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>;
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interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "error",
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"ch0", "ch1", "ch2", "ch3",
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"ch4", "ch5", "ch6", "ch7",
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@ -60,8 +60,7 @@
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enable-gpio = <&pfc 74 GPIO_ACTIVE_HIGH>;
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gpios = <&pfc 17 GPIO_ACTIVE_HIGH>;
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states = <3300000 0
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1800000 1>;
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states = <3300000 0>, <1800000 1>;
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enable-active-high;
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};
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@ -102,14 +102,14 @@
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<0xe6900020 1>,
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<0xe6900040 1>,
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<0xe6900060 1>;
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interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;
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interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
|
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<GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&mstp2_clks R8A7740_CLK_INTCA>;
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power-domains = <&pd_a4s>;
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};
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@ -124,14 +124,14 @@
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<0xe6900024 1>,
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<0xe6900044 1>,
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<0xe6900064 1>;
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interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH
|
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GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH
|
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GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH
|
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GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH
|
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GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;
|
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interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
|
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<GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
|
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<GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
|
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<GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;
|
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clocks = <&mstp2_clks R8A7740_CLK_INTCA>;
|
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power-domains = <&pd_a4s>;
|
||||
};
|
||||
|
|
@ -146,14 +146,14 @@
|
|||
<0xe6900028 1>,
|
||||
<0xe6900048 1>,
|
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<0xe6900068 1>;
|
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interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&mstp2_clks R8A7740_CLK_INTCA>;
|
||||
power-domains = <&pd_a4s>;
|
||||
};
|
||||
|
|
@ -168,14 +168,14 @@
|
|||
<0xe690002c 1>,
|
||||
<0xe690004c 1>,
|
||||
<0xe690006c 1>;
|
||||
interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&mstp2_clks R8A7740_CLK_INTCA>;
|
||||
power-domains = <&pd_a4s>;
|
||||
};
|
||||
|
|
@ -198,10 +198,10 @@
|
|||
#size-cells = <0>;
|
||||
compatible = "renesas,iic-r8a7740", "renesas,rmobile-iic";
|
||||
reg = <0xfff20000 0x425>;
|
||||
interrupts = <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupts = <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&mstp1_clks R8A7740_CLK_IIC0>;
|
||||
power-domains = <&pd_a4r>;
|
||||
status = "disabled";
|
||||
|
|
@ -212,10 +212,10 @@
|
|||
#size-cells = <0>;
|
||||
compatible = "renesas,iic-r8a7740", "renesas,rmobile-iic";
|
||||
reg = <0xe6c20000 0x425>;
|
||||
interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&mstp3_clks R8A7740_CLK_IIC1>;
|
||||
power-domains = <&pd_a3sp>;
|
||||
status = "disabled";
|
||||
|
|
@ -342,8 +342,8 @@
|
|||
mmcif0: mmc@e6bd0000 {
|
||||
compatible = "renesas,mmcif-r8a7740", "renesas,sh-mmcif";
|
||||
reg = <0xe6bd0000 0x100>;
|
||||
interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&mstp3_clks R8A7740_CLK_MMC>;
|
||||
power-domains = <&pd_a3sp>;
|
||||
status = "disabled";
|
||||
|
|
@ -352,9 +352,9 @@
|
|||
sdhi0: sd@e6850000 {
|
||||
compatible = "renesas,sdhi-r8a7740";
|
||||
reg = <0xe6850000 0x100>;
|
||||
interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&mstp3_clks R8A7740_CLK_SDHI0>;
|
||||
power-domains = <&pd_a3sp>;
|
||||
cap-sd-highspeed;
|
||||
|
|
@ -365,9 +365,9 @@
|
|||
sdhi1: sd@e6860000 {
|
||||
compatible = "renesas,sdhi-r8a7740";
|
||||
reg = <0xe6860000 0x100>;
|
||||
interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&mstp3_clks R8A7740_CLK_SDHI1>;
|
||||
power-domains = <&pd_a3sp>;
|
||||
cap-sd-highspeed;
|
||||
|
|
@ -378,9 +378,9 @@
|
|||
sdhi2: sd@e6870000 {
|
||||
compatible = "renesas,sdhi-r8a7740";
|
||||
reg = <0xe6870000 0x100>;
|
||||
interrupts = <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupts = <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&mstp4_clks R8A7740_CLK_SDHI2>;
|
||||
power-domains = <&pd_a3sp>;
|
||||
cap-sd-highspeed;
|
||||
|
|
|
|||
|
|
@ -399,6 +399,9 @@
|
|||
icram0: sram@e63a0000 {
|
||||
compatible = "mmio-sram";
|
||||
reg = <0 0xe63a0000 0 0x12000>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges = <0 0 0xe63a0000 0x12000>;
|
||||
};
|
||||
|
||||
icram1: sram@e63c0000 {
|
||||
|
|
@ -417,6 +420,9 @@
|
|||
icram2: sram@e6300000 {
|
||||
compatible = "mmio-sram";
|
||||
reg = <0 0xe6300000 0 0x40000>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges = <0 0 0xe6300000 0x40000>;
|
||||
};
|
||||
|
||||
/* The memory map in the User's Manual maps the cores to
|
||||
|
|
@ -600,8 +606,8 @@
|
|||
compatible = "renesas,r8a7743-usb-dmac",
|
||||
"renesas,usb-dmac";
|
||||
reg = <0 0xe65a0000 0 0x100>;
|
||||
interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-names = "ch0", "ch1";
|
||||
clocks = <&cpg CPG_MOD 330>;
|
||||
power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
|
||||
|
|
@ -614,8 +620,8 @@
|
|||
compatible = "renesas,r8a7743-usb-dmac",
|
||||
"renesas,usb-dmac";
|
||||
reg = <0 0xe65b0000 0 0x100>;
|
||||
interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-names = "ch0", "ch1";
|
||||
clocks = <&cpg CPG_MOD 331>;
|
||||
power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
|
||||
|
|
@ -628,22 +634,22 @@
|
|||
compatible = "renesas,dmac-r8a7743",
|
||||
"renesas,rcar-dmac";
|
||||
reg = <0 0xe6700000 0 0x20000>;
|
||||
interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-names = "error",
|
||||
"ch0", "ch1", "ch2", "ch3",
|
||||
"ch4", "ch5", "ch6", "ch7",
|
||||
|
|
@ -661,22 +667,22 @@
|
|||
compatible = "renesas,dmac-r8a7743",
|
||||
"renesas,rcar-dmac";
|
||||
reg = <0 0xe6720000 0 0x20000>;
|
||||
interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-names = "error",
|
||||
"ch0", "ch1", "ch2", "ch3",
|
||||
"ch4", "ch5", "ch6", "ch7",
|
||||
|
|
@ -1366,20 +1372,20 @@
|
|||
compatible = "renesas,dmac-r8a7743",
|
||||
"renesas,rcar-dmac";
|
||||
reg = <0 0xec700000 0 0x10000>;
|
||||
interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-names = "error",
|
||||
"ch0", "ch1", "ch2", "ch3",
|
||||
"ch4", "ch5", "ch6", "ch7",
|
||||
|
|
@ -1397,20 +1403,20 @@
|
|||
compatible = "renesas,dmac-r8a7743",
|
||||
"renesas,rcar-dmac";
|
||||
reg = <0 0xec720000 0 0x10000>;
|
||||
interrupts = <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupts = <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-names = "error",
|
||||
"ch0", "ch1", "ch2", "ch3",
|
||||
"ch4", "ch5", "ch6", "ch7",
|
||||
|
|
@ -1461,10 +1467,10 @@
|
|||
#size-cells = <2>;
|
||||
#interrupt-cells = <1>;
|
||||
ranges = <0x02000000 0 0xee080000 0 0xee080000 0 0x00010000>;
|
||||
interrupt-map-mask = <0xff00 0 0 0x7>;
|
||||
interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH
|
||||
0x0800 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH
|
||||
0x1000 0 0 2 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-map-mask = <0xf800 0 0 0x7>;
|
||||
interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0x0800 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0x1000 0 0 2 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
|
||||
|
||||
usb@1,0 {
|
||||
reg = <0x800 0 0 0 0>;
|
||||
|
|
@ -1496,10 +1502,10 @@
|
|||
#size-cells = <2>;
|
||||
#interrupt-cells = <1>;
|
||||
ranges = <0x02000000 0 0xee0c0000 0 0xee0c0000 0 0x00010000>;
|
||||
interrupt-map-mask = <0xff00 0 0 0x7>;
|
||||
interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
|
||||
0x0800 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
|
||||
0x1000 0 0 2 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-map-mask = <0xf800 0 0 0x7>;
|
||||
interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0x0800 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0x1000 0 0 2 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
|
||||
|
||||
usb@1,0 {
|
||||
reg = <0x10800 0 0 0 0>;
|
||||
|
|
@ -1611,13 +1617,13 @@
|
|||
#size-cells = <2>;
|
||||
bus-range = <0x00 0xff>;
|
||||
device_type = "pci";
|
||||
ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000
|
||||
0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000
|
||||
0x02000000 0 0x30000000 0 0x30000000 0 0x08000000
|
||||
0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
|
||||
ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000>,
|
||||
<0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000>,
|
||||
<0x02000000 0 0x30000000 0 0x30000000 0 0x08000000>,
|
||||
<0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
|
||||
/* Map all possible DDR as inbound ranges */
|
||||
dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000
|
||||
0x43000000 2 0x00000000 2 0x00000000 1 0x00000000>;
|
||||
dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>,
|
||||
<0x43000000 2 0x00000000 2 0x00000000 1 0x00000000>;
|
||||
interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
|
||||
|
|
|
|||
|
|
@ -399,6 +399,9 @@
|
|||
icram0: sram@e63a0000 {
|
||||
compatible = "mmio-sram";
|
||||
reg = <0 0xe63a0000 0 0x12000>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges = <0 0 0xe63a0000 0x12000>;
|
||||
};
|
||||
|
||||
icram1: sram@e63c0000 {
|
||||
|
|
@ -417,6 +420,9 @@
|
|||
icram2: sram@e6300000 {
|
||||
compatible = "mmio-sram";
|
||||
reg = <0 0xe6300000 0 0x40000>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges = <0 0 0xe6300000 0x40000>;
|
||||
};
|
||||
|
||||
/* The memory map in the User's Manual maps the cores to
|
||||
|
|
@ -600,8 +606,8 @@
|
|||
compatible = "renesas,r8a7744-usb-dmac",
|
||||
"renesas,usb-dmac";
|
||||
reg = <0 0xe65a0000 0 0x100>;
|
||||
interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-names = "ch0", "ch1";
|
||||
clocks = <&cpg CPG_MOD 330>;
|
||||
power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
|
||||
|
|
@ -614,8 +620,8 @@
|
|||
compatible = "renesas,r8a7744-usb-dmac",
|
||||
"renesas,usb-dmac";
|
||||
reg = <0 0xe65b0000 0 0x100>;
|
||||
interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-names = "ch0", "ch1";
|
||||
clocks = <&cpg CPG_MOD 331>;
|
||||
power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
|
||||
|
|
@ -628,22 +634,22 @@
|
|||
compatible = "renesas,dmac-r8a7744",
|
||||
"renesas,rcar-dmac";
|
||||
reg = <0 0xe6700000 0 0x20000>;
|
||||
interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-names = "error",
|
||||
"ch0", "ch1", "ch2", "ch3",
|
||||
"ch4", "ch5", "ch6", "ch7",
|
||||
|
|
@ -661,22 +667,22 @@
|
|||
compatible = "renesas,dmac-r8a7744",
|
||||
"renesas,rcar-dmac";
|
||||
reg = <0 0xe6720000 0 0x20000>;
|
||||
interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-names = "error",
|
||||
"ch0", "ch1", "ch2", "ch3",
|
||||
"ch4", "ch5", "ch6", "ch7",
|
||||
|
|
@ -1366,20 +1372,20 @@
|
|||
compatible = "renesas,dmac-r8a7744",
|
||||
"renesas,rcar-dmac";
|
||||
reg = <0 0xec700000 0 0x10000>;
|
||||
interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-names = "error",
|
||||
"ch0", "ch1", "ch2", "ch3",
|
||||
"ch4", "ch5", "ch6", "ch7",
|
||||
|
|
@ -1397,20 +1403,20 @@
|
|||
compatible = "renesas,dmac-r8a7744",
|
||||
"renesas,rcar-dmac";
|
||||
reg = <0 0xec720000 0 0x10000>;
|
||||
interrupts = <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupts = <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-names = "error",
|
||||
"ch0", "ch1", "ch2", "ch3",
|
||||
"ch4", "ch5", "ch6", "ch7",
|
||||
|
|
@ -1461,10 +1467,10 @@
|
|||
#size-cells = <2>;
|
||||
#interrupt-cells = <1>;
|
||||
ranges = <0x02000000 0 0xee080000 0 0xee080000 0 0x00010000>;
|
||||
interrupt-map-mask = <0xff00 0 0 0x7>;
|
||||
interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH
|
||||
0x0800 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH
|
||||
0x1000 0 0 2 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-map-mask = <0xf800 0 0 0x7>;
|
||||
interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0x0800 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0x1000 0 0 2 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
|
||||
|
||||
usb@1,0 {
|
||||
reg = <0x800 0 0 0 0>;
|
||||
|
|
@ -1496,10 +1502,10 @@
|
|||
#size-cells = <2>;
|
||||
#interrupt-cells = <1>;
|
||||
ranges = <0x02000000 0 0xee0c0000 0 0xee0c0000 0 0x00010000>;
|
||||
interrupt-map-mask = <0xff00 0 0 0x7>;
|
||||
interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
|
||||
0x0800 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
|
||||
0x1000 0 0 2 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-map-mask = <0xf800 0 0 0x7>;
|
||||
interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0x0800 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0x1000 0 0 2 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
|
||||
|
||||
usb@1,0 {
|
||||
reg = <0x10800 0 0 0 0>;
|
||||
|
|
@ -1597,13 +1603,13 @@
|
|||
#size-cells = <2>;
|
||||
bus-range = <0x00 0xff>;
|
||||
device_type = "pci";
|
||||
ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000
|
||||
0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000
|
||||
0x02000000 0 0x30000000 0 0x30000000 0 0x08000000
|
||||
0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
|
||||
ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000>,
|
||||
<0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000>,
|
||||
<0x02000000 0 0x30000000 0 0x30000000 0 0x08000000>,
|
||||
<0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
|
||||
/* Map all possible DDR as inbound ranges */
|
||||
dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000
|
||||
0x43000000 2 0x00000000 2 0x00000000 1 0x00000000>;
|
||||
dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>,
|
||||
<0x43000000 2 0x00000000 2 0x00000000 1 0x00000000>;
|
||||
interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
|
||||
|
|
|
|||
|
|
@ -76,8 +76,7 @@
|
|||
|
||||
gpios = <&gpio0 20 GPIO_ACTIVE_LOW>;
|
||||
gpios-states = <1>;
|
||||
states = <3300000 1
|
||||
1800000 0>;
|
||||
states = <3300000 1>, <1800000 0>;
|
||||
};
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -363,6 +363,9 @@
|
|||
icram0: sram@e63a0000 {
|
||||
compatible = "mmio-sram";
|
||||
reg = <0 0xe63a0000 0 0x12000>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges = <0 0 0xe63a0000 0x12000>;
|
||||
};
|
||||
|
||||
icram1: sram@e63c0000 {
|
||||
|
|
@ -381,6 +384,9 @@
|
|||
icram2: sram@e6300000 {
|
||||
compatible = "mmio-sram";
|
||||
reg = <0 0xe6300000 0 0x40000>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges = <0 0 0xe6300000 0x40000>;
|
||||
};
|
||||
i2c0: i2c@e6508000 {
|
||||
#address-cells = <1>;
|
||||
|
|
@ -543,8 +549,8 @@
|
|||
compatible = "renesas,r8a7745-usb-dmac",
|
||||
"renesas,usb-dmac";
|
||||
reg = <0 0xe65a0000 0 0x100>;
|
||||
interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-names = "ch0", "ch1";
|
||||
clocks = <&cpg CPG_MOD 330>;
|
||||
power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
|
||||
|
|
@ -557,8 +563,8 @@
|
|||
compatible = "renesas,r8a7745-usb-dmac",
|
||||
"renesas,usb-dmac";
|
||||
reg = <0 0xe65b0000 0 0x100>;
|
||||
interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-names = "ch0", "ch1";
|
||||
clocks = <&cpg CPG_MOD 331>;
|
||||
power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
|
||||
|
|
@ -571,22 +577,22 @@
|
|||
compatible = "renesas,dmac-r8a7745",
|
||||
"renesas,rcar-dmac";
|
||||
reg = <0 0xe6700000 0 0x20000>;
|
||||
interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-names = "error",
|
||||
"ch0", "ch1", "ch2", "ch3",
|
||||
"ch4", "ch5", "ch6", "ch7",
|
||||
|
|
@ -604,22 +610,22 @@
|
|||
compatible = "renesas,dmac-r8a7745",
|
||||
"renesas,rcar-dmac";
|
||||
reg = <0 0xe6720000 0 0x20000>;
|
||||
interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-names = "error",
|
||||
"ch0", "ch1", "ch2", "ch3",
|
||||
"ch4", "ch5", "ch6", "ch7",
|
||||
|
|
@ -1293,20 +1299,20 @@
|
|||
compatible = "renesas,dmac-r8a7745",
|
||||
"renesas,rcar-dmac";
|
||||
reg = <0 0xec700000 0 0x10000>;
|
||||
interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-names = "error",
|
||||
"ch0", "ch1", "ch2", "ch3",
|
||||
"ch4", "ch5", "ch6", "ch7",
|
||||
|
|
@ -1337,10 +1343,10 @@
|
|||
#size-cells = <2>;
|
||||
#interrupt-cells = <1>;
|
||||
ranges = <0x02000000 0 0xee080000 0 0xee080000 0 0x00010000>;
|
||||
interrupt-map-mask = <0xff00 0 0 0x7>;
|
||||
interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH
|
||||
0x0800 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH
|
||||
0x1000 0 0 2 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-map-mask = <0xf800 0 0 0x7>;
|
||||
interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0x0800 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0x1000 0 0 2 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
|
||||
|
||||
usb@1,0 {
|
||||
reg = <0x800 0 0 0 0>;
|
||||
|
|
@ -1372,10 +1378,10 @@
|
|||
#size-cells = <2>;
|
||||
#interrupt-cells = <1>;
|
||||
ranges = <0x02000000 0 0xee0c0000 0 0xee0c0000 0 0x00010000>;
|
||||
interrupt-map-mask = <0xff00 0 0 0x7>;
|
||||
interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
|
||||
0x0800 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
|
||||
0x1000 0 0 2 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-map-mask = <0xf800 0 0 0x7>;
|
||||
interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0x0800 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0x1000 0 0 2 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
|
||||
|
||||
usb@1,0 {
|
||||
reg = <0x10800 0 0 0 0>;
|
||||
|
|
|
|||
|
|
@ -65,8 +65,7 @@
|
|||
|
||||
gpios = <&gpio2 24 GPIO_ACTIVE_HIGH>;
|
||||
gpios-states = <1>;
|
||||
states = <3300000 1
|
||||
1800000 0>;
|
||||
states = <3300000 1>, <1800000 0>;
|
||||
};
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -242,6 +242,9 @@
|
|||
icram0: sram@e63a0000 {
|
||||
compatible = "mmio-sram";
|
||||
reg = <0 0xe63a0000 0 0x12000>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges = <0 0 0xe63a0000 0x12000>;
|
||||
};
|
||||
|
||||
icram1: sram@e63c0000 {
|
||||
|
|
@ -260,6 +263,9 @@
|
|||
icram2: sram@e6300000 {
|
||||
compatible = "mmio-sram";
|
||||
reg = <0 0xe6300000 0 0x20000>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges = <0 0 0xe6300000 0x20000>;
|
||||
};
|
||||
|
||||
i2c0: i2c@e6508000 {
|
||||
|
|
@ -407,8 +413,8 @@
|
|||
compatible = "renesas,r8a77470-usb-dmac",
|
||||
"renesas,usb-dmac";
|
||||
reg = <0 0xe65a0000 0 0x100>;
|
||||
interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-names = "ch0", "ch1";
|
||||
clocks = <&cpg CPG_MOD 330>;
|
||||
power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
|
||||
|
|
@ -421,8 +427,8 @@
|
|||
compatible = "renesas,r8a77470-usb-dmac",
|
||||
"renesas,usb-dmac";
|
||||
reg = <0 0xe65b0000 0 0x100>;
|
||||
interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-names = "ch0", "ch1";
|
||||
clocks = <&cpg CPG_MOD 331>;
|
||||
power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
|
||||
|
|
@ -435,8 +441,8 @@
|
|||
compatible = "renesas,r8a77470-usb-dmac",
|
||||
"renesas,usb-dmac";
|
||||
reg = <0 0xe65a8000 0 0x100>;
|
||||
interrupts = <GIC_SPI 293 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 293 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupts = <GIC_SPI 293 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 293 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-names = "ch0", "ch1";
|
||||
clocks = <&cpg CPG_MOD 326>;
|
||||
power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
|
||||
|
|
@ -449,8 +455,8 @@
|
|||
compatible = "renesas,r8a77470-usb-dmac",
|
||||
"renesas,usb-dmac";
|
||||
reg = <0 0xe65b8000 0 0x100>;
|
||||
interrupts = <GIC_SPI 292 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 292 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupts = <GIC_SPI 292 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 292 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-names = "ch0", "ch1";
|
||||
clocks = <&cpg CPG_MOD 327>;
|
||||
power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
|
||||
|
|
@ -463,22 +469,22 @@
|
|||
compatible = "renesas,dmac-r8a77470",
|
||||
"renesas,rcar-dmac";
|
||||
reg = <0 0xe6700000 0 0x20000>;
|
||||
interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-names = "error",
|
||||
"ch0", "ch1", "ch2", "ch3",
|
||||
"ch4", "ch5", "ch6", "ch7",
|
||||
|
|
@ -496,22 +502,22 @@
|
|||
compatible = "renesas,dmac-r8a77470",
|
||||
"renesas,rcar-dmac";
|
||||
reg = <0 0xe6720000 0 0x20000>;
|
||||
interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-names = "error",
|
||||
"ch0", "ch1", "ch2", "ch3",
|
||||
"ch4", "ch5", "ch6", "ch7",
|
||||
|
|
|
|||
|
|
@ -79,10 +79,10 @@
|
|||
<0xfe780024 4>,
|
||||
<0xfe780044 4>,
|
||||
<0xfe780064 4>;
|
||||
interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
|
||||
sense-bitfield-width = <2>;
|
||||
};
|
||||
|
||||
|
|
@ -498,14 +498,17 @@
|
|||
audio_clk_a: audio_clk_a {
|
||||
compatible = "fixed-clock";
|
||||
#clock-cells = <0>;
|
||||
clock-frequency = <0>;
|
||||
};
|
||||
audio_clk_b: audio_clk_b {
|
||||
compatible = "fixed-clock";
|
||||
#clock-cells = <0>;
|
||||
clock-frequency = <0>;
|
||||
};
|
||||
audio_clk_c: audio_clk_c {
|
||||
compatible = "fixed-clock";
|
||||
#clock-cells = <0>;
|
||||
clock-frequency = <0>;
|
||||
};
|
||||
|
||||
/* Fixed ratio clocks */
|
||||
|
|
|
|||
|
|
@ -48,8 +48,7 @@
|
|||
|
||||
gpios = <&gpio3 20 GPIO_ACTIVE_HIGH>;
|
||||
gpios-states = <1>;
|
||||
states = <3300000 1
|
||||
1800000 0>;
|
||||
states = <3300000 1>, <1800000 0>;
|
||||
};
|
||||
|
||||
ethernet@18000000 {
|
||||
|
|
|
|||
|
|
@ -68,6 +68,14 @@
|
|||
<0xf0000100 0x100>;
|
||||
};
|
||||
|
||||
timer@f0000200 {
|
||||
compatible = "arm,cortex-a9-global-timer";
|
||||
reg = <0xf0000200 0x100>;
|
||||
interrupts = <GIC_PPI 11
|
||||
(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_EDGE_RISING)>;
|
||||
clocks = <&cpg_clocks R8A7779_CLK_ZS>;
|
||||
};
|
||||
|
||||
timer@f0000600 {
|
||||
compatible = "arm,cortex-a9-twd-timer";
|
||||
reg = <0xf0000600 0x20>;
|
||||
|
|
@ -164,10 +172,10 @@
|
|||
<0xfe780044 4>,
|
||||
<0xfe780064 4>,
|
||||
<0xfe780000 4>;
|
||||
interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
|
||||
sense-bitfield-width = <2>;
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -150,8 +150,7 @@
|
|||
|
||||
gpios = <&gpio5 29 GPIO_ACTIVE_HIGH>;
|
||||
gpios-states = <1>;
|
||||
states = <3300000 1
|
||||
1800000 0>;
|
||||
states = <3300000 1>, <1800000 0>;
|
||||
};
|
||||
|
||||
vcc_sdhi2: regulator-vcc-sdhi2 {
|
||||
|
|
@ -174,8 +173,7 @@
|
|||
|
||||
gpios = <&gpio5 30 GPIO_ACTIVE_HIGH>;
|
||||
gpios-states = <1>;
|
||||
states = <3300000 1
|
||||
1800000 0>;
|
||||
states = <3300000 1>, <1800000 0>;
|
||||
};
|
||||
|
||||
audio_clock: audio_clock {
|
||||
|
|
|
|||
|
|
@ -487,6 +487,9 @@
|
|||
icram0: sram@e63a0000 {
|
||||
compatible = "mmio-sram";
|
||||
reg = <0 0xe63a0000 0 0x12000>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges = <0 0 0xe63a0000 0x12000>;
|
||||
};
|
||||
|
||||
icram1: sram@e63c0000 {
|
||||
|
|
@ -669,8 +672,8 @@
|
|||
compatible = "renesas,r8a7790-usb-dmac",
|
||||
"renesas,usb-dmac";
|
||||
reg = <0 0xe65a0000 0 0x100>;
|
||||
interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-names = "ch0", "ch1";
|
||||
clocks = <&cpg CPG_MOD 330>;
|
||||
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
|
||||
|
|
@ -683,8 +686,8 @@
|
|||
compatible = "renesas,r8a7790-usb-dmac",
|
||||
"renesas,usb-dmac";
|
||||
reg = <0 0xe65b0000 0 0x100>;
|
||||
interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-names = "ch0", "ch1";
|
||||
clocks = <&cpg CPG_MOD 331>;
|
||||
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
|
||||
|
|
@ -697,22 +700,22 @@
|
|||
compatible = "renesas,dmac-r8a7790",
|
||||
"renesas,rcar-dmac";
|
||||
reg = <0 0xe6700000 0 0x20000>;
|
||||
interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-names = "error",
|
||||
"ch0", "ch1", "ch2", "ch3",
|
||||
"ch4", "ch5", "ch6", "ch7",
|
||||
|
|
@ -730,22 +733,22 @@
|
|||
compatible = "renesas,dmac-r8a7790",
|
||||
"renesas,rcar-dmac";
|
||||
reg = <0 0xe6720000 0 0x20000>;
|
||||
interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-names = "error",
|
||||
"ch0", "ch1", "ch2", "ch3",
|
||||
"ch4", "ch5", "ch6", "ch7",
|
||||
|
|
@ -1300,20 +1303,20 @@
|
|||
compatible = "renesas,dmac-r8a7790",
|
||||
"renesas,rcar-dmac";
|
||||
reg = <0 0xec700000 0 0x10000>;
|
||||
interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-names = "error",
|
||||
"ch0", "ch1", "ch2", "ch3",
|
||||
"ch4", "ch5", "ch6", "ch7",
|
||||
|
|
@ -1331,20 +1334,20 @@
|
|||
compatible = "renesas,dmac-r8a7790",
|
||||
"renesas,rcar-dmac";
|
||||
reg = <0 0xec720000 0 0x10000>;
|
||||
interrupts = <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupts = <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-names = "error",
|
||||
"ch0", "ch1", "ch2", "ch3",
|
||||
"ch4", "ch5", "ch6", "ch7",
|
||||
|
|
@ -1388,10 +1391,10 @@
|
|||
#size-cells = <2>;
|
||||
#interrupt-cells = <1>;
|
||||
ranges = <0x02000000 0 0xee080000 0 0xee080000 0 0x00010000>;
|
||||
interrupt-map-mask = <0xff00 0 0 0x7>;
|
||||
interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH
|
||||
0x0800 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH
|
||||
0x1000 0 0 2 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-map-mask = <0xf800 0 0 0x7>;
|
||||
interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0x0800 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0x1000 0 0 2 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
|
||||
|
||||
usb@1,0 {
|
||||
reg = <0x800 0 0 0 0>;
|
||||
|
|
@ -1423,10 +1426,10 @@
|
|||
#size-cells = <2>;
|
||||
#interrupt-cells = <1>;
|
||||
ranges = <0x02000000 0 0xee0a0000 0 0xee0a0000 0 0x00010000>;
|
||||
interrupt-map-mask = <0xff00 0 0 0x7>;
|
||||
interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH
|
||||
0x0800 0 0 1 &gic GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH
|
||||
0x1000 0 0 2 &gic GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-map-mask = <0xf800 0 0 0x7>;
|
||||
interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0x0800 0 0 1 &gic GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0x1000 0 0 2 &gic GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
|
||||
};
|
||||
|
||||
pci2: pci@ee0d0000 {
|
||||
|
|
@ -1446,10 +1449,10 @@
|
|||
#size-cells = <2>;
|
||||
#interrupt-cells = <1>;
|
||||
ranges = <0x02000000 0 0xee0c0000 0 0xee0c0000 0 0x00010000>;
|
||||
interrupt-map-mask = <0xff00 0 0 0x7>;
|
||||
interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
|
||||
0x0800 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
|
||||
0x1000 0 0 2 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-map-mask = <0xf800 0 0 0x7>;
|
||||
interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0x0800 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0x1000 0 0 2 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
|
||||
|
||||
usb@1,0 {
|
||||
reg = <0x20800 0 0 0 0>;
|
||||
|
|
@ -1614,13 +1617,13 @@
|
|||
#size-cells = <2>;
|
||||
bus-range = <0x00 0xff>;
|
||||
device_type = "pci";
|
||||
ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000
|
||||
0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000
|
||||
0x02000000 0 0x30000000 0 0x30000000 0 0x08000000
|
||||
0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
|
||||
ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000>,
|
||||
<0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000>,
|
||||
<0x02000000 0 0x30000000 0 0x30000000 0 0x08000000>,
|
||||
<0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
|
||||
/* Map all possible DDR as inbound ranges */
|
||||
dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000
|
||||
0x43000000 1 0x80000000 1 0x80000000 0 0x80000000>;
|
||||
dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>,
|
||||
<0x43000000 1 0x80000000 1 0x80000000 0 0x80000000>;
|
||||
interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
|
||||
|
|
|
|||
|
|
@ -193,8 +193,7 @@
|
|||
|
||||
gpios = <&gpio2 12 GPIO_ACTIVE_HIGH>;
|
||||
gpios-states = <1>;
|
||||
states = <3300000 1
|
||||
1800000 0>;
|
||||
states = <3300000 1>, <1800000 0>;
|
||||
};
|
||||
|
||||
vcc_sdhi1: regulator-vcc-sdhi1 {
|
||||
|
|
@ -217,8 +216,7 @@
|
|||
|
||||
gpios = <&gpio2 13 GPIO_ACTIVE_HIGH>;
|
||||
gpios-states = <1>;
|
||||
states = <3300000 1
|
||||
1800000 0>;
|
||||
states = <3300000 1>, <1800000 0>;
|
||||
};
|
||||
|
||||
vcc_sdhi2: regulator-vcc-sdhi2 {
|
||||
|
|
@ -241,8 +239,7 @@
|
|||
|
||||
gpios = <&gpio2 26 GPIO_ACTIVE_HIGH>;
|
||||
gpios-states = <1>;
|
||||
states = <3300000 1
|
||||
1800000 0>;
|
||||
states = <3300000 1>, <1800000 0>;
|
||||
};
|
||||
|
||||
audio_clock: audio_clock {
|
||||
|
|
|
|||
|
|
@ -63,8 +63,7 @@
|
|||
|
||||
gpios = <&gpio2 12 GPIO_ACTIVE_HIGH>;
|
||||
gpios-states = <1>;
|
||||
states = <3300000 1
|
||||
1800000 0>;
|
||||
states = <3300000 1>, <1800000 0>;
|
||||
};
|
||||
|
||||
vcc_sdhi2: regulator-vcc-sdhi2 {
|
||||
|
|
@ -85,8 +84,7 @@
|
|||
|
||||
gpios = <&gpio2 26 GPIO_ACTIVE_HIGH>;
|
||||
gpios-states = <1>;
|
||||
states = <3300000 1
|
||||
1800000 0>;
|
||||
states = <3300000 1>, <1800000 0>;
|
||||
};
|
||||
|
||||
hdmi-out {
|
||||
|
|
|
|||
|
|
@ -420,6 +420,9 @@
|
|||
icram0: sram@e63a0000 {
|
||||
compatible = "mmio-sram";
|
||||
reg = <0 0xe63a0000 0 0x12000>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges = <0 0 0xe63a0000 0x12000>;
|
||||
};
|
||||
|
||||
icram1: sram@e63c0000 {
|
||||
|
|
@ -618,8 +621,8 @@
|
|||
compatible = "renesas,r8a7791-usb-dmac",
|
||||
"renesas,usb-dmac";
|
||||
reg = <0 0xe65a0000 0 0x100>;
|
||||
interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-names = "ch0", "ch1";
|
||||
clocks = <&cpg CPG_MOD 330>;
|
||||
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
|
||||
|
|
@ -632,8 +635,8 @@
|
|||
compatible = "renesas,r8a7791-usb-dmac",
|
||||
"renesas,usb-dmac";
|
||||
reg = <0 0xe65b0000 0 0x100>;
|
||||
interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-names = "ch0", "ch1";
|
||||
clocks = <&cpg CPG_MOD 331>;
|
||||
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
|
||||
|
|
@ -646,22 +649,22 @@
|
|||
compatible = "renesas,dmac-r8a7791",
|
||||
"renesas,rcar-dmac";
|
||||
reg = <0 0xe6700000 0 0x20000>;
|
||||
interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-names = "error",
|
||||
"ch0", "ch1", "ch2", "ch3",
|
||||
"ch4", "ch5", "ch6", "ch7",
|
||||
|
|
@ -679,22 +682,22 @@
|
|||
compatible = "renesas,dmac-r8a7791",
|
||||
"renesas,rcar-dmac";
|
||||
reg = <0 0xe6720000 0 0x20000>;
|
||||
interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-names = "error",
|
||||
"ch0", "ch1", "ch2", "ch3",
|
||||
"ch4", "ch5", "ch6", "ch7",
|
||||
|
|
@ -1338,20 +1341,20 @@
|
|||
compatible = "renesas,dmac-r8a7791",
|
||||
"renesas,rcar-dmac";
|
||||
reg = <0 0xec700000 0 0x10000>;
|
||||
interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-names = "error",
|
||||
"ch0", "ch1", "ch2", "ch3",
|
||||
"ch4", "ch5", "ch6", "ch7",
|
||||
|
|
@ -1369,20 +1372,20 @@
|
|||
compatible = "renesas,dmac-r8a7791",
|
||||
"renesas,rcar-dmac";
|
||||
reg = <0 0xec720000 0 0x10000>;
|
||||
interrupts = <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupts = <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-names = "error",
|
||||
"ch0", "ch1", "ch2", "ch3",
|
||||
"ch4", "ch5", "ch6", "ch7",
|
||||
|
|
@ -1426,10 +1429,10 @@
|
|||
#size-cells = <2>;
|
||||
#interrupt-cells = <1>;
|
||||
ranges = <0x02000000 0 0xee080000 0 0xee080000 0 0x00010000>;
|
||||
interrupt-map-mask = <0xff00 0 0 0x7>;
|
||||
interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH
|
||||
0x0800 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH
|
||||
0x1000 0 0 2 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-map-mask = <0xf800 0 0 0x7>;
|
||||
interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0x0800 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0x1000 0 0 2 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
|
||||
|
||||
usb@1,0 {
|
||||
reg = <0x800 0 0 0 0>;
|
||||
|
|
@ -1461,10 +1464,10 @@
|
|||
#size-cells = <2>;
|
||||
#interrupt-cells = <1>;
|
||||
ranges = <0x02000000 0 0xee0c0000 0 0xee0c0000 0 0x00010000>;
|
||||
interrupt-map-mask = <0xff00 0 0 0x7>;
|
||||
interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
|
||||
0x0800 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
|
||||
0x1000 0 0 2 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-map-mask = <0xf800 0 0 0x7>;
|
||||
interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0x0800 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0x1000 0 0 2 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
|
||||
|
||||
usb@1,0 {
|
||||
reg = <0x10800 0 0 0 0>;
|
||||
|
|
@ -1598,13 +1601,13 @@
|
|||
#size-cells = <2>;
|
||||
bus-range = <0x00 0xff>;
|
||||
device_type = "pci";
|
||||
ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000
|
||||
0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000
|
||||
0x02000000 0 0x30000000 0 0x30000000 0 0x08000000
|
||||
0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
|
||||
ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000>,
|
||||
<0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000>,
|
||||
<0x02000000 0 0x30000000 0 0x30000000 0 0x08000000>,
|
||||
<0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
|
||||
/* Map all possible DDR as inbound ranges */
|
||||
dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000
|
||||
0x43000000 2 0x00000000 2 0x00000000 1 0x00000000>;
|
||||
dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>,
|
||||
<0x43000000 2 0x00000000 2 0x00000000 1 0x00000000>;
|
||||
interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
|
||||
|
|
|
|||
|
|
@ -345,6 +345,9 @@
|
|||
icram0: sram@e63a0000 {
|
||||
compatible = "mmio-sram";
|
||||
reg = <0 0xe63a0000 0 0x12000>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges = <0 0 0xe63a0000 0x12000>;
|
||||
};
|
||||
|
||||
icram1: sram@e63c0000 {
|
||||
|
|
@ -466,22 +469,22 @@
|
|||
compatible = "renesas,dmac-r8a7792",
|
||||
"renesas,rcar-dmac";
|
||||
reg = <0 0xe6700000 0 0x20000>;
|
||||
interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-names = "error",
|
||||
"ch0", "ch1", "ch2", "ch3",
|
||||
"ch4", "ch5", "ch6", "ch7",
|
||||
|
|
@ -499,22 +502,22 @@
|
|||
compatible = "renesas,dmac-r8a7792",
|
||||
"renesas,rcar-dmac";
|
||||
reg = <0 0xe6720000 0 0x20000>;
|
||||
interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-names = "error",
|
||||
"ch0", "ch1", "ch2", "ch3",
|
||||
"ch4", "ch5", "ch6", "ch7",
|
||||
|
|
|
|||
|
|
@ -179,8 +179,7 @@
|
|||
|
||||
gpios = <&gpio2 12 GPIO_ACTIVE_HIGH>;
|
||||
gpios-states = <1>;
|
||||
states = <3300000 1
|
||||
1800000 0>;
|
||||
states = <3300000 1>, <1800000 0>;
|
||||
};
|
||||
|
||||
vcc_sdhi1: regulator-vcc-sdhi1 {
|
||||
|
|
@ -203,8 +202,7 @@
|
|||
|
||||
gpios = <&gpio2 13 GPIO_ACTIVE_HIGH>;
|
||||
gpios-states = <1>;
|
||||
states = <3300000 1
|
||||
1800000 0>;
|
||||
states = <3300000 1>, <1800000 0>;
|
||||
};
|
||||
|
||||
vcc_sdhi2: regulator-vcc-sdhi2 {
|
||||
|
|
@ -227,8 +225,7 @@
|
|||
|
||||
gpios = <&gpio2 26 GPIO_ACTIVE_HIGH>;
|
||||
gpios-states = <1>;
|
||||
states = <3300000 1
|
||||
1800000 0>;
|
||||
states = <3300000 1>, <1800000 0>;
|
||||
};
|
||||
|
||||
audio_clock: audio_clock {
|
||||
|
|
|
|||
|
|
@ -406,6 +406,9 @@
|
|||
icram0: sram@e63a0000 {
|
||||
compatible = "mmio-sram";
|
||||
reg = <0 0xe63a0000 0 0x12000>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges = <0 0 0xe63a0000 0x12000>;
|
||||
};
|
||||
|
||||
icram1: sram@e63c0000 {
|
||||
|
|
@ -565,22 +568,22 @@
|
|||
compatible = "renesas,dmac-r8a7793",
|
||||
"renesas,rcar-dmac";
|
||||
reg = <0 0xe6700000 0 0x20000>;
|
||||
interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-names = "error",
|
||||
"ch0", "ch1", "ch2", "ch3",
|
||||
"ch4", "ch5", "ch6", "ch7",
|
||||
|
|
@ -598,22 +601,22 @@
|
|||
compatible = "renesas,dmac-r8a7793",
|
||||
"renesas,rcar-dmac";
|
||||
reg = <0 0xe6720000 0 0x20000>;
|
||||
interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-names = "error",
|
||||
"ch0", "ch1", "ch2", "ch3",
|
||||
"ch4", "ch5", "ch6", "ch7",
|
||||
|
|
@ -1166,20 +1169,20 @@
|
|||
compatible = "renesas,dmac-r8a7793",
|
||||
"renesas,rcar-dmac";
|
||||
reg = <0 0xec700000 0 0x10000>;
|
||||
interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-names = "error",
|
||||
"ch0", "ch1", "ch2", "ch3",
|
||||
"ch4", "ch5", "ch6", "ch7",
|
||||
|
|
@ -1197,20 +1200,20 @@
|
|||
compatible = "renesas,dmac-r8a7793",
|
||||
"renesas,rcar-dmac";
|
||||
reg = <0 0xec720000 0 0x10000>;
|
||||
interrupts = <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupts = <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-names = "error",
|
||||
"ch0", "ch1", "ch2", "ch3",
|
||||
"ch4", "ch5", "ch6", "ch7",
|
||||
|
|
|
|||
|
|
@ -60,8 +60,7 @@
|
|||
|
||||
gpios = <&gpio2 29 GPIO_ACTIVE_HIGH>;
|
||||
gpios-states = <1>;
|
||||
states = <3300000 1
|
||||
1800000 0>;
|
||||
states = <3300000 1>, <1800000 0>;
|
||||
};
|
||||
|
||||
vcc_sdhi1: regulator-vcc-sdhi1 {
|
||||
|
|
@ -84,8 +83,7 @@
|
|||
|
||||
gpios = <&gpio4 29 GPIO_ACTIVE_HIGH>;
|
||||
gpios-states = <1>;
|
||||
states = <3300000 1
|
||||
1800000 0>;
|
||||
states = <3300000 1>, <1800000 0>;
|
||||
};
|
||||
|
||||
lbsc {
|
||||
|
|
|
|||
|
|
@ -126,8 +126,7 @@
|
|||
|
||||
gpios = <&gpio4 29 GPIO_ACTIVE_HIGH>;
|
||||
gpios-states = <1>;
|
||||
states = <3300000 1
|
||||
1800000 0>;
|
||||
states = <3300000 1>, <1800000 0>;
|
||||
};
|
||||
|
||||
vga-encoder {
|
||||
|
|
|
|||
|
|
@ -351,6 +351,9 @@
|
|||
icram0: sram@e63a0000 {
|
||||
compatible = "mmio-sram";
|
||||
reg = <0 0xe63a0000 0 0x12000>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges = <0 0 0xe63a0000 0x12000>;
|
||||
};
|
||||
|
||||
icram1: sram@e63c0000 {
|
||||
|
|
@ -527,22 +530,22 @@
|
|||
compatible = "renesas,dmac-r8a7794",
|
||||
"renesas,rcar-dmac";
|
||||
reg = <0 0xe6700000 0 0x20000>;
|
||||
interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-names = "error",
|
||||
"ch0", "ch1", "ch2", "ch3",
|
||||
"ch4", "ch5", "ch6", "ch7",
|
||||
|
|
@ -560,22 +563,22 @@
|
|||
compatible = "renesas,dmac-r8a7794",
|
||||
"renesas,rcar-dmac";
|
||||
reg = <0 0xe6720000 0 0x20000>;
|
||||
interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-names = "error",
|
||||
"ch0", "ch1", "ch2", "ch3",
|
||||
"ch4", "ch5", "ch6", "ch7",
|
||||
|
|
@ -1132,20 +1135,20 @@
|
|||
compatible = "renesas,dmac-r8a7794",
|
||||
"renesas,rcar-dmac";
|
||||
reg = <0 0xec700000 0 0x10000>;
|
||||
interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-names = "error",
|
||||
"ch0", "ch1", "ch2", "ch3", "ch4",
|
||||
"ch5", "ch6", "ch7", "ch8", "ch9",
|
||||
|
|
@ -1176,10 +1179,10 @@
|
|||
#size-cells = <2>;
|
||||
#interrupt-cells = <1>;
|
||||
ranges = <0x02000000 0 0xee080000 0 0xee080000 0 0x00010000>;
|
||||
interrupt-map-mask = <0xff00 0 0 0x7>;
|
||||
interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH
|
||||
0x0800 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH
|
||||
0x1000 0 0 2 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-map-mask = <0xf800 0 0 0x7>;
|
||||
interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0x0800 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0x1000 0 0 2 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
|
||||
|
||||
usb@1,0 {
|
||||
reg = <0x800 0 0 0 0>;
|
||||
|
|
@ -1211,10 +1214,10 @@
|
|||
#size-cells = <2>;
|
||||
#interrupt-cells = <1>;
|
||||
ranges = <0x02000000 0 0xee0c0000 0 0xee0c0000 0 0x00010000>;
|
||||
interrupt-map-mask = <0xff00 0 0 0x7>;
|
||||
interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
|
||||
0x0800 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
|
||||
0x1000 0 0 2 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-map-mask = <0xf800 0 0 0x7>;
|
||||
interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0x0800 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0x1000 0 0 2 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
|
||||
|
||||
usb@1,0 {
|
||||
reg = <0x10800 0 0 0 0>;
|
||||
|
|
|
|||
|
|
@ -39,11 +39,18 @@
|
|||
};
|
||||
};
|
||||
|
||||
timer@f0000200 {
|
||||
compatible = "arm,cortex-a9-global-timer";
|
||||
reg = <0xf0000200 0x100>;
|
||||
interrupts = <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_EDGE_RISING)>;
|
||||
clocks = <&periph_clk>;
|
||||
};
|
||||
|
||||
timer@f0000600 {
|
||||
compatible = "arm,cortex-a9-twd-timer";
|
||||
reg = <0xf0000600 0x20>;
|
||||
interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_EDGE_RISING)>;
|
||||
clocks = <&twd_clk>;
|
||||
clocks = <&periph_clk>;
|
||||
};
|
||||
|
||||
gic: interrupt-controller@f0001000 {
|
||||
|
|
@ -110,14 +117,14 @@
|
|||
<0xe6900020 1>,
|
||||
<0xe6900040 1>,
|
||||
<0xe6900060 1>;
|
||||
interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&mstp5_clks SH73A0_CLK_INTCA0>;
|
||||
power-domains = <&pd_a4s>;
|
||||
control-parent;
|
||||
|
|
@ -132,14 +139,14 @@
|
|||
<0xe6900024 1>,
|
||||
<0xe6900044 1>,
|
||||
<0xe6900064 1>;
|
||||
interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&mstp5_clks SH73A0_CLK_INTCA0>;
|
||||
power-domains = <&pd_a4s>;
|
||||
control-parent;
|
||||
|
|
@ -154,14 +161,14 @@
|
|||
<0xe6900028 1>,
|
||||
<0xe6900048 1>,
|
||||
<0xe6900068 1>;
|
||||
interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&mstp5_clks SH73A0_CLK_INTCA0>;
|
||||
power-domains = <&pd_a4s>;
|
||||
control-parent;
|
||||
|
|
@ -176,14 +183,14 @@
|
|||
<0xe690002c 1>,
|
||||
<0xe690004c 1>,
|
||||
<0xe690006c 1>;
|
||||
interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&mstp5_clks SH73A0_CLK_INTCA0>;
|
||||
power-domains = <&pd_a4s>;
|
||||
control-parent;
|
||||
|
|
@ -194,10 +201,10 @@
|
|||
#size-cells = <0>;
|
||||
compatible = "renesas,iic-sh73a0", "renesas,rmobile-iic";
|
||||
reg = <0xe6820000 0x425>;
|
||||
interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&mstp1_clks SH73A0_CLK_IIC0>;
|
||||
power-domains = <&pd_a3sp>;
|
||||
status = "disabled";
|
||||
|
|
@ -208,10 +215,10 @@
|
|||
#size-cells = <0>;
|
||||
compatible = "renesas,iic-sh73a0", "renesas,rmobile-iic";
|
||||
reg = <0xe6822000 0x425>;
|
||||
interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&mstp3_clks SH73A0_CLK_IIC1>;
|
||||
power-domains = <&pd_a3sp>;
|
||||
status = "disabled";
|
||||
|
|
@ -222,10 +229,10 @@
|
|||
#size-cells = <0>;
|
||||
compatible = "renesas,iic-sh73a0", "renesas,rmobile-iic";
|
||||
reg = <0xe6824000 0x425>;
|
||||
interrupts = <GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 172 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupts = <GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 172 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&mstp0_clks SH73A0_CLK_IIC2>;
|
||||
power-domains = <&pd_a3sp>;
|
||||
status = "disabled";
|
||||
|
|
@ -236,10 +243,10 @@
|
|||
#size-cells = <0>;
|
||||
compatible = "renesas,iic-sh73a0", "renesas,rmobile-iic";
|
||||
reg = <0xe6826000 0x425>;
|
||||
interrupts = <GIC_SPI 183 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 185 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupts = <GIC_SPI 183 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 185 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&mstp4_clks SH73A0_CLK_IIC3>;
|
||||
power-domains = <&pd_a3sp>;
|
||||
status = "disabled";
|
||||
|
|
@ -250,10 +257,10 @@
|
|||
#size-cells = <0>;
|
||||
compatible = "renesas,iic-sh73a0", "renesas,rmobile-iic";
|
||||
reg = <0xe6828000 0x425>;
|
||||
interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&mstp4_clks SH73A0_CLK_IIC4>;
|
||||
power-domains = <&pd_c5>;
|
||||
status = "disabled";
|
||||
|
|
@ -262,8 +269,8 @@
|
|||
mmcif: mmc@e6bd0000 {
|
||||
compatible = "renesas,mmcif-sh73a0", "renesas,sh-mmcif";
|
||||
reg = <0xe6bd0000 0x100>;
|
||||
interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&mstp3_clks SH73A0_CLK_MMCIF0>;
|
||||
power-domains = <&pd_a3sp>;
|
||||
reg-io-width = <4>;
|
||||
|
|
@ -317,9 +324,9 @@
|
|||
sdhi0: sd@ee100000 {
|
||||
compatible = "renesas,sdhi-sh73a0";
|
||||
reg = <0xee100000 0x100>;
|
||||
interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&mstp3_clks SH73A0_CLK_SDHI0>;
|
||||
power-domains = <&pd_a3sp>;
|
||||
cap-sd-highspeed;
|
||||
|
|
@ -330,8 +337,8 @@
|
|||
sdhi1: sd@ee120000 {
|
||||
compatible = "renesas,sdhi-sh73a0";
|
||||
reg = <0xee120000 0x100>;
|
||||
interrupts = <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupts = <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&mstp3_clks SH73A0_CLK_SDHI1>;
|
||||
power-domains = <&pd_a3sp>;
|
||||
disable-wp;
|
||||
|
|
@ -342,8 +349,8 @@
|
|||
sdhi2: sd@ee140000 {
|
||||
compatible = "renesas,sdhi-sh73a0";
|
||||
reg = <0xee140000 0x100>;
|
||||
interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&mstp3_clks SH73A0_CLK_SDHI2>;
|
||||
power-domains = <&pd_a3sp>;
|
||||
disable-wp;
|
||||
|
|
@ -612,19 +619,25 @@
|
|||
extal2_clk: extal2 {
|
||||
compatible = "fixed-clock";
|
||||
#clock-cells = <0>;
|
||||
/* This value must be overridden by the board. */
|
||||
clock-frequency = <0>;
|
||||
};
|
||||
extcki_clk: extcki {
|
||||
compatible = "fixed-clock";
|
||||
#clock-cells = <0>;
|
||||
/* This value can be overridden by the board. */
|
||||
clock-frequency = <0>;
|
||||
};
|
||||
fsiack_clk: fsiack {
|
||||
compatible = "fixed-clock";
|
||||
#clock-cells = <0>;
|
||||
/* This value can be overridden by the board. */
|
||||
clock-frequency = <0>;
|
||||
};
|
||||
fsibck_clk: fsibck {
|
||||
compatible = "fixed-clock";
|
||||
#clock-cells = <0>;
|
||||
/* This value can be overridden by the board. */
|
||||
clock-frequency = <0>;
|
||||
};
|
||||
|
||||
|
|
@ -812,7 +825,7 @@
|
|||
clock-div = <13>;
|
||||
clock-mult = <1>;
|
||||
};
|
||||
twd_clk: twd {
|
||||
periph_clk: periph {
|
||||
compatible = "fixed-factor-clock";
|
||||
clocks = <&cpg_clocks SH73A0_CLK_Z>;
|
||||
#clock-cells = <0>;
|
||||
|
|
|
|||
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