arm: at91: dt: at91sam9 add serial pinctrl support
Set the dbgu pinctrl config by default as we have only one possible config For other uart set the rxd/txd by default. For at91sam9x5ek create soc based dts as we need to include specific soc dtsi. Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
This commit is contained in:
Jean-Christophe PLAGNIOL-VILLARD
Родитель
5314ec8e52
Коммит
ec6754a7b9
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@ -1,21 +1,33 @@
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ifeq ($(CONFIG_OF),y)
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dtb-$(CONFIG_ARCH_AT91) += aks-cdu.dtb \
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at91sam9263ek.dtb \
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at91sam9g20ek_2mmc.dtb \
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at91sam9g20ek.dtb \
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at91sam9g25ek.dtb \
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at91sam9m10g45ek.dtb \
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at91sam9n12ek.dtb \
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ethernut5.dtb \
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evk-pro3.dtb \
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kizbox.dtb \
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tny_a9260.dtb \
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tny_a9263.dtb \
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tny_a9g20.dtb \
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usb_a9260.dtb \
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usb_a9263.dtb \
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usb_a9g20.dtb
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# Keep at91 dtb files sorted alphabetically for each SoC
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# sam9260
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dtb-$(CONFIG_ARCH_AT91) += aks-cdu.dtb
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dtb-$(CONFIG_ARCH_AT91) += ethernut5.dtb
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dtb-$(CONFIG_ARCH_AT91) += evk-pro3.dtb
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dtb-$(CONFIG_ARCH_AT91) += tny_a9260.dtb
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dtb-$(CONFIG_ARCH_AT91) += usb_a9260.dtb
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# sam9263
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dtb-$(CONFIG_ARCH_AT91) += at91sam9263ek.dtb
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dtb-$(CONFIG_ARCH_AT91) += tny_a9263.dtb
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dtb-$(CONFIG_ARCH_AT91) += usb_a9263.dtb
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# sam9g20
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dtb-$(CONFIG_ARCH_AT91) += at91sam9g20ek.dtb
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dtb-$(CONFIG_ARCH_AT91) += at91sam9g20ek_2mmc.dtb
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dtb-$(CONFIG_ARCH_AT91) += kizbox.dtb
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dtb-$(CONFIG_ARCH_AT91) += tny_a9g20.dtb
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dtb-$(CONFIG_ARCH_AT91) += usb_a9g20.dtb
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# sam9g45
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dtb-$(CONFIG_ARCH_AT91) += at91sam9m10g45ek.dtb
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# sam9n12
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dtb-$(CONFIG_ARCH_AT91) += at91sam9n12ek.dtb
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# sam9x5
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dtb-$(CONFIG_ARCH_AT91) += at91sam9g15ek.dtb
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dtb-$(CONFIG_ARCH_AT91) += at91sam9g25ek.dtb
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dtb-$(CONFIG_ARCH_AT91) += at91sam9g35ek.dtb
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dtb-$(CONFIG_ARCH_AT91) += at91sam9x25ek.dtb
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dtb-$(CONFIG_ARCH_AT91) += at91sam9x35ek.dtb
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dtb-$(CONFIG_ARCH_BCM2835) += bcm2835-rpi-b.dtb
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dtb-$(CONFIG_ARCH_DOVE) += dove-cm-a510.dtb \
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dove-cubox.dtb \
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@ -112,6 +112,101 @@
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>;
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/* shared pinctrl settings */
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dbgu {
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pinctrl_dbgu: dbgu-0 {
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atmel,pins =
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<1 14 0x1 0x0 /* PB14 periph A */
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1 15 0x1 0x1>; /* PB15 periph with pullup */
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};
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};
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uart0 {
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pinctrl_uart0: uart0-0 {
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atmel,pins =
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<1 4 0x1 0x0 /* PB4 periph A */
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1 5 0x1 0x0>; /* PB5 periph A */
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};
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pinctrl_uart0_rts_cts: uart0_rts_cts-0 {
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atmel,pins =
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<1 26 0x1 0x0 /* PB26 periph A */
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1 27 0x1 0x0>; /* PB27 periph A */
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};
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pinctrl_uart0_dtr_dsr: uart0_dtr_dsr-0 {
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atmel,pins =
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<1 24 0x1 0x0 /* PB24 periph A */
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1 22 0x1 0x0>; /* PB22 periph A */
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};
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pinctrl_uart0_dcd: uart0_dcd-0 {
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atmel,pins =
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<1 23 0x1 0x0>; /* PB23 periph A */
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};
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pinctrl_uart0_ri: uart0_ri-0 {
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atmel,pins =
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<1 25 0x1 0x0>; /* PB25 periph A */
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};
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};
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uart1 {
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pinctrl_uart1: uart1-0 {
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atmel,pins =
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<2 6 0x1 0x1 /* PB6 periph A with pullup */
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2 7 0x1 0x0>; /* PB7 periph A */
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};
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pinctrl_uart1_rts_cts: uart1_rts_cts-0 {
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atmel,pins =
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<1 28 0x1 0x0 /* PB28 periph A */
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1 29 0x1 0x0>; /* PB29 periph A */
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};
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};
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uart2 {
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pinctrl_uart2: uart2-0 {
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atmel,pins =
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<1 8 0x1 0x1 /* PB8 periph A with pullup */
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1 9 0x1 0x0>; /* PB9 periph A */
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};
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pinctrl_uart2_rts_cts: uart2_rts_cts-0 {
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atmel,pins =
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<0 4 0x1 0x0 /* PA4 periph A */
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0 5 0x1 0x0>; /* PA5 periph A */
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};
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};
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uart3 {
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pinctrl_uart3: uart3-0 {
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atmel,pins =
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<2 10 0x1 0x1 /* PB10 periph A with pullup */
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2 11 0x1 0x0>; /* PB11 periph A */
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};
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pinctrl_uart3_rts_cts: uart3_rts_cts-0 {
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atmel,pins =
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<3 8 0x2 0x0 /* PB8 periph B */
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3 10 0x2 0x0>; /* PB10 periph B */
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};
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};
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uart4 {
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pinctrl_uart4: uart4-0 {
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atmel,pins =
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<0 31 0x2 0x1 /* PA31 periph B with pullup */
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0 30 0x2 0x0>; /* PA30 periph B */
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};
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};
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uart5 {
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pinctrl_uart5: uart5-0 {
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atmel,pins =
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<2 12 0x1 0x1 /* PB12 periph A with pullup */
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2 13 0x1 0x0>; /* PB13 periph A */
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};
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};
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pioA: gpio@fffff400 {
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compatible = "atmel,at91rm9200-gpio";
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@ -148,6 +243,8 @@
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compatible = "atmel,at91sam9260-usart";
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reg = <0xfffff200 0x200>;
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interrupts = <1 4 7>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_dbgu>;
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status = "disabled";
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};
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@ -157,6 +254,8 @@
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interrupts = <6 4 5>;
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atmel,use-dma-rx;
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atmel,use-dma-tx;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_uart0>;
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status = "disabled";
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};
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@ -166,6 +265,8 @@
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interrupts = <7 4 5>;
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atmel,use-dma-rx;
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atmel,use-dma-tx;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_uart1>;
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status = "disabled";
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};
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@ -175,6 +276,8 @@
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interrupts = <8 4 5>;
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atmel,use-dma-rx;
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atmel,use-dma-tx;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_uart2>;
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status = "disabled";
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};
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@ -184,6 +287,8 @@
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interrupts = <23 4 5>;
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atmel,use-dma-rx;
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atmel,use-dma-tx;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_uart3>;
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status = "disabled";
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};
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@ -193,6 +298,8 @@
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interrupts = <24 4 5>;
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atmel,use-dma-rx;
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atmel,use-dma-tx;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_uart4>;
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status = "disabled";
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};
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@ -202,6 +309,8 @@
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interrupts = <25 4 5>;
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atmel,use-dma-rx;
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atmel,use-dma-tx;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_uart5>;
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status = "disabled";
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};
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@ -105,6 +105,55 @@
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>;
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/* shared pinctrl settings */
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dbgu {
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pinctrl_dbgu: dbgu-0 {
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atmel,pins =
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<2 30 0x1 0x0 /* PC30 periph A */
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2 31 0x1 0x1>; /* PC31 periph with pullup */
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};
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};
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uart0 {
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pinctrl_uart0: uart0-0 {
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atmel,pins =
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<0 26 0x1 0x1 /* PA26 periph A with pullup */
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0 27 0x1 0x0>; /* PA27 periph A */
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};
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pinctrl_uart0_rts_cts: uart0_rts_cts-0 {
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atmel,pins =
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<0 28 0x1 0x0 /* PA28 periph A */
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0 29 0x1 0x0>; /* PA29 periph A */
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};
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};
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uart1 {
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pinctrl_uart1: uart1-0 {
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atmel,pins =
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<3 0 0x1 0x1 /* PD0 periph A with pullup */
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3 1 0x1 0x0>; /* PD1 periph A */
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};
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pinctrl_uart1_rts_cts: uart1_rts_cts-0 {
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atmel,pins =
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<3 7 0x2 0x0 /* PD7 periph B */
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3 8 0x2 0x0>; /* PD8 periph B */
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};
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};
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uart2 {
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pinctrl_uart2: uart2-0 {
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atmel,pins =
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<3 2 0x1 0x1 /* PD2 periph A with pullup */
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3 3 0x1 0x0>; /* PD3 periph A */
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};
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pinctrl_uart2_rts_cts: uart2_rts_cts-0 {
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atmel,pins =
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<3 5 0x2 0x0 /* PD5 periph B */
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4 6 0x2 0x0>; /* PD6 periph B */
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};
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};
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pioA: gpio@fffff200 {
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compatible = "atmel,at91rm9200-gpio";
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@ -161,6 +210,8 @@
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compatible = "atmel,at91sam9260-usart";
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reg = <0xffffee00 0x200>;
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interrupts = <1 4 7>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_dbgu>;
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status = "disabled";
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};
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@ -170,6 +221,8 @@
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interrupts = <7 4 5>;
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atmel,use-dma-rx;
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atmel,use-dma-tx;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_uart0>;
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status = "disabled";
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};
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@ -179,6 +232,8 @@
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interrupts = <8 4 5>;
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atmel,use-dma-rx;
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atmel,use-dma-tx;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_uart1>;
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status = "disabled";
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};
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@ -188,6 +243,8 @@
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interrupts = <9 4 5>;
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atmel,use-dma-rx;
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atmel,use-dma-tx;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_uart2>;
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status = "disabled";
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};
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@ -0,0 +1,28 @@
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/*
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* at91sam9g15.dtsi - Device Tree Include file for AT91SAM9G15 SoC
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*
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* Copyright (C) 2012 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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*
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* Licensed under GPLv2.
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*/
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/include/ "at91sam9x5.dtsi"
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/ {
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model = "Atmel AT91SAM9G15 SoC";
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compatible = "atmel, at91sam9g15, atmel,at91sam9x5";
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ahb {
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apb {
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pinctrl@fffff400 {
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atmel,mux-mask = <
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/* A B C */
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0xffffffff 0xffe0399f 0x00000000 /* pioA */
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0x00040000 0x00047e3f 0x00000000 /* pioB */
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0xfdffffff 0x00000000 0xb83fffff /* pioC */
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0x003fffff 0x003f8000 0x00000000 /* pioD */
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>;
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};
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};
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};
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};
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@ -0,0 +1,16 @@
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/*
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* at91sam9g15ek.dts - Device Tree file for AT91SAM9G15-EK board
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*
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* Copyright (C) 2012 Atmel,
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* 2012 Nicolas Ferre <nicolas.ferre@atmel.com>
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*
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* Licensed under GPLv2 or later.
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*/
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/dts-v1/;
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/include/ "at91sam9g15.dtsi"
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/include/ "at91sam9x5ek.dtsi"
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/ {
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model = "Atmel AT91SAM9G25-EK";
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compatible = "atmel,at91sam9g15ek", "atmel,at91sam9x5ek", "atmel,at91sam9x5", "atmel,at91sam9";
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};
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@ -0,0 +1,28 @@
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/*
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* at91sam9g25.dtsi - Device Tree Include file for AT91SAM9G25 SoC
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*
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* Copyright (C) 2012 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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*
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* Licensed under GPLv2.
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*/
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/include/ "at91sam9x5.dtsi"
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/ {
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model = "Atmel AT91SAM9G25 SoC";
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compatible = "atmel, at91sam9g25, atmel,at91sam9x5";
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ahb {
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apb {
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pinctrl@fffff400 {
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atmel,mux-mask = <
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/* A B C */
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0xffffffff 0xffe0399f 0xc000001c /* pioA */
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0x0007ffff 0x8000fe3f 0x00000000 /* pioB */
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0x80000000 0x07c0ffff 0xb83fffff /* pioC */
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0x003fffff 0x003f8000 0x00000000 /* pioD */
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>;
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};
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};
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};
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};
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@ -7,55 +7,10 @@
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* Licensed under GPLv2 or later.
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*/
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/dts-v1/;
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/include/ "at91sam9x5.dtsi"
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/include/ "at91sam9x5cm.dtsi"
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/include/ "at91sam9g25.dtsi"
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/include/ "at91sam9x5ek.dtsi"
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/ {
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model = "Atmel AT91SAM9G25-EK";
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compatible = "atmel,at91sam9g25ek", "atmel,at91sam9x5ek", "atmel,at91sam9x5", "atmel,at91sam9";
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chosen {
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bootargs = "console=ttyS0,115200 root=/dev/mtdblock1 rw rootfstype=ubifs ubi.mtd=1 root=ubi0:rootfs";
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};
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ahb {
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apb {
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dbgu: serial@fffff200 {
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status = "okay";
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};
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usart0: serial@f801c000 {
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status = "okay";
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};
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macb0: ethernet@f802c000 {
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phy-mode = "rmii";
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status = "okay";
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};
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i2c0: i2c@f8010000 {
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status = "okay";
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};
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i2c1: i2c@f8014000 {
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status = "okay";
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};
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i2c2: i2c@f8018000 {
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status = "okay";
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||||
};
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};
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usb0: ohci@00600000 {
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status = "okay";
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num-ports = <2>;
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atmel,vbus-gpio = <&pioD 19 1
|
||||
&pioD 20 1
|
||||
>;
|
||||
};
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||||
|
||||
usb1: ehci@00700000 {
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
};
|
||||
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|||
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@ -0,0 +1,28 @@
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|||
/*
|
||||
* at91sam9g35.dtsi - Device Tree Include file for AT91SAM9G35 SoC
|
||||
*
|
||||
* Copyright (C) 2012 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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||||
*
|
||||
* Licensed under GPLv2.
|
||||
*/
|
||||
|
||||
/include/ "at91sam9x5.dtsi"
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||||
|
||||
/ {
|
||||
model = "Atmel AT91SAM9G35 SoC";
|
||||
compatible = "atmel, at91sam9g35, atmel,at91sam9x5";
|
||||
|
||||
ahb {
|
||||
apb {
|
||||
pinctrl@fffff400 {
|
||||
atmel,mux-mask = <
|
||||
/* A B C */
|
||||
0xffffffff 0xffe0399f 0xc000000c /* pioA */
|
||||
0x000406ff 0x00047e3f 0x00000000 /* pioB */
|
||||
0xfdffffff 0x00000000 0xb83fffff /* pioC */
|
||||
0x003fffff 0x003f8000 0x00000000 /* pioD */
|
||||
>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
@ -0,0 +1,16 @@
|
|||
/*
|
||||
* at91sam9g35ek.dts - Device Tree file for AT91SAM9G35-EK board
|
||||
*
|
||||
* Copyright (C) 2012 Atmel,
|
||||
* 2012 Nicolas Ferre <nicolas.ferre@atmel.com>
|
||||
*
|
||||
* Licensed under GPLv2 or later.
|
||||
*/
|
||||
/dts-v1/;
|
||||
/include/ "at91sam9g35.dtsi"
|
||||
/include/ "at91sam9x5ek.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Atmel AT91SAM9G35-EK";
|
||||
compatible = "atmel,at91sam9g35ek", "atmel,at91sam9x5ek", "atmel,at91sam9x5", "atmel,at91sam9";
|
||||
};
|
||||
|
|
@ -124,6 +124,69 @@
|
|||
>;
|
||||
|
||||
/* shared pinctrl settings */
|
||||
dbgu {
|
||||
pinctrl_dbgu: dbgu-0 {
|
||||
atmel,pins =
|
||||
<1 12 0x1 0x0 /* PB12 periph A */
|
||||
1 13 0x1 0x0>; /* PB13 periph A */
|
||||
};
|
||||
};
|
||||
|
||||
uart0 {
|
||||
pinctrl_uart0: uart0-0 {
|
||||
atmel,pins =
|
||||
<1 19 0x1 0x1 /* PB19 periph A with pullup */
|
||||
1 18 0x1 0x0>; /* PB18 periph A */
|
||||
};
|
||||
|
||||
pinctrl_uart0_rts_cts: uart0_rts_cts-0 {
|
||||
atmel,pins =
|
||||
<1 17 0x2 0x0 /* PB17 periph B */
|
||||
1 15 0x2 0x0>; /* PB15 periph B */
|
||||
};
|
||||
};
|
||||
|
||||
uart1 {
|
||||
pinctrl_uart1: uart1-0 {
|
||||
atmel,pins =
|
||||
<1 4 0x1 0x1 /* PB4 periph A with pullup */
|
||||
1 5 0x1 0x0>; /* PB5 periph A */
|
||||
};
|
||||
|
||||
pinctrl_uart1_rts_cts: uart1_rts_cts-0 {
|
||||
atmel,pins =
|
||||
<3 16 0x1 0x0 /* PD16 periph A */
|
||||
3 17 0x1 0x0>; /* PD17 periph A */
|
||||
};
|
||||
};
|
||||
|
||||
uart2 {
|
||||
pinctrl_uart2: uart2-0 {
|
||||
atmel,pins =
|
||||
<1 6 0x1 0x1 /* PB6 periph A with pullup */
|
||||
1 7 0x1 0x0>; /* PB7 periph A */
|
||||
};
|
||||
|
||||
pinctrl_uart2_rts_cts: uart2_rts_cts-0 {
|
||||
atmel,pins =
|
||||
<2 9 0x2 0x0 /* PC9 periph B */
|
||||
2 11 0x2 0x0>; /* PC11 periph B */
|
||||
};
|
||||
};
|
||||
|
||||
uart3 {
|
||||
pinctrl_uart3: uart3-0 {
|
||||
atmel,pins =
|
||||
<1 8 0x1 0x1 /* PB9 periph A with pullup */
|
||||
1 9 0x1 0x0>; /* PB8 periph A */
|
||||
};
|
||||
|
||||
pinctrl_uart3_rts_cts: uart3_rts_cts-0 {
|
||||
atmel,pins =
|
||||
<0 23 0x2 0x0 /* PA23 periph B */
|
||||
0 24 0x2 0x0>; /* PA24 periph B */
|
||||
};
|
||||
};
|
||||
|
||||
pioA: gpio@fffff200 {
|
||||
compatible = "atmel,at91rm9200-gpio";
|
||||
|
|
@ -180,6 +243,8 @@
|
|||
compatible = "atmel,at91sam9260-usart";
|
||||
reg = <0xffffee00 0x200>;
|
||||
interrupts = <1 4 7>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_dbgu>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
|
|
@ -189,6 +254,8 @@
|
|||
interrupts = <7 4 5>;
|
||||
atmel,use-dma-rx;
|
||||
atmel,use-dma-tx;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_uart0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
|
|
@ -198,6 +265,8 @@
|
|||
interrupts = <8 4 5>;
|
||||
atmel,use-dma-rx;
|
||||
atmel,use-dma-tx;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_uart1>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
|
|
@ -207,6 +276,8 @@
|
|||
interrupts = <9 4 5>;
|
||||
atmel,use-dma-rx;
|
||||
atmel,use-dma-tx;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_uart2>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
|
|
@ -216,6 +287,8 @@
|
|||
interrupts = <10 4 5>;
|
||||
atmel,use-dma-rx;
|
||||
atmel,use-dma-tx;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_uart3>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -117,6 +117,79 @@
|
|||
>;
|
||||
|
||||
/* shared pinctrl settings */
|
||||
dbgu {
|
||||
pinctrl_dbgu: dbgu-0 {
|
||||
atmel,pins =
|
||||
<0 9 0x1 0x0 /* PA9 periph A */
|
||||
0 10 0x1 0x1>; /* PA10 periph with pullup */
|
||||
};
|
||||
};
|
||||
|
||||
uart0 {
|
||||
pinctrl_uart0: uart0-0 {
|
||||
atmel,pins =
|
||||
<0 1 0x1 0x1 /* PA1 periph A with pullup */
|
||||
0 0 0x1 0x0>; /* PA0 periph A */
|
||||
};
|
||||
|
||||
pinctrl_uart0_rts_cts: uart0_rts_cts-0 {
|
||||
atmel,pins =
|
||||
<0 2 0x1 0x0 /* PA2 periph A */
|
||||
0 3 0x1 0x0>; /* PA3 periph A */
|
||||
};
|
||||
};
|
||||
|
||||
uart1 {
|
||||
pinctrl_uart1: uart1-0 {
|
||||
atmel,pins =
|
||||
<0 6 0x1 0x1 /* PA6 periph A with pullup */
|
||||
0 5 0x1 0x0>; /* PA5 periph A */
|
||||
};
|
||||
};
|
||||
|
||||
uart2 {
|
||||
pinctrl_uart2: uart2-0 {
|
||||
atmel,pins =
|
||||
<0 8 0x1 0x1 /* PA8 periph A with pullup */
|
||||
0 7 0x1 0x0>; /* PA7 periph A */
|
||||
};
|
||||
|
||||
pinctrl_uart2_rts_cts: uart2_rts_cts-0 {
|
||||
atmel,pins =
|
||||
<1 0 0x2 0x0 /* PB0 periph B */
|
||||
1 1 0x2 0x0>; /* PB1 periph B */
|
||||
};
|
||||
};
|
||||
|
||||
uart3 {
|
||||
pinctrl_uart3: uart3-0 {
|
||||
atmel,pins =
|
||||
<2 23 0x2 0x1 /* PC23 periph B with pullup */
|
||||
2 22 0x2 0x0>; /* PC22 periph B */
|
||||
};
|
||||
|
||||
pinctrl_uart3_rts_cts: uart3_rts_cts-0 {
|
||||
atmel,pins =
|
||||
<2 24 0x2 0x0 /* PC24 periph B */
|
||||
2 25 0x2 0x0>; /* PC25 periph B */
|
||||
};
|
||||
};
|
||||
|
||||
usart0 {
|
||||
pinctrl_usart0: usart0-0 {
|
||||
atmel,pins =
|
||||
<2 9 0x3 0x1 /* PC9 periph C with pullup */
|
||||
2 8 0x3 0x0>; /* PC8 periph C */
|
||||
};
|
||||
};
|
||||
|
||||
usart1 {
|
||||
pinctrl_usart1: usart1-0 {
|
||||
atmel,pins =
|
||||
<2 16 0x3 0x1 /* PC17 periph C with pullup */
|
||||
2 17 0x3 0x0>; /* PC16 periph C */
|
||||
};
|
||||
};
|
||||
|
||||
pioA: gpio@fffff400 {
|
||||
compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
|
||||
|
|
@ -163,6 +236,8 @@
|
|||
compatible = "atmel,at91sam9260-usart";
|
||||
reg = <0xfffff200 0x200>;
|
||||
interrupts = <1 4 7>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_dbgu>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
|
|
@ -172,6 +247,8 @@
|
|||
interrupts = <5 4 5>;
|
||||
atmel,use-dma-rx;
|
||||
atmel,use-dma-tx;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_uart0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
|
|
@ -181,6 +258,8 @@
|
|||
interrupts = <6 4 5>;
|
||||
atmel,use-dma-rx;
|
||||
atmel,use-dma-tx;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_uart1>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
|
|
@ -190,6 +269,8 @@
|
|||
interrupts = <7 4 5>;
|
||||
atmel,use-dma-rx;
|
||||
atmel,use-dma-tx;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_uart2>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
|
|
@ -199,6 +280,8 @@
|
|||
interrupts = <8 4 5>;
|
||||
atmel,use-dma-rx;
|
||||
atmel,use-dma-tx;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_uart3>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -0,0 +1,28 @@
|
|||
/*
|
||||
* at91sam9x25.dtsi - Device Tree Include file for AT91SAM9X25 SoC
|
||||
*
|
||||
* Copyright (C) 2012 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
|
||||
*
|
||||
* Licensed under GPLv2.
|
||||
*/
|
||||
|
||||
/include/ "at91sam9x5.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Atmel AT91SAM9X25 SoC";
|
||||
compatible = "atmel, at91sam9x25, atmel,at91sam9x5";
|
||||
|
||||
ahb {
|
||||
apb {
|
||||
pinctrl@fffff400 {
|
||||
atmel,mux-mask = <
|
||||
/* A B C */
|
||||
0xffffffff 0xffe03fff 0xc000001c /* pioA */
|
||||
0x0007ffff 0x00047e3f 0x00000000 /* pioB */
|
||||
0x80000000 0xfffd0000 0xb83fffff /* pioC */
|
||||
0x003fffff 0x003f8000 0x00000000 /* pioD */
|
||||
>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
@ -0,0 +1,16 @@
|
|||
/*
|
||||
* at91sam9x25ek.dts - Device Tree file for AT91SAM9X25-EK board
|
||||
*
|
||||
* Copyright (C) 2012 Atmel,
|
||||
* 2012 Nicolas Ferre <nicolas.ferre@atmel.com>
|
||||
*
|
||||
* Licensed under GPLv2 or later.
|
||||
*/
|
||||
/dts-v1/;
|
||||
/include/ "at91sam9x25.dtsi"
|
||||
/include/ "at91sam9x5ek.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Atmel AT91SAM9G25-EK";
|
||||
compatible = "atmel,at91sam9x25ek", "atmel,at91sam9x5ek", "atmel,at91sam9x5", "atmel,at91sam9";
|
||||
};
|
||||
|
|
@ -0,0 +1,28 @@
|
|||
/*
|
||||
* at91sam9x35.dtsi - Device Tree Include file for AT91SAM9X35 SoC
|
||||
*
|
||||
* Copyright (C) 2012 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
|
||||
*
|
||||
* Licensed under GPLv2.
|
||||
*/
|
||||
|
||||
/include/ "at91sam9x5.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Atmel AT91SAM9X35 SoC";
|
||||
compatible = "atmel, at91sam9x35, atmel,at91sam9x5";
|
||||
|
||||
ahb {
|
||||
apb {
|
||||
pinctrl@fffff400 {
|
||||
atmel,mux-mask = <
|
||||
/* A B C */
|
||||
0xffffffff 0xffe03fff 0xc000000c /* pioA */
|
||||
0x000406ff 0x00047e3f 0x00000000 /* pioB */
|
||||
0xfdffffff 0x00000000 0xb83fffff /* pioC */
|
||||
0x003fffff 0x003f8000 0x00000000 /* pioD */
|
||||
>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
@ -0,0 +1,16 @@
|
|||
/*
|
||||
* at91sam9x35ek.dts - Device Tree file for AT91SAM9X35-EK board
|
||||
*
|
||||
* Copyright (C) 2012 Atmel,
|
||||
* 2012 Nicolas Ferre <nicolas.ferre@atmel.com>
|
||||
*
|
||||
* Licensed under GPLv2 or later.
|
||||
*/
|
||||
/dts-v1/;
|
||||
/include/ "at91sam9x35.dtsi"
|
||||
/include/ "at91sam9x5ek.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Atmel AT91SAM9X35-EK";
|
||||
compatible = "atmel,at91sam9x35ek", "atmel,at91sam9x5ek", "atmel,at91sam9x5", "atmel,at91sam9";
|
||||
};
|
||||
|
|
@ -111,21 +111,92 @@
|
|||
interrupts = <21 4 0>;
|
||||
};
|
||||
|
||||
pinctrl@fffff200 {
|
||||
pinctrl@fffff400 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "atmel,at91sam9x5-pinctrl", "atmel,at91rm9200-pinctrl", "simple-bus";
|
||||
ranges = <0xfffff400 0xfffff400 0x800>;
|
||||
|
||||
atmel,mux-mask = <
|
||||
/* A B C */
|
||||
0xffffffff 0xffe0399f 0xc000001c /* pioA */
|
||||
0xffffffff 0xffc003ff 0xffc003ff /* pioB */
|
||||
0xffffffff 0xffc003ff 0xffc003ff /* pioC */
|
||||
0xffffffff 0xffc003ff 0xffc003ff /* pioD */
|
||||
>;
|
||||
|
||||
/* shared pinctrl settings */
|
||||
dbgu {
|
||||
pinctrl_dbgu: dbgu-0 {
|
||||
atmel,pins =
|
||||
<0 9 0x1 0x0 /* PA9 periph A */
|
||||
0 10 0x1 0x1>; /* PA10 periph A with pullup */
|
||||
};
|
||||
};
|
||||
|
||||
uart0 {
|
||||
pinctrl_uart0: uart0-0 {
|
||||
atmel,pins =
|
||||
<0 0 0x1 0x1 /* PA0 periph A with pullup */
|
||||
0 1 0x1 0x0>; /* PA1 periph A */
|
||||
};
|
||||
|
||||
pinctrl_uart0_rts_cts: uart0_rts_cts-0 {
|
||||
atmel,pins =
|
||||
<0 2 0x1 0x0 /* PA2 periph A */
|
||||
0 3 0x1 0x0>; /* PA3 periph A */
|
||||
};
|
||||
};
|
||||
|
||||
uart1 {
|
||||
pinctrl_uart1: uart1-0 {
|
||||
atmel,pins =
|
||||
<0 5 0x1 0x1 /* PA5 periph A with pullup */
|
||||
0 6 0x1 0x0>; /* PA6 periph A */
|
||||
};
|
||||
|
||||
pinctrl_uart1_rts_cts: uart1_rts_cts-0 {
|
||||
atmel,pins =
|
||||
<3 27 0x3 0x0 /* PC27 periph C */
|
||||
3 28 0x3 0x0>; /* PC28 periph C */
|
||||
};
|
||||
};
|
||||
|
||||
uart2 {
|
||||
pinctrl_uart2: uart2-0 {
|
||||
atmel,pins =
|
||||
<0 7 0x1 0x1 /* PA7 periph A with pullup */
|
||||
0 8 0x1 0x0>; /* PA8 periph A */
|
||||
};
|
||||
|
||||
pinctrl_uart2_rts_cts: uart2_rts_cts-0 {
|
||||
atmel,pins =
|
||||
<0 0 0x2 0x0 /* PB0 periph B */
|
||||
0 1 0x2 0x0>; /* PB1 periph B */
|
||||
};
|
||||
};
|
||||
|
||||
uart3 {
|
||||
pinctrl_uart3: uart3-0 {
|
||||
atmel,pins =
|
||||
<3 23 0x2 0x1 /* PC22 periph B with pullup */
|
||||
3 23 0x2 0x0>; /* PC23 periph B */
|
||||
};
|
||||
|
||||
pinctrl_uart3_rts_cts: uart3_rts_cts-0 {
|
||||
atmel,pins =
|
||||
<3 24 0x2 0x0 /* PC24 periph B */
|
||||
3 25 0x2 0x0>; /* PC25 periph B */
|
||||
};
|
||||
};
|
||||
|
||||
usart0 {
|
||||
pinctrl_usart0: usart0-0 {
|
||||
atmel,pins =
|
||||
<3 8 0x3 0x0 /* PC8 periph C */
|
||||
3 9 0x3 0x1>; /* PC9 periph C with pullup */
|
||||
};
|
||||
};
|
||||
|
||||
usart1 {
|
||||
pinctrl_usart1: usart1-0 {
|
||||
atmel,pins =
|
||||
<3 16 0x3 0x0 /* PC16 periph C */
|
||||
3 17 0x3 0x1>; /* PC17 periph C with pullup */
|
||||
};
|
||||
};
|
||||
|
||||
pioA: gpio@fffff400 {
|
||||
compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
|
||||
|
|
@ -174,6 +245,8 @@
|
|||
compatible = "atmel,at91sam9260-usart";
|
||||
reg = <0xfffff200 0x200>;
|
||||
interrupts = <1 4 7>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_dbgu>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
|
|
@ -183,6 +256,8 @@
|
|||
interrupts = <5 4 5>;
|
||||
atmel,use-dma-rx;
|
||||
atmel,use-dma-tx;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_uart0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
|
|
@ -192,6 +267,8 @@
|
|||
interrupts = <6 4 5>;
|
||||
atmel,use-dma-rx;
|
||||
atmel,use-dma-tx;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_uart1>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
|
|
@ -201,6 +278,8 @@
|
|||
interrupts = <7 4 5>;
|
||||
atmel,use-dma-rx;
|
||||
atmel,use-dma-tx;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_uart2>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -0,0 +1,59 @@
|
|||
/*
|
||||
* at91sam9x5ek.dtsi - Device Tree file for AT91SAM9x5CM Base board
|
||||
*
|
||||
* Copyright (C) 2012 Atmel,
|
||||
* 2012 Nicolas Ferre <nicolas.ferre@atmel.com>
|
||||
*
|
||||
* Licensed under GPLv2 or later.
|
||||
*/
|
||||
/include/ "at91sam9x5cm.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Atmel AT91SAM9X5-EK";
|
||||
compatible = "atmel,at91sam9x5ek", "atmel,at91sam9x5", "atmel,at91sam9";
|
||||
|
||||
chosen {
|
||||
bootargs = "128M console=ttyS0,115200 root=/dev/mtdblock1 rw rootfstype=ubifs ubi.mtd=1 root=ubi0:rootfs";
|
||||
};
|
||||
|
||||
ahb {
|
||||
apb {
|
||||
dbgu: serial@fffff200 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
usart0: serial@f801c000 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
macb0: ethernet@f802c000 {
|
||||
phy-mode = "rmii";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
i2c0: i2c@f8010000 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
i2c1: i2c@f8014000 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
i2c2: i2c@f8018000 {
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
usb0: ohci@00600000 {
|
||||
status = "okay";
|
||||
num-ports = <2>;
|
||||
atmel,vbus-gpio = <&pioD 19 1
|
||||
&pioD 20 1
|
||||
>;
|
||||
};
|
||||
|
||||
usb1: ehci@00700000 {
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
};
|
||||
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